Commits · V1.9.7 · b4works / mpm · GitLab

Jun 14, 2021
- New bug fix release (fixed regression in DEFGROUP directive) · 5f8bc2a8
  Bits4fun authored Jun 14, 2021
  
  View commits for tag V1.9.7 V1.9.7
  
  5f8bc2a8
Jun 12, 2021
- Fixed regression in DEFGROUP, every defgroup element was 0! · 7f5eff22
  Bits4fun authored Jun 12, 2021
  7f5eff22
Jun 11, 2021
- Reached V1.9.6 milestone · eef442e4
  Bits4fun authored Jun 11, 2021
  
  View commits for tag V1.9.6 V1.9.6
  
  eef442e4
Jun 09, 2021
- #35 , Fixed regression in object file expression parsing (total length of... · 0a9c44aa
  Bits4fun authored Jun 09, 2021
  0a9c44aa
May 13, 2021
- #41 , fixed incomplete syntax parsing for zxn instructions · f3ae42d8
  Bits4fun authored May 13, 2021
  
  f3ae42d8
- #41 , fixed incomplete syntax parsing for z380 instructions · 6b90cd09
  Bits4fun authored May 13, 2021
  
  6b90cd09
May 04, 2021
- #41 , added a few test cases of multiple instructions per line · f709972d
  Bits4fun authored May 04, 2021
  f709972d
- #41 , First implementation of : (colon) as multiple mnemonic instructions per line · 2ce3b476
  Bits4fun authored May 04, 2021
  
  2ce3b476
May 01, 2021
- Reached V1.9.5 milestone. · ebb9adad
  Bits4fun authored May 01, 2021
  
  View commits for tag V1.9.5 V1.9.5
  
  ebb9adad
- #3 , Implemented SUBW [HL,]SP as meta instruction (syntax compatibility with Z80) · 04867b5e
  Bits4fun authored May 01, 2021
  
  04867b5e
- #40 , Implemented SUB[W] HL,BC|DE|HL|SP for Z80, ZXN & Z180 targets · 44f4b057
  Bits4fun authored May 01, 2021
  
  44f4b057
Apr 29, 2021
- #40 , Implemented SRL[W] BC|DE|HL and SRLW (HL) meta instructions for Z80, ZXN & Z180 targets · 0df0bdb6
  Bits4fun authored Apr 29, 2021
  
  0df0bdb6
- #40 , Implemented SRA[W] BC|DE|HL and SRAW (HL) meta instructions · 1f79d939
  Bits4fun authored Apr 29, 2021
  1f79d939
Apr 28, 2021
- #40 , Implemented SLA[W] BC|DE|HL and SLAW (HL) meta instructions · 1f4aefd2
  Bits4fun authored Apr 28, 2021
  
  1f4aefd2
- #40 , Implemented RR[W] BC|DE|HL and RRW (HL) meta instructions · 4cc97d81
  Bits4fun authored Apr 28, 2021
  
  4cc97d81
Apr 25, 2021
- #40 , Implemented RL[W] BC|DE|HL and RLW (HL) meta instructions · dbcf5eef
  Bits4fun authored Apr 25, 2021
  
  dbcf5eef
Apr 20, 2021
- #40 , Implemented LD (IX|IY+n),BC|DE|HL meta instructions · 79ae2cd2
  Bits4fun authored Apr 20, 2021
  79ae2cd2
Apr 19, 2021
- #40 , prepared test cases for LD (IX|IY+n),BC|DE|HL meta instructions · b5eb04de
  Bits4fun authored Apr 19, 2021
  
  b5eb04de
Apr 18, 2021
- #40 , implemented EX BC,DE|HL|IX|IY , EX DE,IX|IY , EX HL,IX|IY & EX IX,IY meta instructions · 03dd05b9
  Bits4fun authored Apr 18, 2021
  
  03dd05b9
Apr 17, 2021
- #40 , added test cases for LD BC|DE|HL,(IY+n) meta instructions · 3612cf57
  Bits4fun authored Apr 17, 2021
  
  3612cf57
- #40 , Implemented LD BC|DE|HL,(IX+n) meta instructions · e3ac9841
  Bits4fun authored Apr 17, 2021
  
  e3ac9841
Apr 16, 2021
- #40 , implemented LD (HL),BC & LD (HL),DE meta instructions for Z80 · 4511019e
  Bits4fun authored Apr 16, 2021
  
  4511019e
Apr 15, 2021
- #40 , implemented LD BC,(HL) & LD DE,(HL) meta instructions for Z80 · 85aac5b7
  Bits4fun authored Apr 15, 2021
  
  85aac5b7
Apr 14, 2021
- #40 Implemented LD IX,rr & LD IY,rr meta instructions. · 898dc10d
  Bits4fun authored Apr 14, 2021
  
  898dc10d
Apr 12, 2021
- #40 Implemented LD HL,rr meta instructions. · 9b6ef9d5
  Bits4fun authored Apr 12, 2021
  
  9b6ef9d5
- #40 Implemented LD DE,rr meta instructions. · 6406f37b
  Bits4fun authored Apr 12, 2021
  
  6406f37b
- #40 , first batch of ld rr,rr meta instructions · b1e8a106
  Bits4fun authored Apr 12, 2021
  
  b1e8a106
Apr 09, 2021
- Mpm reached v1.9.4 milestone · c92cd6f2
  Bits4fun authored Apr 09, 2021
  
  View commits for tag V1.9.4 V1.9.4
  
  c92cd6f2
- #39 , Implemented ADD BC|DE|HL,A and ADD BC|DE|HL,nn · 02ec53d1
  Bits4fun authored Apr 09, 2021
  
  02ec53d1
Apr 08, 2021
- #39 , Implemented NEXTREG $im8, $im8 or NEXTREG $im8, A · f757bb73
  Bits4fun authored Apr 08, 2021
  
  f757bb73
- #39 , Implemented JP (C) · 510ae858
  Bits4fun authored Apr 08, 2021
  510ae858
- #39 , Implemented MIRR | MIRROR A · fca4dd99
  Bits4fun authored Apr 08, 2021
  
  fca4dd99
- #39 , Implemented BSLA | BSRA | BSRL | BSRF | BRLC DE,B · 92e6cb9e
  Bits4fun authored Apr 08, 2021
  
  92e6cb9e
Apr 07, 2021
- #39 , Implemented mul d,e and push nn · 5284464d
  Bits4fun authored Apr 07, 2021
  
  5284464d
- #39 , Implemented... · a359a078
  Bits4fun authored Apr 07, 2021
  a359a078
- #39 , Added new ZXN CPU parser & code generator framework · 52664032
  Bits4fun authored Apr 07, 2021
  52664032
Apr 05, 2021
- Mpm reached v1.9.3 milestone · 7665b626
  Bits4fun authored Apr 05, 2021
  
  View commits for tag V1.9.3 V1.9.3
  
  7665b626
- #35 , All Range types now supported for listing file output · b8902ddb
  Bits4fun authored Apr 05, 2021
  
  b8902ddb
Apr 04, 2021
- #35 , Mpm now generates level '02' object and library file format · dd6a6601
  Bits4fun authored Apr 04, 2021
  dd6a6601
Mar 31, 2021
- #35 , Refactored ExprPcRel16(), ExprPcRel24() into common ProcessPcRelativeExpr() · 91b80a21
  Bits4fun authored Mar 31, 2021
  91b80a21