[go: up one dir, main page]

Ai et al., 2002 - Google Patents

Efficient parallel implementation of motion estimation on the computational RAM architecture

Ai et al., 2002

Document ID
5057665063987346094
Author
Ai H
Li N
Li T
Mandal M
Cockburn B
Publication year
Publication venue
IEEE CCECE2002. Canadian Conference on Electrical and Computer Engineering. Conference Proceedings (Cat. No. 02CH37373)

External Links

Snippet

Motion estimation is the most computationally intensive task in present video compression standards. Parallel processing has proved to be an efficient approach for similar kinds of applications. In this paper, we propose two parallel implementations of block-based motion …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141Discrete Fourier transforms
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51Motion estimation or motion compensation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43Hardware specially adapted for motion estimation or compensation
    • H04N19/433Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor

Similar Documents

Publication Publication Date Title
Yang et al. A family of VLSI designs for the motion compensation block-matching algorithm
US7020201B2 (en) Method and apparatus for motion estimation with all binary representation
US20040258147A1 (en) Memory and array processor structure for multiple-dimensional signal processing
JP2011509538A (en) Efficient conversion technology for video coding
KR20090105365A (en) Motion estimation device and video encoding device having same
US7486733B2 (en) Method for performing motion estimation in video encoding, a video encoding system and a video encoding device
Sousa et al. Low-power array architectures for motion estimation
Elgamel et al. A comparative analysis for low power motion estimation VLSI architectures
Ai et al. Efficient parallel implementation of motion estimation on the computational RAM architecture
Badawy et al. Algorithm-based low-power VLSI architecture for 2D mesh video-object motion tracking
Mukherjee et al. Fast adaptive motion estimation algorithm and its efficient VLSI system for high definition videos
Gao et al. Reconfigurable hardware implementation of an improved parallel architecture for MPEG-4 motion estimation in mobile applications
Hervigo et al. A multiprocessors architecture for a HDTV motion estimation system
Acken et al. An architectural design for parallel fractal compression
Rizkalla et al. Hardware implementation of Block-based Motion Estimation for real time applications
Sushmitha et al. High speed search algorithms for block-based motion estimation video compression
Roach et al. VLSI architecture for motion estimation on a single-chip video camera
Muralidhar et al. High Performance Architecture of Motion Estimation Algorithm for Video Compression
Prayline Rajabai et al. Hardware Implementation of Diamond Search Algorithm for Motion Estimation
TWI402771B (en) Fast inverse integer dct method on multi-core processor
Chien et al. Analysis and hardware architecture for global motion estimation in mpeg-4 advanced simple profile
Duanmu et al. Fast block motion estimation with 8-bit partial sums using SIMD architectures
Badawy et al. A mesh based motion tracking architecture
Fatemi et al. Fractal engine: An affine video processor core for multimedia applications
Fatemi et al. Fractal engine