[go: up one dir, main page]

Kabiri et al., 2010 - Google Patents

Design of a controllable delay line

Kabiri et al., 2010

View PDF
Document ID
6386754562872666093
Author
Kabiri A
He Q
Kermani M
Ramahi O
Publication year
Publication venue
IEEE transactions on advanced packaging

External Links

Snippet

Delay lines are used in printed circuit boards (PCBs) to produce delay between two points (or devices) while occupying as little board space as possible. As higher clock frequency is used in circuits, electromagnetic coupling between adjacent traces of delay line increases …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • G06F17/5036Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout

Similar Documents

Publication Publication Date Title
Na et al. Modeling and transient simulation of planes in electronic packages
Rubin et al. Study of meander line delay in circuit boards
Ferranti et al. Multipoint full-wave model order reduction for delayed PEEC models with large delays
CN109492326B (en) PCB signal integrity simulation system based on cloud technology and simulation method thereof
Kabiri et al. Design of a controllable delay line
Ramahi et al. A simple finite-difference frequency-domain (FDFD) algorithm for analysis of switching noise in printed circuit boards and packages
Dolatsara et al. A hybrid methodology for jitter and eye estimation in high-speed serial channels using polynomial chaos surrogate models
Roy et al. Efficient modeling of power/ground planes using delay-extraction-based transmission lines
Cheng et al. Enhanced microstrip guard trace for ringing noise suppression using a dielectric superstrate
Suzuki et al. A synthesis technique of time-domain interconnect models by MIMO type of selective orthogonal least-square method
Ravelo et al. Fast estimation of RL‐loaded microelectronic interconnections delay for the signal integrity prediction
Kim et al. Modeling of eye-diagram distortion and data-dependent jitter in meander delay lines on high-speed printed circuit boards (PCBs) based on a time-domain even-mode and odd-mode analysis
Park Simple shielding evaluation method of small shield cans on printed circuit boards in mobile devices
Roy et al. Macromodeling of multilayered power distribution networks based on multiconductor transmission line approach
Kim et al. TraceFormer: s-parameter prediction framework for PCB traces based on graph transformer
Zhao et al. Fast contour integral equation method for wideband power integrity analysis
Araneo et al. Two-port equivalent of PCB discontinuities in the wavelet domain
Deutsch et al. Application of the short-pulse propagation technique for broadband characterization of PCB and other interconnect technologies
McBride et al. Modeling and simulation of 12.5 Gb/s on a HyperBGA/sup/spl reg//package
Rayas-Sánchez A frequency-domain approach to interconnect crosstalk simulation and minimization
Sun et al. Compromise impedance match design for pogo pins with different single-ended and differential signal-ground patterns
Umekawa Simple modeling method of EMI simulation for PCB
Barnes et al. Benchmarking and Reproducibility in Computational and Experimental Characterization of Electronic Packages for Signal/Power Integrity: Four benchmarks serve as standardized cases
Thompson et al. Challenges and methodologies in EM simulation with circuit models
Rimolo-Donadio Development, validation, and application of semi-analytical interconnect models for efficient simulation of multilayer substrates