[go: up one dir, main page]

Niemiec et al., 2019 - Google Patents

A survey on FPGA support for the feasible execution of virtualized network functions

Niemiec et al., 2019

Document ID
8767172126396280876
Author
Niemiec G
Batista L
Schaeffer-Filho A
Nazar G
Publication year
Publication venue
IEEE Communications Surveys & Tutorials

External Links

Snippet

Network Functions Virtualization (NFV) has received considerable attention in the past few years, both from industry and academia, due to its potential for reducing capital and operational expenditures, thus enabling faster innovation in networks. NFV proposes …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/44—Arrangements for executing specific programmes
    • G06F9/455—Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55—Detecting local intrusion or implementing counter-measures
    • G06F21/56—Computer malware detection or handling, e.g. anti-virus arrangements
    • G06F21/562—Static detection
    • G06F21/563—Static detection by source code analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls
    • H04L63/0227—Filtering policies
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • H04L45/745—Address table lookup or address filtering
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformations of program code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06N—COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N99/00—Subject matter not provided for in other groups of this subclass

Similar Documents

Publication Publication Date Title
Niemiec et al. A survey on FPGA support for the feasible execution of virtualized network functions
Linguaglossa et al. Survey of performance acceleration techniques for network function virtualization
Xu et al. A survey on regular expression matching for deep packet inspection: Applications, algorithms, and hardware platforms
Kfoury et al. A comprehensive survey on smartnics: Architectures, development models, applications, and research directions
US11588734B2 (en) Systems for providing an LPM implementation for a programmable data plane through a distributed algorithm
US11258707B1 (en) Systems for building data structures with highly scalable algorithms for a distributed LPM implementation
US20070266370A1 (en) Data Plane Technology Including Packet Processing for Network Processors
Cao et al. P4 to FPGA-a fast approach for generating efficient network processors
Pacífico et al. Application layer packet classifier in hardware
Sankaran et al. P4 and NetFPGA-based secure in-network computing architecture for AI-enabled industrial Internet of Things
Lopes et al. VNFAccel: An FPGA-based platform for modular VNF components acceleration
Barbareschi et al. Malicious traffic analysis on mobile devices: a hardware solution
Park et al. Reinhardt: Real-time reconfigurable hardware architecture for regular expression matching in dpi
Nickel et al. A survey on architectures, hardware acceleration and challenges for in-network computing
Lopes et al. Modular vnf components acceleration with fpga overlays
Wang et al. A modular NFA architecture for regular expression matching
Hamadi et al. Compiling packet forwarding rules for switch pipelined architecture
Brandino Data plane programming in networks.
Han Enabling Flexible and High-Performance Networking With FPGA-Based SmartNICs
Soewito et al. Hybrid pattern matching for trusted intrusion detection
Soewito et al. High-speed string matching for network intrusion detection
Fukuda et al. Fpga-based parallel pattern matching
Baláž et al. Accelerating SDN control plane with GPGPU-based packet classification
Zolfaghari Flexible Low-Area Hardware Architectures for Packet Processing in Software-Defined Networks
Mahajan et al. Implementing high-speed string matching hardware for network intrusion detection systems