[go: up one dir, main page]

Bogumilowicz et al., 2013 - Google Patents

Realization and characterization of thin single crystal Ge films on sapphire

Bogumilowicz et al., 2013

View PDF
Document ID
8806358441394625978
Author
Bogumilowicz Y
Abbadie A
Klinger V
Benaissa L
Gergaud P
Rouchon D
Maurois C
Lecouvey C
Blanc N
Charles-Alfred C
Drouin A
Ghyselen B
Wekkeli A
Dimroth F
Carron V
Publication year
Publication venue
Semiconductor science and technology

External Links

Snippet

We have successfully produced and characterized thin single crystal Ge films on sapphire substrates (GeOS). Such a GeOS template offers a cost-effective alternative to bulk germanium substrates for applications where only a thin (< 2 µm) Ge layer is needed for …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L31/00Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies; Multistep manufacturing processes therefor characterised by the materials of which they are formed

Similar Documents

Publication Publication Date Title
Chugh et al. Flow modulation epitaxy of hexagonal boron nitride
Ma et al. Heteroepitaxial growth of thick α-Ga2O3 film on sapphire (0001) by MIST-CVD technique
Murata et al. Atomically smooth gallium nitride surfaces prepared by chemical etching with platinum catalyst in water
Amamou et al. Large area epitaxial germanane for electronic devices
Geng et al. Identification of subsurface damage of 4H-SiC wafers by combining photo-chemical etching and molten-alkali etching
Khoury et al. Imaging and counting threading dislocations in c-oriented epitaxial GaN layers
Kim et al. Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers
Tijent et al. integration methods of GaN and diamond for thermal management optimization
Bogumilowicz et al. Realization and characterization of thin single crystal Ge films on sapphire
Jahandar et al. The effect of Ge precursor on the heteroepitaxy of Ge1− xSnx epilayers on a Si (001) substrate
Loo et al. Epitaxial growth of active Si on top of SiGe etch stop layer in view of 3D device integration
Masolin et al. Defects in Si foils fabricated by spalling at low temperature: electrical activity and atomic nature
Jovanovic et al. Epitaxial thin film transfer for flexible devices from reusable substrates
Nagata et al. Effects of low temperature buffer layer on all-sputtered epitaxial GaN/AlN film on Si (111) substrate
Hattori et al. Enhancement of photoluminescence efficiency from GaN (0001) by surface treatments
Wang et al. Control wafer bow of InGaP on 200 mm Si by strain engineering
Zaumseil et al. A complex x-ray structure characterization of Ge thin film heterostructures integrated on Si (001) by aspect ratio trapping and epitaxial lateral overgrowth selective chemical vapor deposition techniques
Liu et al. Improvement of (11-22) GaN on m-Plane Sapphire With CrN Interlayer by Using Molecular Beam Epitaxy
Masumoto et al. Reducing warpage of thick 4H-SiC epitaxial layers by grinding the back of the substrate
Yamamoto et al. High Crystallinity Ge Growth on Si (111) and Si (110) by Using Reduced Pressure Chemical Vapor Deposition
Guo et al. Influence of Fe in the buffer layer on the laser lift-off of AlGaN/GaN HEMT film: phenomena and mechanism
Kou et al. Homoepitaxial Growth of InP on Electrochemical Etched Porous InP Surface
Zheng et al. Residual strains and optical properties of ZnO thin epilayers grown on r-sapphire planes
Kang et al. Growth of compositionally uniform InxGa1− xN layers with low relaxation degree on GaN by molecular beam epitaxy
Hsieh et al. Contamination reduction for 150 mm SiC substrates by integrating CMP and Post-CMP cleaning