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Jeannerod et al., 2012 - Google Patents

Simultaneous floating-point sine and cosine for VLIW integer processors

Jeannerod et al., 2012

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Document ID
1066547406486335940
Author
Jeannerod C
Jourdan-Lu J
Publication year
Publication venue
2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors

External Links

Snippet

Graphics and signal processing applications often require that sines and cosines be evaluated at a same floating-point argument, and in such cases a very fast computation of the pair of values is desirable. This paper studies how 32-bit VLIW integer architectures can …
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Classifications

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