[go: up one dir, main page]

Carta et al., 2007 - Google Patents

A control theoretic approach to energy-efficient pipelined computation in mpsocs

Carta et al., 2007

View PDF
Document ID
10716992863169465887
Author
Carta S
Alimonda A
Pisano A
Acquaviva A
Benini L
Publication year
Publication venue
ACM Transactions on Embedded Computing Systems (TECS)

External Links

Snippet

In this work, we describe a control theoretic approach to dynamic voltage/frequency scaling (DVFS) in a pipelined MPSoC architecture with soft real-time constraints, aimed at minimizing energy consumption with throughput guarantees. Theoretical analysis and …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
    • G06F1/324Power saving by lowering clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. INCLUDING HOUSING AND APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use
    • Y02B60/10Energy efficient computing
    • Y02B60/12Reducing energy-consumption at the single machine level, e.g. processors, personal computers, peripherals, power supply
    • Y02B60/1207Reducing energy-consumption at the single machine level, e.g. processors, personal computers, peripherals, power supply acting upon the main processing unit
    • Y02B60/1217Frequency modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. INCLUDING HOUSING AND APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use
    • Y02B60/10Energy efficient computing
    • Y02B60/12Reducing energy-consumption at the single machine level, e.g. processors, personal computers, peripherals, power supply
    • Y02B60/1278Power management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. INCLUDING HOUSING AND APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use
    • Y02B60/10Energy efficient computing
    • Y02B60/16Reducing energy-consumption in distributed systems

Similar Documents

Publication Publication Date Title
Ma et al. PGCapping: Exploiting power gating for power capping and core lifetime balancing in CMPs
Fu et al. Feedback thermal control of real-time systems on multicore processors
Paul et al. Cooperative boosting: Needy versus greedy power management
Keramidas et al. Interval-based models for run-time DVFS orchestration in superscalar processors
Lang et al. Rethinking query processing for energy efficiency: Slowing down to win the race.
Das et al. Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones
US20090210740A1 (en) Off-chip access workload characterization methodology for optimizing computing efficiency
Sakamoto et al. Production hardware overprovisioning: Real-world performance optimization using an extensible power-aware resource management framework
Fu et al. Utilization-controlled task consolidation for power optimization in multi-core real-time systems
Carta et al. A control theoretic approach to energy-efficient pipelined computation in mpsocs
Leva et al. Event-based power/performance-aware thermal management for high-density microprocessors
Koutsovasilis et al. The impact of cpu voltage margins on power-constrained execution
Alimonda et al. A feedback-based approach to dvfs in data-flow applications
Ma et al. DPPC: dynamic power partitioning and control for improved chip multiprocessor performance
Gupta et al. Dynamic workload-aware DVFS for multicore systems using machine learning
Zoni et al. All-digital control-theoretic scheme to optimize energy budget and allocation in multi-cores
Conoci et al. On power capping and performance optimization of multithreaded applications
Paul Dynamic power management for ubiquitous network devices
Jha et al. Chrysso: An integrated power manager for constrained many-core processors
Jang et al. Workload-aware optimal power allocation on single-chip heterogeneous processors
Wang et al. Cache latency control for application fairness or differentiation in power-constrained chip multiprocessors
Götz et al. Energy-efficient data processing at sweet spot frequencies
Bambini et al. Modeling the thermal and power control subsystem in HPC processors
Kuang et al. Optimizing throughput and latency under given power budget for network packet processing
Chen et al. TACLC: Timing-aware cache leakage control for hard real-time systems