[go: up one dir, main page]

Steele, 1989 - Google Patents

Ground bounce in CMOS ASICs

Steele, 1989

Document ID
11511036343165410674
Author
Steele D
Publication year
Publication venue
Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,

External Links

Snippet

A study has been undertaken to investigate the ground bounce phenomena in CMOS ASICs (application-specific integrated circuits). A simple mathematical analysis was performed to help gain an intuitive understanding of the problem. SPICE simulations were then performed …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices using field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. varying supply voltage
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making or -braking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit

Similar Documents

Publication Publication Date Title
Senthinathan et al. Simultaneous switching ground noise calculation for packaged CMOS devices
US5214320A (en) System and method for reducing ground bounce in integrated circuit output buffers
US5623216A (en) Output buffer current slew rate control integrated circuit
Al-Sarawi Low power Schmitt trigger circuit
US5841296A (en) Programmable delay element
US7449913B1 (en) Pre-driver having slew-rate and crowbar-current controls for a CMOS output buffer
US5570046A (en) Lead frame with noisy and quiet VSS and VDD leads
US7196547B2 (en) Level shifter and buffer circuit
US6239616B1 (en) Programmable delay element
KR20020034910A (en) Output drivers for integrated-circuit chips with vccq supply compensation
CN116718901B (en) Anti-fuse FPGA high-speed test circuit
Jou et al. Low switching noise and load-adaptive output buffer design techniques
US7425849B2 (en) Low noise output buffer capable of operating at high speeds
US20240210472A1 (en) Hold time improved low area flip-flop architecture
Steele Ground bounce in CMOS ASICs
JPH0882658A (en) Device and method for testing electrostatic current for current operating logic circuit
US6906550B2 (en) Modable dynamic terminator for high speed digital communications
US5254890A (en) Ground bouncing reducing circuit and method
EP1977261A2 (en) Method of evaluating a delay of an input/output circuit and corresponding device
US20030214325A1 (en) Increasing drive strength and reducing propagation delays through the use of feedback
JPS58196725A (en) Cmos output circuit
Sharroush Performance optimization of MOS current-mode logic
US6107854A (en) Variable speed path circuit and method
Yang et al. Modelling and analysis of ground bounce due to internal gate switching
US7212060B1 (en) Ground bounce protection circuit for a test mode pin