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Preiss et al., 2009 - Google Patents

Advanced clockgating schemes for fused-multiply-add-type floating-point units

Preiss et al., 2009

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Document ID
12002409084096265461
Author
Preiss J
Boersma M
Mueller S
Publication year
Publication venue
2009 19th IEEE Symposium on Computer Arithmetic

External Links

Snippet

The paper introduces fine-grain clockgating schemes for fused multiply-add-type floating- point units (FPU). The clockgating is based on instruction type, precision and operand values. The presented schemes focus on reducing the power at peak performance, where …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

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    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/533Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
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    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/53Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
    • G06F1/3237Power saving by disabling clock generation or distribution
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    • G06F7/499Denomination or exception handling, e.g. rounding, overflow
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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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