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Fell et al., 2014 - Google Patents

Force-directed scheduling for data flow graph mapping on coarse-grained reconfigurable architectures

Fell et al., 2014

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Document ID
12342031390050575098
Author
Fell A
Rákossy Z
Chattopadhyay A
Publication year
Publication venue
2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

External Links

Snippet

In terms of energy and flexibility, Coarse-Grained Reconfigurable Architectures (CGRA) are proven to be advantageous over fine-grained architectures, massively parallel GPUs and generic CPUs. However the key challenge of programmability is preventing wide-spread …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

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    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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