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Wang et al., 2024 - Google Patents

Don't Repeat Yourself! Coarse-Grained Circuit Deduplication to Accelerate RTL Simulation

Wang et al., 2024

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Document ID
13460303230228169269
Author
Wang H
Nijssen T
Beamer S
Publication year
Publication venue
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4

External Links

Snippet

Designing a digital integrated circuit requires many register transfer level (RTL) simulations for design, debugging, and especially verification. To cope with the slow speed of RTL simulation, industry frequently uses private server farms to run many simulations in parallel …
Continue reading at dl.acm.org (PDF) (other versions)

Classifications

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    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5081Layout analysis, e.g. layout verification, design rule check
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