Beichler et al., 2017 - Google Patents
Optimization of a novel WLAN Simulation Framework for Prototyping Network Applications and Protocols.Beichler et al., 2017
View PDF- Document ID
- 15058976806751091927
- Author
- Beichler B
- Rethfeldt M
- Raddatz H
- Konieczek B
- Danielis P
- Haubelt C
- Timmermann D
- Publication year
- Publication venue
- MBMV
External Links
Snippet
Over the last few years, various types of wireless local area network (WLAN) infrastructures have been developed and established, taking into account the requirements of different kinds of applications and features, like scalability, robustness, energy-efficiency, and …
- 238000004088 simulation 0 title abstract description 84
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogramme communication; Intertask communication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/44—Arrangements for executing specific programmes
- G06F9/455—Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
- G06F15/163—Interprocessor communication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Programme control for peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US12405843B2 (en) | Infrastructure processing unit | |
| US10095645B2 (en) | Presenting multiple endpoints from an enhanced PCI express endpoint device | |
| CN103744716B (en) | A kind of dynamically interruption Well-Balanced Mapping method based on current VCPU dispatch state | |
| US7802025B2 (en) | DMA engine for repeating communication patterns | |
| US11537430B1 (en) | Wait optimizer for recording an order of first entry into a wait mode by a virtual central processing unit | |
| US11675633B2 (en) | Virtualised gateways | |
| CN102799465B (en) | Virtual interrupt management method and device of distributed virtual system | |
| CN105359098A (en) | Dynamic Reconfiguration of Applications on Multiprocessor Embedded Systems | |
| US20230205585A1 (en) | Elevated Isolation of Reconfigurable Data Flow Resources in Cloud Computing | |
| JP7615474B2 (en) | Computing device and method for handling interrupts - Patents.com | |
| Li et al. | SimBricks: end-to-end network system evaluation with modular simulation | |
| CN103957233A (en) | Real-time communication platform based on processor nucleus dividing and virtual machine | |
| WO2016171739A1 (en) | Multi-processor computing systems | |
| EP4148568A1 (en) | Method for realizing live migration, chip, board, and storage medium | |
| TWI403955B (en) | Device,method and system for audio subsystem sharing in a virtualized environment | |
| KR101704751B1 (en) | Apparatus for simulating of multi-core system by using timing information between modules, and method thereof | |
| US11003618B1 (en) | Out-of-band interconnect control and isolation | |
| CN111459620B (en) | Information scheduling method from secure container operating system to virtual machine monitor | |
| US20180097747A1 (en) | Processor designed for a deterministic switched ethernet network | |
| Bhat et al. | Issues in using heterogeneous HPC systems for embedded real time signal processing applications | |
| US11531578B1 (en) | Profiling and debugging for remote neural network execution | |
| US11119787B1 (en) | Non-intrusive hardware profiling | |
| US10803007B1 (en) | Reconfigurable instruction | |
| Beichler et al. | Optimization of a novel WLAN Simulation Framework for Prototyping Network Applications and Protocols. | |
| US11042494B1 (en) | Direct injection of a virtual interrupt |