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Sun et al., 2011 - Google Patents

A high-performance 8-tap FIR filter using logarithmic number system

Sun et al., 2011

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Document ID
15059499429801351994
Author
Sun Y
Kim M
Publication year
Publication venue
2011 IEEE International Conference on Communications (ICC)

External Links

Snippet

This paper presents an approach for implementing a 8-tap high-performance digital FIR (Finite Impulse Response) filter using Logarithmic Number System (LNS). In the past, FIR filters were implemented by conventional number system; therefore, the speed was limited …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

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    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
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    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
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    • G06F7/52—Multiplying; Dividing
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    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
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