Sundararajan et al., 2000 - Google Patents
XVPI: A portable hardware/software interface for virtexSundararajan et al., 2000
- Document ID
- 16555021119027794993
- Author
- Sundararajan P
- Guccione S
- Publication year
- Publication venue
- Reconfigurable Technology: FPGAs for Computing and Applications II
External Links
Snippet
XVPI, the Xilinx Virtex Portable Interface, is a hardware/software interface and specification to assist in the design and implementation of Xilinx Virtex (tm) based systems. XVPI specifies a software accessible register to be defined in the hardware. This register contains all of the …
- 230000002104 routine 0 abstract description 10
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5045—Circuit design
- G06F17/5054—Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/44—Arrangements for executing specific programmes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
- G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored programme computers comprising a single central processing unit with reconfigurable architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
- G06F1/3234—Action, measure or step performed to reduce power consumption
- G06F1/3237—Power saving by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/68—Processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0241946B1 (en) | Information processing system | |
| US8412918B1 (en) | Booting mechanism for FPGA-based embedded system | |
| Cadambi et al. | Managing pipeline-reconfigurable FPGAs | |
| US6678644B1 (en) | Integrated circuit models having associated timing exception information therewith for use with electronic design automation | |
| McMillan et al. | Partial run-time reconfiguration using JRTR | |
| US20070283311A1 (en) | Method and system for dynamic reconfiguration of field programmable gate arrays | |
| KR20020097161A (en) | Computer system initialization via boot code stored in sequential access memory | |
| WO2002031653A2 (en) | System, method, and article of manufacture for emulating a microprocessor in reconfigurable logic | |
| US10691856B1 (en) | System design flow with runtime customizable circuits | |
| JP3990332B2 (en) | Data processing system | |
| Peeters et al. | Synchronous handshake circuits | |
| Guccione et al. | Design advantages of run-time reconfiguration | |
| US20070129924A1 (en) | Partitioning of tasks for execution by a VLIW hardware acceleration system | |
| Sundararajan et al. | XVPI: A portable hardware/software interface for virtex | |
| US9805152B1 (en) | Compilation of system designs | |
| US6665766B1 (en) | Adaptable configuration interface for a programmable logic device | |
| CN106843973B (en) | A method of transplanting embedded system simultaneously starts in SD card | |
| JP2004334429A (en) | Logic circuit and program executed on the logic circuit | |
| Edwards | SHIM: A language for hardware/software integration | |
| US7908465B1 (en) | Hardware emulator having a selectable write-back processor unit | |
| US7877575B2 (en) | Microprocessor | |
| US7657689B1 (en) | Methods and apparatus for handling reset events in a bus bridge | |
| TW200404256A (en) | Control word hoisting | |
| Karatsu | VLSI design language standardization effort in Japan | |
| Haug et al. | Reconfigurable hardware as shared resource in multipurpose computers |