Chatzitsompanis et al., 2023 - Google Patents
On the facilitation of voltage over-scaling and minimization of timing errors in floating-point multipliersChatzitsompanis et al., 2023
View PDF- Document ID
- 16814253884109545931
- Author
- Chatzitsompanis G
- Karakonstantis G
- Publication year
- Publication venue
- 2023 IEEE 29th international symposium on on-line testing and robust system design (IOLTS)
External Links
Snippet
Voltage over-scaling (VoS) may be one of the most effective power reduction approaches, however, it makes circuits susceptible to timing failures. Various techniques were proposed to facilitate VoS by detecting and correcting errors and moving away from traditional voltage …
Classifications
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- G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
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