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Schliecker et al., 2008 - Google Patents

Reliable performance analysis of a multicore multithreaded system-on-chip

Schliecker et al., 2008

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Document ID
17389552190137731613
Author
Schliecker S
Negrean M
Nicolescu G
Paulin P
Ernst R
Publication year
Publication venue
Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis

External Links

Snippet

Formal performance analysis is now regularly applied in the design of distributed embedded systems such as automotive electronics, where it greatly contributes to an improved predictability and platform robustness of complex networked systems. Even though it might …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

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    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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