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Packirisamy et al., 2009 - Google Patents

Exploring speculative parallelism in SPEC2006

Packirisamy et al., 2009

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Document ID
1906779162408940112
Author
Packirisamy V
Zhai A
Hsu W
Yew P
Ngai T
Publication year
Publication venue
2009 IEEE International Symposium on Performance Analysis of Systems and Software

External Links

Snippet

The computer industry has adopted multi-threaded and multi-core architectures as the clock rate increase stalled in early 2000's. It was hoped that the continuous improvement of single- program performance could be achieved through these architectures. However, traditional …
Continue reading at conservancy.umn.edu (PDF) (other versions)

Classifications

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