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Tsai et al., 1999 - Google Patents

Effect of bottom electrode materials on the electrical and reliability characteristics of (Ba, Sr) TiO/sub 3/capacitors

Tsai et al., 1999

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Document ID
2827903066431575254
Author
Tsai M
Sun S
Tseng T
Publication year
Publication venue
IEEE Transactions on Electron Devices

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Snippet

The dielectric constant and the leakage current density of (Ba, Sr) TiO/sub 3/(BST) thin films deposited on various bottom electrode materials (Pt, Ir, IrO/sub 2//Ir, Ru, RuO/sub 2//Ru) before and after annealing in O/sub 2/ambient were investigated. The improvement of …
Continue reading at ir.lib.nycu.edu.tw (PDF) (other versions)

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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
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    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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