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Koser et al., 2016 - Google Patents

A chip-level redundant threading (CRT) scheme for shared-memory protection

Koser et al., 2016

Document ID
3794794077008960267
Author
Koser E
Berthold K
Pujari R
Stechele W
Publication year
Publication venue
2016 International Conference on High Performance Computing & Simulation (HPCS)

External Links

Snippet

Chip-level Redundant Threading (CRT) is a generic approach employed in multi-core architectures to meet reliability or functional safety requirements of applications. Critical tasks are concurrently executed on several processing elements (PEs). Most approaches …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
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