[go: up one dir, main page]

Hsu et al., 2013 - Google Patents

Test data analytics—Exploring spatial and test-item correlations in production test data

Hsu et al., 2013

View PDF
Document ID
390681091798552954
Author
Hsu C
Lin F
Cheng K
Zhang W
Li X
Carulli J
Butler K
Publication year
Publication venue
2013 IEEE International Test Conference (ITC)

External Links

Snippet

The discovery of patterns and correlations hidden in the test data could help reduce test time and cost. In this paper, we propose a methodology and supporting statistical regression tools that can exploit and utilize both spatial and inter-test-item correlations in the test data …
Continue reading at users.ece.cmu.edu (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequence
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31718—Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06N—COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N99/00—Subject matter not provided for in other groups of this subclass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06K—RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K9/00—Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
    • G06K9/62—Methods or arrangements for recognition using electronic means
    • G06K9/6217—Design or setup of recognition systems and techniques; Extraction of features in feature space; Clustering techniques; Blind source separation

Similar Documents

Publication Publication Date Title
Hsu et al. Test data analytics—Exploring spatial and test-item correlations in production test data
US12320844B2 (en) Integrated circuit profiling and anomaly detection
Stratigopoulos Machine learning applications in IC testing
JP2010226125A (en) Method and apparatus for semiconductor testing
Jiang et al. A Gaussian mixture model clustering ensemble regressor for semiconductor manufacturing final test yield prediction
KR20080003456A (en) Data Analysis Method and Apparatus
Barragan et al. Efficient selection of signatures for analog/RF alternate test
US11105855B2 (en) Tester and method for testing a device under test and tester and method for determining a single decision function
Kupp et al. Spatial estimation of wafer measurement parameters using gaussian process models
Lindermeir et al. Analog testing by characteristic observation inference
Huang et al. Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests
Milor A survey of yield modeling and yield enhancement methods
Yilmaz et al. Per-device adaptive test for analog/RF circuits using entropy-based process monitoring
US9904660B1 (en) Nonparametric method for measuring clustered level of time rank in binary data
CN109145460A (en) A kind of semiconductor reliability appraisal procedure and device
Lin et al. Learning from production test data: Correlation exploration and feature engineering
Lin et al. Feature engineering with canonical analysis for effective statistical tests screening test escapes
US8190391B2 (en) Determining die performance by incorporating neighboring die performance metrics
Deyati et al. Adaptive testing of analog/RF circuits using hardware extracted FSM models
Marinissen et al. Adapting to adaptive testing
JP7712473B2 (en) System and method for multi-dimensional dynamic part average testing - Patents.com
Larguech et al. A generic methodology for building efficient prediction models in the context of alternate testing
US11152235B2 (en) Apparatus and method for manufacture of semiconductor devices
Huang et al. On combining alternate test with spatial correlation modeling in analog/RF ICs
Yeh et al. Prediction of the test yield of future integrated circuits through the deductive estimation method