CN104079840B - Image sensor - Google Patents

Abstract

An image sensor includes a pixel array, a readout circuit, and a voltage drop control circuit. The pixel array is composed of a plurality of rows and a plurality of columns of photosensitive elements. The reading circuit is coupled to the pixel array and comprises a plurality of column amplifiers, wherein each column amplifier is respectively coupled to a row of photosensitive elements of the pixel array and is used for generating a corresponding sensing voltage. The voltage drop control circuit is coupled between the reading circuit and a power line and used for isolating a power supply voltage drop generated by the power line for the reading circuit, so that each row amplifier of the reading circuit receives area voltages with the same size through the voltage drop control circuit, wherein the row amplifiers of the reading circuit are coupled to the voltage drop control circuit.

Description

image sensor

technical field

The present invention relates to an image sensor, in particular to an image sensor capable of effectively avoiding IR-drop.

Background technique

Image sensors (Image Sensor) have become an essential part of today's electronic products, ranging from mobile phone camera modules, notebook computer network cameras, digital cameras, video cameras to security monitoring systems, etc., have their related applications.

Image sensors generate images through pixel arrays. The pixel array is composed of photosensitive elements in multiple rows and columns. Each photosensitive element is used to receive light and generate a voltage (charge) proportional to the light intensity to reflect the image of the object being photographed.

However, as the resolution requirements of image sensors are getting higher and higher, the number of rows and columns of the pixel array is also increasing accordingly. When the number of columns of the pixel array is increased, the length of the power supply line for coupling to the power supply of the back-end reading circuit of the pixel array must also be extended, thereby causing the problem of a non-negligible power supply voltage drop (IR-drop), making Individual identical column amplifiers in the read circuit may behave differently, compromising the resulting image quality.

Therefore, there is a need for an image sensor that can effectively avoid power supply voltage drop.

Contents of the invention

According to an embodiment of the present invention, an image sensor includes a pixel array, a reading circuit, and a voltage drop control circuit. The pixel array is composed of photosensitive elements in multiple rows and columns. The readout circuit is coupled to the pixel array and includes a plurality of column amplifiers, wherein each column amplifier is respectively coupled to a column of photosensitive elements of the pixel array for generating a corresponding sensing voltage. The voltage drop control circuit is coupled between the reading circuit and a power line, and is used to isolate a power supply voltage drop generated by the power line for the reading circuit, so that each column amplifier of the reading circuit receives the voltage drop through the voltage drop control circuit. Area voltages of equal magnitude, wherein the column amplifiers of the read circuit are coupled to the voltage drop control circuit.

According to another embodiment of the present invention, an image sensor includes a pixel array, a reading circuit, and a voltage drop control circuit. The pixel array is composed of photosensitive elements in multiple rows and columns. The readout circuit is coupled to the pixel array and includes a plurality of column amplifiers, wherein each column amplifier is respectively coupled to a column of photosensitive elements of the pixel array for generating a corresponding sensing voltage. The voltage drop control circuit includes a plurality of transistors coupled in parallel between the reading circuit and a power supply line to isolate a power supply voltage drop generated by the power supply line for the reading circuit, so that each column amplifier of the reading circuit passes through the voltage drop The control circuit receives the area voltages of equal magnitude, wherein the column amplifiers of the read circuit are coupled to one of the transistors.

Description of drawings

FIG. 1 is a block diagram showing an image sensor according to an embodiment of the invention.

FIG. 2 is a partial circuit diagram showing an image sensor according to an embodiment of the invention.

FIG. 3 is a partial circuit diagram of an image sensor according to another embodiment of the invention.

FIG. 4 is a partial circuit diagram showing an image sensor according to yet another embodiment of the present invention.

FIG. 5 is a partial circuit diagram showing an image sensor according to yet another embodiment of the present invention.

detailed description

In order to make the manufacture, operation method, objectives and advantages of the present invention more obvious and easy to understand, several preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

Example:

FIG. 1 is a block diagram showing an image sensor according to an embodiment of the invention. It should be noted that, for simplicity of description, only blocks and elements related to the present invention are shown in FIG. 1 . As understood by those skilled in the art, the image sensor may include other blocks and elements not shown in FIG. 1 , so the present invention is not limited to what is shown in FIG. 1 .

According to an embodiment of the present invention, the image sensor 100 may at least include a pixel array 110 , a reading circuit 120 and a power supply circuit 130 . The pixel array 110 can be composed of a plurality of columns and rows of photosensitive elements to receive light and generate a voltage (charge) proportional to the light intensity to reflect the image of the object being photographed . The readout circuit 120 is coupled to the pixel array 110 and includes a plurality of column amplifiers (column amplifier) 120-(1), 120-(2), 120-(3)...120-(n-1) and 120-( n), wherein each column amplifier has the same circuit structure and is respectively coupled to a column of photosensitive elements of the pixel array 110 for generating a corresponding sensing voltage. The power supply circuit 130 is coupled to the reading circuit 120 for supplying power to the reading circuit 120 and avoiding a power voltage drop (IR-drop) generated by the power line.

The column amplifiers 120-(1), 120-(2), 120-(3)...120-(n−1) and 120-(n) of the reading circuit 120 need to receive power from the power line. Since the column amplifiers 120-(1), 120-(2), 120-(3)...120-(n-1) and 120-(n) have the same circuit structure and receive power from the same power line, therefore Ideally, the voltages at each node of each column amplifier must be the same so that each column amplifier can have consistent operating behavior. However, when the number of column amplifiers in the readout circuit is large (in other words, the size of the pixel array is large), the length of the power supply line must also be extended, resulting in the problem of a non-negligible power supply voltage drop (IR-drop) . For example, the power voltages received by the two farthest column amplifiers may be different. As a result, identical column amplifiers in the readout circuit may behave differently, compromising the resulting image quality.

FIG. 2 is a partial circuit diagram showing an image sensor according to an embodiment of the invention. In order to solve the problem of IR-drop, the power supply circuit 130 of the image sensor 100 proposed by the present invention further includes an IR-drop control circuit in addition to the power line. According to an embodiment of the present invention, each column amplifier of the reading circuit 120 is coupled to the voltage drop control circuit for receiving power from the power line through the voltage drop control circuit, wherein the voltage drop control circuit can isolate the voltage generated by the power line Supply voltage drop (IR-drop). The following paragraphs will introduce the voltage drop control circuit proposed by the present invention in more detail through multiple different embodiments.

According to an embodiment of the present invention, the power supply circuit 130 may include a voltage drop control circuit 230 and a power line 250 . The voltage drop control circuit 230 includes n transistors coupled in parallel, wherein the number n of transistors is equal to the number n of column amplifiers of the reading circuit, and n is a positive integer. In this way, the column amplifiers of the read circuit can each be coupled to a corresponding transistor, and the transistor is used to generate an area voltage with no power supply voltage drop (IR-drop free), and provide the area voltage to the corresponding column amplifier. . In other words, each column amplifier of the reading circuit can receive the same area voltage through the voltage drop control circuit 230 . In a preferred embodiment of the present invention, the plurality of transistors of the voltage drop control circuit 230 may be NMOS transistors.

As shown in FIG. 2 , the power line 250 is coupled to the voltage drop control circuit 230 for supplying the system operating voltage VDD. The transistor T(i) includes a first terminal coupled to the power line 250 and a second terminal coupled to the column amplifier 220-(i), wherein i is a positive integer. Likewise, the transistor T(i+1) includes a first terminal coupled to the power line 250 and a second terminal coupled to the column amplifier 220-(i+1). In addition, a control electrode of the transistor T(i) and the transistor T(i+1) are both coupled to the reference voltage V _G . The column amplifiers 220 -(i) and 220 -(i+1) have substantially the same circuit structure, wherein the column amplifiers 220 -(i) and 220 -(i+1) may respectively include an operational amplifier. Here, the operational amplifier is a differential amplifier, which has a pair of differential input terminals inp(i) and inn(i), and inp(i+1) and inn(i+1) respectively. Each pair of differential input terminals can be coupled to one column of the pixel array for sensing the magnitude of the voltage generated by the photosensitive element. The operational amplifier further outputs the sensing voltage to the next stage circuit (for example, an analog-to-digital converter) through the output terminals out(i) and out(i+1) respectively.

According to an embodiment of the present invention, each transistor of the voltage drop control circuit 230 can be supplied with a power supply voltage according to the reference voltage V _G and the constant current sources (for example, Itail(i) and Itail(i+1)) in each column amplifier. The terminals (for example, Np(i) and Np(i+1)) generate a region voltage with no power supply voltage drop (IR-drop free). Since the reference voltage V _G is directly supplied to the gates of each transistor, the current on the wire of the reference voltage V _G is almost zero, so there is no current voltage drop; and the supply voltage supply terminals (for example, Np(i) and Np( The voltage of i+1)) is the reference voltage minus a valve voltage, so there is no problem of current voltage drop, and at the same time, the current in each column amplifier is substantially the same, therefore, at the power supply voltage supply terminal (for example, Np( The area voltage generated by i) and Np(i+1)) is also a constant voltage, which will not be affected by the power voltage drop of the system operating voltage VDD supplied by the power line 250 . In this way, the voltages of the nodes inside the column amplifiers of the reading circuit will be consistent, and the operation behavior will also be consistent, which effectively solves the problem of image quality degradation caused by the power supply voltage drop of the system operating voltage VDD.

It should be noted that, in the embodiment of the present invention, a base of each transistor of the voltage drop control circuit 230 can be further coupled to the source (the first or second pole as described above) or the ground, wherein when When the base is coupled to the source, the body effect of the transistor can be eliminated. In addition, in this embodiment, since each column amplifier of the readout circuit only needs to be coupled with one additional transistor, the circuit design is quite simple.

It should be noted that, for simplicity of description, only two of the transistors and the two corresponding column amplifiers of the voltage drop control circuit 230 are shown in FIG. The coupling and operation of other transistors of the voltage drop control circuit 230 can be easily deduced. In addition, it should be noted that the column amplifier of the present invention is not limited to the circuit structure shown in FIG. 2 . As understood by those skilled in the art, various column amplifiers of the readout circuit can be implemented in many different ways, so the circuit shown in FIG. 2 is only an example for illustration and not intended to limit the scope of the present invention.

FIG. 3 is a partial circuit diagram of an image sensor according to another embodiment of the invention. In this embodiment, the power supply circuit includes a power line 350 and a voltage drop control circuit 330 . The voltage drop control circuit 330 may include m transistors coupled in parallel, wherein the number m of transistors is less than the number n of column amplifiers of the readout circuit. Therefore, a plurality of column amplifiers can share one transistor, and the transistor is used to generate an area voltage with no power supply voltage drop (IR-drop free), and provide the area voltage to corresponding column amplifiers. In other words, each column amplifier of the readout circuit can receive an equal area voltage through the voltage drop control circuit 330 . In a preferred embodiment of the present invention, the plurality of transistors of the voltage drop control circuit 330 may be NMOS transistors.

The circuit shown in FIG. 3 is similar to that in FIG. 2, the only difference is that the second pole of the transistor T'(i) is coupled to the column amplifiers 320-(i) and 320-(i+1) at the same time for power supply The voltage supply terminals Np(i) and Np(i+1) generate an area voltage without power voltage drop (IR-drop free). Since the circuit shown in FIG. 3 is similar to that in FIG. 2 , the description of other blocks of the circuit can refer to FIG. 2 , and will not be repeated here.

According to the embodiment of the present invention, since each transistor of the voltage drop control circuit 330 can be shared between multiple column amplifiers, the embodiment shown in FIG. 3 can be further reduced compared to the embodiment shown in FIG. 2 circuit area. In addition, in this embodiment, since the reference voltage V _G is directly provided to the gates of each transistor, the current on the wire of the reference voltage V _G is almost zero, so there is no current voltage drop; and the power supply voltage supply terminals (such as , the voltage of Np(i) and Np(i+1)) is the reference voltage minus a valve voltage, so there is no problem of current voltage drop, and at the same time, the current in each column amplifier is substantially the same, therefore, in the power supply The local voltage generated by the voltage supply terminals (eg, Np(i) and Np(i+1)) is also a constant voltage, which is not affected by the power voltage drop of the system operating voltage VDD supplied by the power line 350 . In this way, the voltages of the nodes inside the column amplifiers of the reading circuit will be consistent, and the operation behavior will also be consistent, which effectively solves the problem of image quality degradation caused by the power supply voltage drop of the system operating voltage VDD.

It should be noted that, to simplify the description, only one of the transistors of the voltage drop control circuit 330 and the circuit diagram of two corresponding column amplifiers are shown in FIG. The coupling and operation of other transistors of the voltage drop control circuit 330 are derived. In addition, it should be noted that in other embodiments of the present invention, the same transistor of the voltage drop control circuit can also be shared by two or more amplifiers listed above. Therefore, those skilled in the art can easily deduce other possible changes based on the content disclosed in FIG. 3 , and the circuit shown in FIG. 3 is only an example for auxiliary explanation and is not intended to limit the scope of the present invention.

In addition, it should be noted that the column amplifier of the present invention is not limited to the circuit structure shown in FIG. 3 . As understood by those skilled in the art, various column amplifiers of the readout circuit can be implemented in many different ways, so the circuit shown in FIG. 3 is only an example for illustration and not intended to limit the scope of the present invention.

FIG. 4 is a partial circuit diagram showing an image sensor according to yet another embodiment of the present invention. In this embodiment, the power supply circuit includes a power line 450 and a voltage drop control circuit 430 . The voltage drop control circuit 430 may include n groups of transistors coupled in parallel, wherein the number n of transistor groups is equal to the number n of column amplifiers of the readout circuit. In this way, each column amplifier of the read circuit can be coupled to a set of corresponding transistors, and the set of transistors is used to generate an area voltage without power supply voltage drop (IR-drop free), and provide the area voltage to the corresponding column amplifier. In other words, each column amplifier of the reading circuit can receive the same area voltage through the voltage drop control circuit 430 . In a preferred embodiment of the present invention, the plurality of transistors of the voltage drop control circuit 430 may be NMOS transistors.

The circuit shown in FIG. 4 is similar to that of FIG. 2 except that each column amplifier can be coupled to two cascaded transistors. For example, the first pole of the transistor T1(i) can be coupled to the power line 450, the second pole of the transistor T1(i) can be coupled to the first pole of the transistor T2(i), and the transistor T2(i) The second pole of can be coupled to the column amplifier 420-(i). Likewise, the first pole of the transistor T1(i+1) can be coupled to the power line 450, the second pole of the transistor T1(i+1) can be coupled to the first pole of the transistor T2(i+1), and The second terminal of the transistor T2(i+1) can be coupled to the column amplifier 420-(i+1). In addition, a control terminal of the transistor T1(i) and the transistor T1(i+1) is both coupled to the reference voltage V _G1 , and a control terminal of the transistor T2(i) and the transistor T2(i+1) is both coupled to the reference voltage V G1 . Reference voltage V _G2 . Since the circuit shown in FIG. 4 is similar to that in FIG. 2 , the description of other blocks of the circuit can refer to FIG. 2 , and will not be repeated here.

According to the embodiment of the present invention, since the reference voltages V _G1 and V _G2 are directly provided to the control electrodes of each transistor, and the current flowing through each column amplifier is constant, therefore, at the power supply voltage supply terminal (for example, Np( The area voltage generated by i) and Np(i+1)) is also a constant voltage, which is not affected by the power voltage drop of the system operating voltage VDD supplied by the power line 450 . In this way, the voltages of the nodes inside the column amplifiers of the reading circuit will be consistent, and the operation behavior will also be consistent, which effectively solves the problem of image quality degradation caused by the power supply voltage drop of the system operating voltage VDD.

According to an embodiment of the present invention, by cascading transistors as shown in FIG. 4 , the voltage drop control circuit 430 can withstand a power supply voltage drop of the power line that is larger than that coupled with only a single transistor, so the ability to isolate the power supply voltage drop will be better.

It should be noted that, for simplicity of description, only two sets of transistors and two corresponding column amplifiers of the voltage drop control circuit 430 are shown in FIG. The coupling and operation of other transistors of the voltage drop control circuit 430 can be easily deduced. In addition, it should be noted that in other embodiments of the present invention, two or more amplifiers listed above may share the same set of transistors of the voltage drop control circuit as shown in FIG. 3 . Therefore, those skilled in the art can easily deduce other possible changes based on the content disclosed in FIG. 4 , and the circuit shown in FIG. 4 is only an example for auxiliary explanation and is not intended to limit the scope of the present invention.

In addition, it should be noted that in other embodiments of the present invention, each set of transistors in the voltage drop control circuit may further include more than two transistors. Therefore, those skilled in the art can easily deduce other possible changes based on the content disclosed in FIG. 4 , and the circuit shown in FIG. 4 is only an example for auxiliary explanation and is not intended to limit the scope of the present invention.

In addition, it should be noted that the column amplifier of the present invention is not limited to the circuit structure shown in FIG. 4 . As understood by those skilled in the art, the column amplifiers of the readout circuit can be implemented in many different ways, so the circuit shown in FIG. 4 is only an illustrative example, not intended to limit the scope of the present invention.

FIG. 5 is a partial circuit diagram showing an image sensor according to yet another embodiment of the present invention. In this embodiment, the power supply circuit includes a power line 550 and a voltage drop control circuit 530 . The voltage drop control circuit 530 may include m groups of transistors coupled in parallel, wherein m is a positive integer, and the number m of transistor groups is less than the number n of column amplifiers of the readout circuit. Therefore, a plurality of column amplifiers can share a group of transistors, and the group of transistors is used to generate an IR-drop-free region voltage and provide the region voltage to the corresponding column amplifiers. In other words, each column amplifier of the reading circuit can receive the same area voltage through the voltage drop control circuit 530 . In a preferred embodiment of the present invention, the plurality of transistors of the voltage drop control circuit 530 may be NMOS transistors.

The circuit shown in FIG. 5 is similar to that of FIG. 3 except that each column amplifier can be coupled to three cascaded transistors. For example, the first pole of the transistor T11(i) may be coupled to the power line 550, the second pole of the transistor T11(i) may be coupled to the first pole of the transistor T12(i), and the transistor T12(i) The second terminal can be coupled to the first terminal of the transistor T13(i), and the second terminal of the transistor T13(i) can be coupled to the column amplifiers 520-(i) and 520-(i+1) at the same time. In addition, a control electrode of the transistors T11(i), T12(i) and T13(i) can be respectively coupled to different reference voltages V _G1 , V _G2 and V _G3 . Since the circuit shown in FIG. 5 is similar to that in FIG. 3 , the description of other blocks of the circuit can refer to FIG. 2 and FIG. 3 , and will not be repeated here.

According to an embodiment of the present invention, the control electrodes of the first transistors (for example, the transistors coupled to the power supply line) of each group of transistors are coupled to the reference voltage V _G1 , and the control electrodes of the second transistors are both coupled to the reference voltage V _G2 , and the control electrodes of the third transistor (eg, the transistor coupled to the column amplifier) are both coupled to the reference voltage V _G3 . Since the reference voltages V _G1 , V _G2 and V _G3 are directly supplied to the gates of the respective transistors, and the current flowing through each column amplifier is constant, therefore, at the supply voltage supply terminals (for example, Np(i) and Np The local voltage generated by (i+1)) is also a constant voltage, which is not affected by the power supply voltage drop of the system operating voltage VDD supplied by the power line 550 . In this way, the voltages of the nodes inside the column amplifiers of the reading circuit will be consistent, and the operation behavior will also be consistent, which effectively solves the problem of image quality degradation caused by the power supply voltage drop of the system operating voltage VDD.

According to an embodiment of the present invention, by cascading transistors as shown in FIG. 5 , the voltage drop control circuit 530 can withstand a power supply voltage drop of the power line that is larger than that coupled with only a single transistor, so the ability to isolate the power supply voltage drop will be better.

It should be noted that, for simplicity of description, only one group of transistors and two corresponding column amplifiers of the voltage drop control circuit 530 are shown in FIG. The coupling and operation of other transistors of the voltage drop control circuit 530 can be easily deduced.

In addition, it should be noted that in other embodiments of the present invention, each set of transistors in the voltage drop control circuit may further include less than or more than three transistors. Therefore, those skilled in the art can easily deduce other possible changes based on the content disclosed in FIG. 5 , and the circuit shown in FIG. 5 is only an example for auxiliary explanation and is not intended to limit the scope of the present invention.

In addition, it should be noted that the column amplifier of the present invention is not limited to the circuit structure shown in FIG. 5 . As understood by those skilled in the art, various column amplifiers of the readout circuit can be implemented in many different ways, so the circuit shown in FIG. 5 is only an example for illustration and not intended to limit the scope of the present invention.

It can be seen from the above embodiments that since each column amplifier of the reading circuit is changed to receive power from the power line through the voltage drop control circuit, the voltage received by each column amplifier will not be affected by the system operating voltage supplied by the power line VDD supply voltage drop effect. In this way, the voltage of each node inside each column amplifier will be consistent, and the operation behavior will also be consistent, which effectively solves the problem of image quality degradation caused by the power supply voltage drop of the system operating voltage VDD.

In addition, the voltage drop control circuit proposed by the present invention can further isolate the power supply noise from the reading circuit, so the signal-to-noise ratio can be effectively improved. In addition, as mentioned above, since the circuit of the voltage drop control circuit is very simple and the number of components used is not large, it will not consume extra power consumption, nor will it occupy too much circuit area, and it has both power and circuit area. efficiency.

The use of ordinal numerals such as "first", "second", and "third" to modify elements in the patent claims does not in itself imply any priority, order of priority, order of priority among elements, or method execution The order of the steps of the above is used only as a label to distinguish between different elements with the same name (with different ordinal numbers).

Although the present invention is disclosed as above with preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in this art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.

【Symbol Description】

100 image sensors

110 pixel array

120 read circuit

130 power supply circuit

230, 330, 430, 530 voltage drop control circuit

250, 350, 450, 550 power cord

120-(1), 120-(2), 120-(3), 120-(n-1), 120-(n), 220-(i), 220-(i+1), 320-(i ), 320-(i+1), 420-(i), 420-(i+1), 520-(i), 520-(i+1) column amplifiers

inp(i), inn(i), inp(i+1), inn(i+1) inputs

Itail(i), Itail(i+1) current source

out(i), out(i+1) outputs

Np(i), Np(i+1) endpoints

T(i), T'(i), T1(i), T2(i), T(i+1), T1(i+1), T2(i+1), T11(i), T12(i ), T13(i) transistor

V _G , V _G1 , V _G2 , V _G3 voltage

Claims (16)

1. An image sensor, comprising: A pixel array is composed of a plurality of rows and a plurality of columns of photosensitive elements; A reading circuit, coupled to the pixel array, including a plurality of column amplifiers, wherein each column amplifier is respectively coupled to a column of photosensitive elements of the pixel array, for generating a corresponding sensing voltage; and A voltage drop control circuit, coupled between the reading circuit and a power line, is used to isolate a power supply voltage drop generated by the power line for the reading circuit, so that each column amplifier of the reading circuit passes through the The voltage drop control circuit receives an area voltage of equal magnitude, wherein the plurality of column amplifiers of the reading circuit are all coupled to the voltage drop control circuit. 2. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of transistors, each of which includes a first pole coupled to the power supply line, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a reference voltage. 3. The image sensor as claimed in claim 2, wherein the plurality of transistors are NMOS transistors. 4. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of transistors, each of which includes a first pole coupled to the power supply line, a second pole coupled to more than one of the plurality of column amplifiers, and a control pole coupled to a reference voltage. 5. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of group transistors, each group of transistors is respectively coupled between the power supply line and one of the plurality of column amplifiers, and respectively at least includes: a first transistor including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; and A second transistor, including a first pole coupled to a second pole of the first transistor, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a second reference voltage . 6. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of group transistors, each group of transistors are respectively coupled between the power supply line and at least one of the plurality of column amplifiers, and respectively at least include: a first transistor including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; and A second transistor, including a first pole coupled to a second pole of the first transistor, a second pole coupled to at least one of the plurality of column amplifiers, and a control pole coupled to a second reference voltage. 7. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of group transistors, each group of transistors is respectively coupled between the power supply line and one of the plurality of column amplifiers, and respectively at least includes: a first transistor, including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; a second transistor including a first pole coupled to a second pole of the first transistor, and a control pole coupled to a second reference voltage; and A third transistor including a first pole coupled to a second pole of the second transistor, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a third reference voltage . 8. The image sensor as claimed in claim 1, wherein the voltage drop control circuit comprises: A plurality of group transistors, each group of transistors are respectively coupled between the power supply line and at least one of the plurality of column amplifiers, and respectively at least include: a first transistor, including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; a second transistor including a first pole coupled to a second pole of the first transistor, and a control pole coupled to a second reference voltage; and A third transistor, including a first pole coupled to a second pole of the second transistor, a second pole coupled to at least one of the plurality of column amplifiers, and a control pole coupled to a third reference voltage. 9. An image sensor, comprising: A pixel array is composed of a plurality of rows and a plurality of columns of photosensitive elements; A reading circuit, coupled to the pixel array, including a plurality of column amplifiers, wherein each column amplifier is respectively coupled to a column of photosensitive elements of the pixel array, for generating a corresponding sensing voltage; and A voltage drop control circuit, including a plurality of transistors coupled in parallel between the reading circuit and a power line, used to isolate a power supply voltage drop generated by the power line for the reading circuit, so that each of the reading circuit The column amplifiers all receive an equal area voltage through the voltage drop control circuit, wherein the plurality of column amplifiers of the reading circuit are coupled to one of the plurality of transistors. 10. The image sensor as claimed in claim 9, wherein the plurality of transistors are NMOS transistors. 11. The image sensor as claimed in claim 9, wherein each transistor comprises a first pole coupled to the power line, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a reference voltage. 12. The image sensor as claimed in claim 9 , wherein each transistor comprises a first electrode coupled to the power supply line, a second electrode coupled to more than one of the plurality of column amplifiers, and a control electrode Coupled to a reference voltage. 13. The image sensor as claimed in claim 9 , wherein the plurality of transistors can be divided into a plurality of groups, and each group of transistors is coupled in parallel between the power supply line and one of the plurality of column amplifiers, and each includes at least : a first transistor including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; and A second transistor, including a first pole coupled to a second pole of the first transistor, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a second reference voltage . 14. The image sensor as claimed in claim 9, wherein the plurality of transistors can be divided into a plurality of groups, and each group of transistors is coupled in parallel between the power supply line and at least one of the plurality of column amplifiers, and respectively Include at least: a first transistor including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; and A second transistor, including a first pole coupled to a second pole of the first transistor, a second pole coupled to at least one of the plurality of column amplifiers, and a control pole coupled to a second reference voltage. 15. The image sensor as claimed in claim 9 , wherein the plurality of transistors can be divided into a plurality of groups, and each group of transistors is coupled in parallel between the power supply line and one of the plurality of column amplifiers, and each includes at least : a first transistor, including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; a second transistor including a first pole coupled to a second pole of the first transistor, and a control pole coupled to a second reference voltage; and A third transistor including a first pole coupled to a second pole of the second transistor, a second pole coupled to one of the plurality of column amplifiers, and a control pole coupled to a third reference voltage . 16. The image sensor as claimed in claim 9, wherein the plurality of transistors can be divided into a plurality of groups, and each group of transistors is coupled in parallel between the power supply line and at least one of the plurality of column amplifiers, and respectively Include at least: a first transistor, including a first pole coupled to the power line, and a control pole coupled to a first reference voltage; a second transistor including a first pole coupled to a second pole of the first transistor, and a control pole coupled to a second reference voltage; and A third transistor, including a first pole coupled to a second pole of the second transistor, a second pole coupled to at least one of the plurality of column amplifiers, and a control pole coupled to a third reference voltage.