CN104168524A - Control circuit and control method of digital power amplifier device - Google Patents
Control circuit and control method of digital power amplifier device Download PDFInfo
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- CN104168524A CN104168524A CN201310186798.9A CN201310186798A CN104168524A CN 104168524 A CN104168524 A CN 104168524A CN 201310186798 A CN201310186798 A CN 201310186798A CN 104168524 A CN104168524 A CN 104168524A
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Abstract
The invention relates to a control circuit of a digital power amplifier device. The control circuit comprises an oscillator, a serial audio reception device, an automatic sampling frequency detection device, a phase-locked loop (PLL) control device, an I2C slave device, a system control device and a digital audio processing device. The invention also relates to a control method of the digital power amplifier device. With the control circuit and control method of the digital power amplifier device, the advantages of small chip area, high precision and simple periphery and the like are achieved; meanwhile, the control method is clear, and the reception devices are slave device and accord with a general bus protocol, and convenient implement and clear state are achieved; since a noise control device is added to the control circuit, no explosion sound is caused when the state or the external audio is being switched, so that tone quality is improved greatly and control error is allowed to be smaller; and the circuit is simple and practical in structure, stable and reliable in working performance and wide in application range.
Description
Technical field
The present invention relates to power amplification circuit field, particularly digital power amplifier control technology field, specifically refers to a kind of control circuit and control method thereof of digital power amplifier equipment.
Background technology
The basic circuit of digital power amplifier is already present D class A amplifier A (domestic title class D amplifier) morning.In the past, due to price and technical reason, this amplifier was just applied in laboratory and higher-priced tester.This technical development in several years is integrated in one or two chip the element of digital power amplifier, and price also constantly declines.
Digital power amplifier has the features such as distortion is little, noise is low, dynamic range is large, and in transparency, the parsing power of tonequality, the shock dynamics aspect quiet, low frequency of background is that traditional power amplifier is incomparable.
What digital power amplifier was inputted is I2S digital audio and video signals, after pwm circuit modulation treatment, form duty ratio with the proportional pulse train of input signal, after switching circuit amplifies, again by low pass filter filtering radio-frequency component, restore the waveform input signal having amplified, by loud speaker playback.
In existing digital power amplifier design, in order to distinguish exactly the sample frequency of I2S input audio signal, make PWM modulation circuit carry out exactly signal processing, need in addition a clock signal as sampling benchmark.This clock signal can be external, also can be built-in.External clock signal can adopt external crystal oscillator, and advantage is that error is little, clock stable, and shortcoming is that scheme cost is higher, needs extra chips Pin pin.Onboard clock signal adopts built-in oscillator to produce clock, and advantage is that cost is less compared with external clock, does not need extra clock Pin pin, but shortcoming is clock accuracy, depends on manufacturing process and success rate, and deviation is larger.With this clock, for detection of I2S audio signal, consequent error is larger.
Summary of the invention
The object of the invention is to have overcome above-mentioned shortcoming of the prior art, I2S input audio signal in a kind of effectively control figure power amplifying device course of work to PWM modulation output is provided, significantly promotes tonequality, departure is less, circuit structure is simple and practical, stable and reliable working performance, the scope of application control circuit and the control method thereof of digital power amplifier equipment comparatively widely.
In order to realize above-mentioned object, the invention provides a kind of control circuit of digital power amplifier equipment, this control circuit comprises:
Oscillator, for generation of internal clocking and be adjusted to required frequency range;
Serial apparatus for receiving audio, for receiving external series voice data, and is converted to parallel audio data;
Sample frequency automatic detection device, for receiving external audio serial clock, detects adaptively the variation of audio clock sample rate, and testing result is sent;
Phase-locked loop pll control device, for receiving external audio serial clock, and controls the working method of inner phase-locked loop pll, simultaneously the computing clock of output system inside;
I2C, from equipment, for receiving external series control signal, and sends received control command;
System control device, for receiving described oscillator, serial apparatus for receiving audio, sample frequency automatic detection device, phase-locked loop pll control device, I2C from the output signal of equipment, also for controlling the working method of described digital power amplifier equipment, and monitor the operating state of this digital power amplifier equipment;
Digital audio processing device for receiving the output signal of described serial apparatus for receiving audio, carries out volume control, equalizer regulates and PWM modulation under the control of described system control device, and exports the outside equipment of raising one's voice to.
In an embodiment, the system control device in the control circuit of described digital power amplifier equipment comprises therein:
Register read r/w cell, for receiving described I2C from the internal register read-write bus of equipment output, and output equalizer read-write register system;
Internal control unit, for the operating state of control figure power amplifying device;
Noise control unit, switches for controlling to reduce by signal the explosion sound bringing;
Internal storage unit, the equalizer read-write register coefficient of exporting for storing described register read r/w cell.
Further, the operating state in the control circuit of described digital power amplifier equipment comprises reset mode, reset wait state, soft mute state, mute state and normally works.
Further, described digital power amplifier equipment is digital power amplifier chip.
To achieve these goals, the present invention also provides a kind of control method of digital power amplifier equipment, and the method comprises the following steps:
Carry out reset operation, and the digital power amplifier equipment described in controlling enters reset mode;
Enter reset wait state, the horizontal reset of going forward side by side is waited for timing;
Control described digital power amplifier equipment and enter normal operating conditions;
The in the situation that of there is abnormality in normal operating conditions, enter mute state, and each device in described circuit structure is resetted;
In the situation that receive the soft quiet control command that user inputs in normal operating conditions, control described digital power amplifier equipment and enter soft mute state.
In another embodiment, the control figure power amplifying device in the control method of described digital power amplifier equipment enters reset mode, comprises the following steps therein:
Control outside mute signal and be all enabled state;
Control register is all in reset mode;
In reset mute state.
In another embodiment, the reset in the control method of described digital power amplifier equipment waits for that the step of timing comprises: the inner reset timer of system is set to operating state therein, resets and waits for timing; The time-out time of described reset timer is specifically configured from equipment by described I2C by outside main equipment.
Therein in another embodiment, the step that the control figure power amplifying device in the described control method that realizes digital power amplifier equipment enters normal operating conditions comprises:
The mute signal of controlling outside input enters disarmed state.
In another embodiment, the abnormality in the control method of described digital power amplifier equipment can be switched for input source, foreign current is abnormal, external voltage is abnormal or temperature anomaly therein.
In another embodiment, the control figure power amplifying device in the control method of described digital power amplifier equipment enters soft mute state, comprises the following steps therein:
Slowly reduce the volume of outside input audio signal;
When the volume decrease to 0 of outside input audio signal, control described digital power amplifier equipment and enter mute state;
While outside abnormality recovery being detected in mute state, control described digital power amplifier equipment and return to normal operating conditions.
The technology of the present invention effect is control circuit and the control method thereof that has adopted the digital power amplifier equipment of this invention, owing to having adopted internal oscillator as sampling clock, and can automatically be adjusted to required frequency range, to have chip area little for scheme compared to existing technology, precision is high, the features such as periphery is simple, clear with period control method, and receiving system is all from equipment and meets versabus agreement, have and implement conveniently, state is clear, and owing to having added oise damping means in control circuit, when state or external audio switching, do not produce explosion sound, tonequality has had larger lifting, make departure less, circuit structure is simple and practical, stable and reliable working performance, the scope of application is comparatively extensive.
Accompanying drawing explanation
Fig. 1 is that one embodiment of the invention is the allomeric function configuration diagram of the control circuit of digital power amplifier equipment.
Fig. 2 is that one embodiment of the invention is the system control device inside structure schematic diagram in the control circuit of digital power amplifier equipment.
Fig. 3 is that one embodiment of the invention is to realize the workflow diagram of the control method of digital power amplifier equipment.
Embodiment
In order more clearly to understand technology contents of the present invention, especially exemplified by following examples, describe in detail.
In the present invention, related " system " refers to is " whole system that the control circuit of digital power amplifier equipment forms ".
Refer to shown in Fig. 1 and Fig. 2, the control circuit of this digital power amplifier equipment, comprising:
Oscillator 0, produces internal clocking and is adjusted to required frequency range;
Serial apparatus for receiving audio 1, receives external series voice data, and is converted to parallel audio data;
Sample frequency automatic detection device 2, receives external audio serial clock, the variation of adaptive detection audio clock sample rate, and testing result is sent;
Phase-locked loop pll control device 3, receives external audio serial clock, and controls the working method of inner phase-locked loop pll, simultaneously the computing clock of output system inside;
I2C, from equipment 4, receives external series control signal, and received control command is sent;
System control device 6, receive described oscillator 0, serial apparatus for receiving audio 1, sample frequency automatic detection device 2, phase-locked loop pll control device 3, I2C from the output signal of equipment 4, control the working method of described digital power amplifier equipment, and monitor the operating state of this digital power amplifier equipment; Wherein, this system control device comprises:
Register read r/w cell 61, receives described I2C from the internal register read-write bus of equipment output, and output equalizer read-write register system;
Internal control unit 62, the operating state of control figure power amplifying device; Described operating state comprises reset mode, reset wait state, soft mute state, mute state and normally works;
Noise control unit 63, controls to reduce by signal and switches the explosion sound bringing;
Internal storage unit 64, the equalizer read-write register coefficient that the described register read r/w cell of storage is exported.
Digital audio processing device 5, receives the output signal of described serial apparatus for receiving audio, carries out volume control, equalizer regulates and PWM modulation under the control of described system control device, and exports the outside equipment of raising one's voice to.
Wherein, described digital power amplifier equipment is digital power amplifier chip.
Please participate in shown in Fig. 3, this circuit structure based on above-mentioned is realized the control method of digital power amplifier equipment again, and wherein, described method comprises the following steps:
Step S10: system is carried out reset operation, and control described digital power amplifier equipment and enter reset mode, comprise the following steps:
(a) system is controlled outside mute signal and is all enabled state;
(b) system control register is all in reset mode;
(c) system is in reset mute state.
Step S20: reset finishes rear system and enters reset wait state, the horizontal reset of going forward side by side is waited for timing, is specially:
System is arranged at operating state by inner reset timer, resets and waits for timing; The time-out time of this reset timer is configured from equipment by described I2C by outside main equipment.
Step S30: reset wait state finishes the described digital power amplifier equipment of rear system control and enters normal operating conditions, is specially:
The mute signal of controlling outside input enters disarmed state.As: as described in disarmed state for controlling the mute signal of outside input, by height, turn low.
Step S40: the in the situation that of there is abnormality in normal operating conditions, system enters mute state, and each device in described circuit is resetted; This abnormality can be switched for input source, foreign current is abnormal, external voltage is abnormal or temperature anomaly etc.
Step S50: in the situation that receive the soft quiet control command that user inputs in normal operating conditions, system is controlled described digital power amplifier equipment and entered soft mute state, comprises the following steps:
(a) system slowly reduces the volume of outside input audio signal;
(b) when system is during by the volume decrease to 0 of outside input audio signal, system is controlled described digital power amplifier equipment and is entered mute state;
(c), the in the situation that of outside abnormality recovery being detected in mute state, system is controlled described digital power amplifier equipment and is returned to normal operating conditions.
In the middle of reality is used, refer to shown in Fig. 1, the control appliance of digital power amplifier comprises according to an embodiment of the invention: oscillator 0, for generation of internal clocking and can be adjusted to required frequency range by system control device 6;
Serial apparatus for receiving audio 1, for receiving serial voice data;
Sample frequency automatic detection device 2, for the variation of adaptive detection audio clock sample rate, and sends testing result;
PLL control device 3, for audio reception clock and control the working method of inner PLL;
I2C, from apparatus 4, controls for receiving exterior I 2C main equipment, and receive order is sent;
System control device 6, for the working method of control figure power amplifying device and the operating state of supervision digital power amplifier equipment;
Digital audio processing device 5, controls for the treatment of volume, the functions such as equalizer adjusting and PWM modulation.
Digital audio-frequency data signal is inputted with serial mode, by serial apparatus for receiving audio 1, transfers parallel audio data to, is sent to digital audio processing device 5.According to I2S agreement agreement, the standard of outside input audio data has three kinds to be respectively I2S pattern, left-justify pattern, Right Aligns pattern.Serial apparatus for receiving audio 1 is converted into parallel audio data according to the indication of system control device 6 by serial signal, and sends corresponding useful signal and as primary data, carry out data processing for digital audio processing device 5.
The input of digital audio clock signal group, via sample frequency automatic detection device 2, in order to detect the sample frequency of current serial clock.Different according to digital audio clock signal, the sample frequency of digital audio clock signal can be divided into 8K/16K/32K, 11.025K/22.05K/44.1K, 9 kinds of sample frequencys of 12K/24K/48K three major types.By internal oscillator clock, sample frequency clock signal is sampled, and the standard of result and acquiescence is compared, ignore necessary error range, just can obtain current sample frequency, and result output is used during for digital audio processing.
Digital audio clock signal is input to PLL control device 3 simultaneously, for the control of pll clock, and the computing clock that the clock of PLL control device 3 outputs is internal system.
Meanwhile, exterior I 2C main equipment, by I2C bus input of control commands, is converted into self-defining internal register read-write bus by receiving I2C from apparatus 4, exports to system control device 6.
Digital audio processing device 5 receives the parallel audio data that serial apparatus for receiving audio 1 are sent, and to after the operations such as it carries out that equalizer control, volume are controlled, postemphasised, by PWM, is modulated and exported to loud speaker.
Refer to again shown in Fig. 2, according to the system control device of the digital power amplifier control appliance of the embodiment of the present invention, comprise:
Register read r/w cell 61, the internal register read-write bus of sending into from equipment 4 for receiving I2C, and the register of read-write is sent;
Internal control unit 62, for controlling operating state;
Noise control unit 63, switches for reducing by signal the explosion sound bringing;
Internal storage unit 64, for storing the register coefficient of equalizer;
Register bus is input as I2C in Fig. 1 and sends out from equipment 4, and register read r/w cell 61 distributes according to address map, and input command is kept in and exported.It should be noted that in an embodiment, because the required register coefficient of equalizer is more, will be stored in internal storage unit 64, by internal storage unit read-write bus, communicated by letter with it;
The operating state of whole digital power amplifier chip is controlled in internal control unit 62, comprises resets, the state such as the wait that resets, soft quiet, quiet, normal work.
Refer to shown in Fig. 3, it is system mode control flow again, and idiographic flow is described below:
When system reset, digital power amplifier chip enters reset mode, now controls outside mute signal and is all height (enabled state), and register is all in reset mode, and whole system is quiet in resetting; While finishing when resetting, in order to guarantee work schedule, system enters reset wait state, and it is in running order that now internal system has a reset timer, and for the wait timing that resets, this time can be by outside main equipment by configuring from equipment; Reset timing finishes, and system enters normal operating conditions, now controls outside mute signal and turns low (disarmed state) by height; In normal operating conditions, occur abnormality (as input source switches, foreign current voltage and temperature occur abnormal etc.), system enters mute state to avoid occurring noise, external device (ED) is resetted simultaneously; When normal operating conditions, during the soft quiet control command of main equipment input, system enters soft mute state, and now system slowly reduces input audio volume; When soft mute state, system is down to audio volume at 0 o'clock, and system enters mute state once again.In mute state, detect after outside abnormality recovery, system returns to normal operating conditions once again.It should be noted that any state meets with reset and gets back to reset mode.
It is identical that the working method of noise control unit 63 and above-mentioned state machine are processed soft quiet mode.When system occurs extremely and needs switching state, noise control unit 63 is about to by the slow variation of controlling volume the explosion sound occurring with elimination.
Control circuit and the control method thereof of above-mentioned digital power amplifier equipment have been adopted, owing to having adopted internal oscillator as sampling clock, and can automatically be adjusted to required frequency range, to have chip area little for scheme compared to existing technology, precision is high, the features such as periphery is simple, clear with period control method, and receiving system is all from equipment and meets versabus agreement, have and implement conveniently, state is clear, and owing to having added oise damping means in control circuit, when state or external audio switching, do not produce explosion sound, tonequality has had larger lifting, make departure less, circuit structure is simple and practical, stable and reliable working performance, the scope of application is comparatively extensive.
In this specification, the present invention is described with reference to its specific embodiment.But, still can make various modifications and conversion obviously and not deviate from the spirit and scope of the present invention.Therefore, specification and accompanying drawing are regarded in an illustrative, rather than a restrictive.
Claims (10)
1. a control circuit for digital power amplifier equipment, is characterized in that, described circuit comprises:
Oscillator, for generation of internal clocking and be adjusted to required frequency range;
Serial apparatus for receiving audio, for receiving external series voice data, and is converted to parallel audio data;
Sample frequency automatic detection device, for receiving external audio serial clock, detects adaptively the variation of audio clock sample frequency, and testing result is sent;
Phase-locked loop pll control device, for receiving external audio serial clock, and controls the working method of inner phase-locked loop pll, simultaneously the computing clock of output system inside;
I2C, from equipment, for receiving external series control signal, and sends received control command;
System control device, for receiving described oscillator, serial apparatus for receiving audio, sample frequency automatic detection device, phase-locked loop pll control device, I2C from the output signal of equipment, and also for controlling the working method of described digital power amplifier equipment, and monitor the operating state of this digital power amplifier equipment;
Digital audio processing device for receiving the output signal of described serial apparatus for receiving audio, carries out volume control, equalizer regulates and PWM modulation under the control of described system control device, and exports the outside equipment of raising one's voice to.
2. the control circuit of digital power amplifier equipment according to claim 1, is characterized in that, described system control device comprises:
Register read r/w cell, for receiving described I2C from the internal register read-write bus of equipment output, and output equalizer read-write register system;
Internal control unit, for the operating state of control figure power amplifying device;
Noise control unit, switches for controlling to reduce by signal the explosion sound bringing;
Internal storage unit, the equalizer read-write register coefficient of exporting for storing described register read r/w cell.
3. the control circuit of digital power amplifier equipment according to claim 2, is characterized in that, described operating state comprises reset mode, reset wait state, soft mute state, mute state and normally works.
4. according to the control circuit of the digital power amplifier equipment described in any one in claims 1 to 3, it is characterized in that, described digital power amplifier equipment is digital power amplifier chip.
5. a control method for digital power amplifier equipment, is characterized in that, the method comprises the following steps:
Carry out reset operation, and the digital power amplifier equipment described in controlling enters reset mode;
Enter reset wait state, the horizontal reset of going forward side by side is waited for timing;
Control described digital power amplifier equipment and enter normal operating conditions;
The in the situation that of there is abnormality in normal operating conditions, enter mute state, and each device in the control circuit of digital power amplifier equipment is resetted;
In the situation that receive the soft quiet control command that user inputs in normal operating conditions, control described digital power amplifier equipment and enter soft mute state.
6. the control method that realizes digital power amplifier equipment according to claim 5, is characterized in that, described control figure power amplifying device enters reset mode, comprises the following steps:
Control outside mute signal and be all enabled state;
Control register is all in reset mode;
In reset mute state.
7. the control method that realizes digital power amplifier equipment according to claim 5, is characterized in that, described reset waits for that the step of timing comprises that reset timer is set to operating state, resets and waits for timing; The time-out time of described reset timer is configured from equipment by described I2C by outside main equipment.
8. the control method that realizes digital power amplifier equipment according to claim 5, is characterized in that, the step that described control figure power amplifying device enters normal operating conditions comprises: the mute signal of controlling outside input enters disarmed state.
9. the control method that realizes digital power amplifier equipment according to claim 5, is characterized in that, described abnormality is that input source switches, foreign current is abnormal, external voltage is abnormal or temperature anomaly.
10. the control method that realizes digital power amplifier equipment according to claim 5, is characterized in that, described control figure power amplifying device enters soft mute state, comprises the following steps:
Slowly reduce the volume of outside input audio signal;
When the volume decrease to 0 of outside input audio signal, control described digital power amplifier equipment and enter mute state;
While outside abnormality recovery being detected in mute state, control described digital power amplifier equipment and return to normal operating conditions.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310186798.9A CN104168524A (en) | 2013-05-17 | 2013-05-17 | Control circuit and control method of digital power amplifier device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310186798.9A CN104168524A (en) | 2013-05-17 | 2013-05-17 | Control circuit and control method of digital power amplifier device |
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| CN109150633A (en) * | 2018-10-19 | 2019-01-04 | 京信通信系统（中国）有限公司 | A kind of method and device of power amplifier protection |
| CN110720094A (en) * | 2017-06-08 | 2020-01-21 | 索尼半导体解决方案公司 | Communication device, communication method, program, and communication system |
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Application publication date: 20141126 |