CN104377141B - Method for detecting actual critical dimension and over-etching of deep groove structure in wafer - Google Patents
Method for detecting actual critical dimension and over-etching of deep groove structure in wafer Download PDFInfo
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- CN104377141B CN104377141B CN201310358577.5A CN201310358577A CN104377141B CN 104377141 B CN104377141 B CN 104377141B CN 201310358577 A CN201310358577 A CN 201310358577A CN 104377141 B CN104377141 B CN 104377141B
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- 238000005530 etching Methods 0.000 title claims abstract description 77
- 238000000034 method Methods 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 76
- 238000001514 detection method Methods 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 241000790917 Dioxys <bee> Species 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- Drying Of Semiconductors (AREA)
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Abstract
The invention discloses a method for detecting the actual critical dimension and over-etching of a deep groove structure in wafer. The method includes the steps that S1, multiple holes penetrating through a substrate layer are formed so that the sum of lengths of the holes is larger than a preset critical dimension of the deep groove structure; S2, positions, corresponding to the holes in the substrate layer, on an epitaxial layer are etched to form the deep groove structure; S3, the wafer is irradiated from the epitaxial layer to the substrate layer, and a bright field area and a dark field area are formed on the surface of the substrate layer; S4, the number of holes in the bright field area is recognized, and the actual critical dimension of the deep groove structure is calculated; S5, if the actual critical dimension of the deep groove structure is smaller than the preset critical dimension, the step S2 is repeated, and if it is recognized that the holes in the substrate layer are connected, it is indicated that the deep groove structure of the epitaxial layer is etched. By means of the method, the actual critical dimension of the deep groove structure can be controlled, the problems of incomplete etching and over etching are avoided, process stability is good, and repeatability is good.
Description
Technical field
The present invention relates to field of semiconductor technology, and in particular to deep plough groove etched technology field, more particularly to a kind of detection
The actual critical size of chip deep groove structure and the whether method of over etching.
Background technology
In semiconductor manufacturing special process, in the manufacturing process of the semiconductor device used such as integrated circuit, often need
Certain special performance is realized using deep groove structure, etching depth is more than 300 μm, etch critical dimension (Critical
Dimension, CD) it is more than 500 μm, and rest on predetermined etching stop layer after deep plough groove etched (DSIE) technique.But
It is that the process time needed for DSIE techniques is longer, etching depth is relatively deep (depth is up to hundreds of μm), causes finally cannot accurately sentence
Whether disconnected DSIE etching depths reach desired depth, over etching easily occur or etch the phenomenon such as incomplete, cause DSIE works
The performance failure of chip after skill.
In prior art, DSIE etching depths are measured using step instrument, but when default etching depth is close to, due to surveying
The depth calculation error of amount error and the protection film layer to surface, is easily caused the calculation error to actual etching depth, and
And cannot accurately judge that bottom reaches the actual CD of desired depth, so as to the problem for occurring etching incomplete or over etching.And
Time-consuming longer using step instrument measurement step, taking the actual process time reduces production capacity, and technology stability and repeatability compared with
Difference, it is impossible to etching direction is judged according to actual process situation, process repeatability and predictability is reduced.
The content of the invention
In view of this, the embodiment of the present invention proposes a kind of actual critical size and whether mistake of detection chip deep groove structure
The method of etching, by being formed through multiple holes of the substrate layer in substrate layer, light is shone from epitaxial layer to substrate layer direction
The chip is penetrated, bright field area and details in a play not acted out on stage, but told through dialogues area are formed in the substrate layer surface, calculated according to the number in the hole in the bright field area
The actual critical size of deep groove structure is solving the technical problem that background section above is mentioned.
The embodiment of the present invention proposes a kind of actual critical size of detection chip deep groove structure and the whether side of over etching
Method, the chip includes epitaxial layer, the etching stop layer on the epitaxial layer and the substrate on etching stop layer
Layer, methods described includes：
S1, on the substrate layer formed through the substrate layer multiple holes, the key in each hole in the plurality of hole
Size and number and pitch of holes set according to the preset critical size of deep groove structure to be produced, so that the plurality of hole
Total length more than the deep groove structure preset critical size, wherein, the critical size in each hole is D2, and number is
N, the pitch of holes is d, and the total length in the plurality of hole is L, and the preset critical size of the deep groove structure is D, then L=D2
×N+d×(N-1),L>D；
S2, the position to corresponding to the plurality of hole in the substrate layer in the epitaxial layer perform etching, to be formed
Deep groove structure；
S3, the chip, the shape in the substrate layer surface are irradiated from the epitaxial layer to the substrate layer direction with light
Into bright field area and details in a play not acted out on stage, but told through dialogues area, wherein, the bright field area is corresponding through the deep groove structure region of the epitaxial layer with light；
S4, the number for recognizing hole described in the bright field area, according to the number in the hole deep groove structure is calculated
Actual critical size, wherein, the number in the hole is N1, and the actual critical size of the deep groove structure is D1；
If the actual critical size of S5, the deep groove structure is less than the preset critical size of the deep groove structure,
That is D1<D, it indicates that etching is incomplete, adjusts subsequent technique time, return to step S2；If on the substrate layer for identifying
Hole there is connection, then show the deep groove structure of epitaxial layer over etching.
Further, step S3 includes：
By the chip with epitaxial layer downwards, substrate layer is placed in upwards on microscopical transparent object stage；
The light of the microscopical light source transmitting sequentially passes through deep groove structure, etching stop layer, the substrate of the chip
Multiple holes on layer, form the bright field area in the substrate layer surface.
Further, the number in hole adopts artificial reading manner described in the identification bright field area.
Further, the number in hole adopts image recognition mode described in the identification bright field area.
Further, it is described that the actual critical size of the deep groove structure is calculated by following according to the number in the hole
Formula is obtained：
D1=D2 × N1+d × (N1-1).
Further, the etching is dry etching or wet etching.
Further, the dry etching is plasma etching or reactive ion etching.
Further, the material of the substrate layer and the epitaxial layer is silicon, and the material of the etching stop layer is dioxy
SiClx.
The actual critical size of the detection chip deep groove structure that the embodiment of the present invention is proposed and the whether method of over etching
With following features：By being formed through multiple holes of the substrate layer, by light from epitaxial layer to substrate layer direction in substrate layer
The chip is irradiated, bright field area and details in a play not acted out on stage, but told through dialogues area is formed in the substrate layer surface, according to the number meter in the hole in the bright field area
Calculate the actual critical size of deep groove structure, it is possible to judge etching depth.Embodiment of the present invention methods described can be controlled accurately
The actual critical size of deep groove structure processed, it is possible to judge etching depth, the adjusting process time, prevent etching not exclusively and mistake
The problem of etching, and technology stability and repeatability are good, can be according to the practical situation adjusting process condition of chip, it is ensured that
The steady quality of chip.
Description of the drawings
Fig. 1 is the actual critical size of the detection chip deep groove structure in first embodiment of the invention and whether over etching
Method flow chart；
Fig. 2 is the schematic cross-section of chip before the etching in the embodiment of the present invention；
Fig. 3 is to form the schematic cross-section through multiple holes of the substrate layer in substrate layer in the embodiment of the present invention；
Fig. 4 is the schematic cross-section after epitaxial layer etches deep groove structure in the embodiment of the present invention.
Fig. 2-Fig. 4 description of reference numerals：1 represents epitaxial layer, and 2 represent etching stop layer, and 3 represent substrate layer, and 4 represent substrate
Hole on layer, 5 represent deep groove structure；D2 represents the critical size in hole, and d represents pitch of holes, and L represents the overall length in the plurality of hole
Degree, D represents the preset critical size of the deep groove structure.
Specific embodiment
With reference to the accompanying drawings and examples the present invention is described in further detail.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than full content are illustrate only in description, accompanying drawing.
Figure 1 illustrates the first embodiment of the present invention.
Fig. 1 is the actual critical size of the detection chip deep groove structure in first embodiment of the invention and whether over etching
Method realize flow process 100.Fig. 2 shows the schematic cross-section of chip before etching, as shown in Fig. 2 the chip is including outer
Prolong layer 1, the etching stop layer 2 on epitaxial layer 1 and the substrate layer 3 on etching stop layer 2.Wherein, the substrate layer 3
It is silicon with the material of the epitaxial layer 1, the material of the etching stop layer 2 is silicon dioxide.Those skilled in the art can manage
Solution, the material of the substrate layer 3, the epitaxial layer 1 and the etching stop layer 2 can also be other materials.
The actual critical size of the detection chip deep groove structure in first embodiment of the invention and the whether side of over etching
Details are as follows for the flow process 100 of realizing of method：
In a step 101, formed through multiple holes of the substrate layer, the pass in each hole in the plurality of hole on substrate layer
Key size and number and pitch of holes set according to the preset critical size of deep groove structure to be produced, so that the plurality of
Preset critical size of the total length in hole more than the deep groove structure.
In the present embodiment, formed through many of the substrate layer by etching or additive method on the substrate layer of chip
Individual hole, the default pass of the critical size and number and pitch of holes in each hole in the plurality of hole according to deep groove structure to be produced
Key size and set so that the total length in the plurality of hole more than the deep groove structure preset critical size.Wherein, institute
The critical size for stating each hole is D2, and number is N, and the pitch of holes is d, and the total length in the plurality of hole is L, the deep trench
The preset critical size of structure is D, then L=D2 × N+d × (N-1), L>D.The depth in the plurality of hole is the substrate layer
Thickness, generally, the thickness of the substrate layer is at 20 μm or so.Fig. 3 shows the schematic cross-section for implementing chip after this step, such as
Shown in Fig. 3,1 represents epitaxial layer, and 2 represent etching stop layer, and 3 represent substrate layer, and 4 represent the hole formed on substrate layer, and L is represented
The total length in the plurality of hole, D2 represents the critical size in each hole, and d represents the pitch of holes.From figure 3, it can be seen that
The critical size and depth all same in all holes, and spacing is also identical.
In a step 102, to performing etching corresponding to the position in the multiple holes in substrate layer in epitaxial layer, to form zanjon
Slot structure.
In the present embodiment, to performing etching corresponding to the position in the multiple holes in substrate layer in epitaxial layer, to form depth
Groove structure.The etching is dry etching or wet etching, the dry etching be plasma etching or react from
Son etching, lithographic method can be selected as needed.Fig. 4 shows the schematic cross-section for implementing chip after this step, Fig. 4
Only one schematic diagram, represents that deep groove structure just etches into the ideal that predetermined depth and preset critical size are etched completely
State.As shown in figure 4, L represents the total length in the plurality of hole, D2 represents the critical size in each hole, and d represents the hole
Spacing, D represents the preset critical size of deep groove structure, L=D2 × N+d × (N-1), the plurality of hole on substrate layer it is total
Length is more than the preset critical size of deep groove structure on epitaxial layer, i.e. L>D.
In step 103, chip is irradiated from epitaxial layer to substrate layer direction with light, forms bright in the substrate layer surface
Place and details in a play not acted out on stage, but told through dialogues area.
In the present embodiment, the direction irradiation chip with light from epitaxial layer to substrate layer, can be on the surface of the substrate layer
Upper formation bright field area and details in a play not acted out on stage, but told through dialogues area, wherein, the bright field area is corresponding through the deep groove structure region of the epitaxial layer with light.Enter
The light on epitaxial layer penetrated outside deep groove structure is thicker due to the thickness of the epitaxial layer not being etched away, and is not through,
So as to be formed on the surface of the substrate layer relative to the dark part in the bright field area, referred to as details in a play not acted out on stage, but told through dialogues area.Control Fig. 4, light
Chip is irradiated from epitaxial layer 1 to the direction of substrate layer 3, through multiple on deep groove structure 5, etching stop layer 2 and epitaxial layer 1
Hole 4, can form brighter region, referred to as bright field area on the surface of substrate layer 3；Due to the thickness of epitaxial layer 1 not being etched away
Degree is thicker, and light will not be through, so as to be formed on the surface of the substrate layer 3 relative to the dark part in the bright field area,
Referred to as details in a play not acted out on stage, but told through dialogues area.
Step 103 can also include following sub-step：
Sub-step 1031, by the chip with epitaxial layer downwards, substrate layer is placed in upwards on microscopical transparent object stage.
The microscopical object stage is needed from transparent, printing opacity material, is beneficial to passing through for light.
Sub-step 1032, the light of the microscopical light source transmitting sequentially passes through the deep groove structure of the chip, etching
Multiple holes on stop-layer, substrate layer, form bright field area in the substrate layer surface.Below the microscopical object stage
The light of light source transmitting sequentially pass through deep groove structure, etching stopping on the epitaxial layer of the chip being placed on transparent object stage
Multiple holes on layer, substrate layer, can form bright field area on the surface of the substrate layer, corresponding, in the substrate layer
Surface on the region dark compared with bright field area be details in a play not acted out on stage, but told through dialogues area.
At step 104, the number of bright field area mesopore is recognized, the reality of deep groove structure is calculated according to the number in the hole
Critical size.
In the present embodiment, the number in the hole in the bright field area of substrate layer is recognized first, here can be by artificial reading
Mode recognize, it is also possible to recognized by way of image recognition.The artificial reading, is that people is placed in by micro- sem observation
Chip on bright object stage, reads out the number in the hole in the bright field area.Described image is recognized, by being irradiated by light
The substrate layer of chip is taken pictures, and with the mode of image recognition the number in the hole in bright field area is identified.Image recognition mode is adopted
Carried out with prior art, repeated no more here.
In the present embodiment, after identifying the number of bright field area mesopore, it is possible to calculate zanjon according to the number in the hole
The actual critical size of slot structure, wherein, the number in the hole is N1, and the actual critical size of the deep groove structure is D1,
Then the actual critical size D1 of the deep groove structure can be obtained by equation below：
D1=D2 × N1+d × (N1-1)
In formula, D2 represents the critical size in each hole, and d represents pitch of holes.
In step 105, if the actual critical size of deep groove structure is less than the preset critical size of deep groove structure,
Then indicate that etching is incomplete, adjusts the subsequent technique time, return execution step 102；If the hole on the substrate layer for identifying goes out
Now connect, then show the deep groove structure of epitaxial layer over etching.
In the present embodiment, if the actual critical size of calculated deep groove structure is pre- less than deep groove structure
If critical size, i.e. D1<D, includes not forming the situation in bright field area on substrate layer here, it indicates that etching is incomplete, bag
The situation that etching depth does not reach default etching depth is included, follow-up work is adjusted according to the actual critical size of the deep groove structure
The skill time, return execution step 102.
In the present embodiment, if connection occurs in the hole on the substrate layer for identifying, the deep trench knot of epitaxial layer is shown
Structure over etching.
The present embodiment makes light along epitaxial layer to substrate by being formed through multiple holes of substrate layer on the substrate layer of chip
The chip is irradiated in layer direction, bright field area and details in a play not acted out on stage, but told through dialogues area is formed on the substrate layer of chip, by the number meter in the hole in bright field area
Calculate the actual critical size of deep groove structure, it is possible to judge etching depth.The present embodiment methods described can be accurately controlled depth
The actual critical size of groove structure, it is possible to judge etching depth, adjusts the subsequent technique time, prevents etching not exclusively and mistake
The problem of etching, and technology stability and repeatability are good, can be according to the practical situation adjusting process condition of chip, it is ensured that
The steady quality of chip.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
More other Equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (8)
1. a kind of actual critical size of detection chip deep groove structure and the whether method of over etching, the chip includes extension
Layer, the etching stop layer on the epitaxial layer and the substrate layer on etching stop layer, it is characterised in that the side
Method includes：
S1, on the substrate layer formed through the substrate layer multiple holes, the critical size in each hole in the plurality of hole and
Number and pitch of holes set according to the preset critical size of deep groove structure to be produced, so that the overall length in the plurality of hole
Degree is more than the preset critical size of the deep groove structure, wherein, the critical size in each hole is D2, and number is N, described
Pitch of holes is d, and the total length in the plurality of hole is L, and the preset critical size of the deep groove structure is D, then L=D2 × N+d
× (N-1), L>D；
S2, the position to corresponding to the plurality of hole in the substrate layer in the epitaxial layer perform etching, to form zanjon
Slot structure；
S3, the chip is irradiated from the epitaxial layer to the substrate layer direction with light, form bright in the substrate layer surface
Place and details in a play not acted out on stage, but told through dialogues area, wherein, the bright field area is corresponding through the deep groove structure region of the epitaxial layer with light；
S4, the number for recognizing hole described in the bright field area, according to the number in the hole reality of the deep groove structure is calculated
Critical size, wherein, the number in the hole is N1, and the actual critical size of the deep groove structure is D1；
If the actual critical size of S5, the deep groove structure is less than the preset critical size of the deep groove structure, i.e. D1<
D, it indicates that etching is incomplete, adjusts subsequent technique time, return to step S2；If the hole on the substrate layer for identifying goes out
Now connect, then show the deep groove structure of epitaxial layer over etching.
2. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, step S3 includes：
By the chip with epitaxial layer downwards, substrate layer is placed in upwards on microscopical transparent object stage；
The light of the microscopical light source transmitting is sequentially passed through on the deep groove structure of the chip, etching stop layer, substrate layer
Multiple holes, the bright field area is formed in the substrate layer surface.
3. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, the number for recognizing hole described in the bright field area adopts artificial reading manner.
4. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, the number for recognizing hole described in the bright field area adopts image recognition mode.
5. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, the actual critical size for calculating the deep groove structure according to the number in the hole is obtained by below equation
Arrive：
D1=D2 × N1+d × (N1-1).
6. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, the etching is dry etching or wet etching.
7. the actual critical size of detection chip deep groove structure according to claim 6 and the whether method of over etching,
Characterized in that, the dry etching is plasma etching or reactive ion etching.
8. the actual critical size of detection chip deep groove structure according to claim 1 and the whether method of over etching,
Characterized in that, the material of the substrate layer and the epitaxial layer is silicon, the material of the etching stop layer is silicon dioxide.
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| CN111128776B (en) * | 2019-12-05 | 2022-07-19 | 华虹半导体(无锡)有限公司 | Method for measuring deep groove depth |
| CN112908878B (en) * | 2021-01-20 | 2023-02-07 | 江西新菲新材料有限公司 | Processing method and processing device for electronic product |
| CN113394127B (en) * | 2021-06-16 | 2022-04-19 | 长江存储科技有限责任公司 | Method for monitoring critical dimensions of 3D memory bridge structures |
| CN113628985A (en) * | 2021-07-07 | 2021-11-09 | 华虹半导体(无锡)有限公司 | Detection method for film thickness uniformity |
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| JP2004212553A (en) * | 2002-12-27 | 2004-07-29 | Ricoh Co Ltd | Polarization diffraction optical element, optical pickup device, and optical disk drive device |
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| CN1701420A (en) * | 2002-09-25 | 2005-11-23 | 兰姆研究有限公司 | Apparatus and method for controlling etch depth |
| CN101581571A (en) * | 2009-06-19 | 2009-11-18 | 武汉钢铁(集团)公司 | Method for measuring pit depth with scanning electronic microscope |
| CN102402126A (en) * | 2010-09-17 | 2012-04-04 | 中芯国际集成电路制造(上海)有限公司 | Structure for detecting illumination condition in photoetching process and detection method thereof |
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