CN104572373A - Memory voltage bias test method based on SVID - Google Patents

Abstract

The invention discloses an SVID-based memory voltage bias testing method. In the memory initialization stage, when running MRC, after the system reads the memory voltage value of the memory information, the system transmits the memory voltage value to the corresponding memory via the SVID bus through the PCU unit inside the CPU. VR address, send the SVID command "SetVID? Fast? XX" to adjust the output voltage corresponding to VR. In the method of the present invention, the SVID? Command realizes the adjustment of the pull-bias voltage of the memory VR. The same system can make adaptive voltage adjustments to the memory voltage type (1.5V memory or 1.35V memory) inserted into the DIMM slot, and adjust it to the voltage pull-bias test value desired by the user. The BIOS version can be updated according to the test conditions of the actual voltage bias test. This method simply and effectively solves the memory voltage bias testing requirements of server manufacturers in memory type selection and compatibility test cases.

Description

A SVID-based memory voltage bias test method

technical field

The invention relates to the field of server system memory type selection and compatibility testing, in particular to an SVID-based memory voltage bias testing method.

Background technique

With the rise of emerging industries such as cloud computing and big data, Internet companies have grown and developed rapidly, and the core business of corresponding Internet companies has also continued to expand in scale, which puts forward quite strict requirements on the stability of server system operation. In addition, in some key fields such as finance, telecommunications, and energy, the stability requirements for server systems are more stringent. One of the more critical components that affect system stability: memory, because the power supply stability of memory is not enough, it will cause many problems such as system crash and automatic restart. Therefore, in the server system development process, memory compatibility testing is very important. Among them, in memory type selection and compatibility testing, a very important item is the memory voltage bias test. Its purpose is to adjust the voltage of the memory to the worst condition that the memory can run, and to judge whether the memory under test is compatible with the server system by analyzing the system operation of the memory under such harsh conditions. Domestic relatively large Internet companies including Baidu, Ali, and Tencent have put forward this test requirement for their ODM or OEM manufacturers, and it is also a test requirement generally recognized by memory manufacturers. Therefore, how to effectively realize that the memory voltage satisfies the test conditions of the upper and lower biases is very important.

When server manufacturers do memory type selection and memory compatibility tests, they need to test the memory voltage by ±5% for running tests under the system. The VR of the traditional analog loop needs to be recalculated and adjusted to realize the feedback resistors around the VR chip, which is very troublesome and requires heavy work on the motherboard; the current mainstream digital loop VR can adjust the internal offset register of the VR chip, but the adjustment range is limited. It is impossible to adjust the upper and lower limits of the output voltage to 1.05 times and 0.95 times the nominal voltage, and can only increase or decrease about 40mv on the basis of the nominal voltage. For example, the typical value of the memory voltage is 1.35V, and its upper and lower limits of ±5% are 1.4175V and 1.2825V respectively, but the adjustment register can only be adjusted to 1.39V and 1.31V, which cannot meet the test requirements. Moreover, the above two methods are to fix the output voltage to a specific value, for example: the upper bias of the voltage is fixed to 1.4175V, so this motherboard can only test the pull-off test of the 1.35V memory stick, and cannot realize the test of the 1.5V memory stick. Pull bias test, since 1.5V pull-up bias 5% is 1.575V, therefore, when doing voltage pull bias test for 1.5V memory, it must be reworked again.

Contents of the invention

The technical problem to be solved by the present invention is: without adjusting the motherboard hardware and memory VR-related design, through the A\B two versions of the BIOS Code to realize the automatic biasing of the motherboard memory voltage. It also realizes self-adaptive identification of 1.35V memory and 1.5V memory and voltage bias test adjustment.

The technical scheme adopted in the present invention is:

A memory voltage bias test method based on SVID. In the memory initialization stage, when the MRC is running, the system reads the memory voltage value of the memory information, and sends it to the corresponding VR address via the SVID bus through the PCU unit inside the CPU. The SVID command "SetVID Fast XX" realizes the adjustment of the output voltage of the corresponding VR, and XX represents the output voltage of the memory VR.

In the memory initialization stage, the corresponding BIOS code is called MRC (Memory Reference Code). When running MRC, the system first reads the memory information, which includes the memory voltage value. After the CPU obtains the memory voltage, the corresponding voltage value is passed to the PCU. Send to the memory VR chip, the normal default is as follows: the initial voltage of the memory is 1.5V, if the 1.35V memory is inserted into the DIMM, the PCU will adjust the output voltage to 1.35V, if the 1.5V memory is inserted, the PCU will send it again " SetVID_ Fast XX” command to adjust the output voltage to 1.5V.

When the corresponding default value in the BIOS code is 1.35V, the PCU unit sends the SVID command "SetVID Fast 1.4175" to change it to an upper bias value of 1.4175V; when the default value is 1.5V, the PCU unit sends the SVID command "SetVID Fast 1.575" , changed to an upper bias value of 1.575V, and the corresponding BIOS code is defined as version A. Achieve voltage pull-up bias +5%.

When the corresponding default value in the BIOS code is 1.35V, the PCU unit sends the SVID command "SetVID Fast 1.2825" to change it to a lower bias value of 1.2825V; when the default value is 1.5V, the PCU unit sends the SVID command "SetVID Fast 1.425 ", changed to a lower bias value of 1.425V, and the corresponding BIOS code is defined as version B. To achieve a voltage pull-down bias of -5%.

Beneficial effects of the present invention: the method of the present invention realizes the adjustment of the bias voltage of the memory VR through the SVID Command without changing the design of the motherboard hardware and VR, and the same system can adjust the memory voltage type (1.5V memory or 1.35V memory) to do adaptive voltage adjustment, adjust to the voltage pull test value desired by the user, the user can update the BIOS version according to the actual test conditions of the voltage pull test. This method simply and effectively solves the memory voltage bias testing requirements of server manufacturers in memory type selection and compatibility test cases.

Description of drawings

Figure 1 is a schematic diagram of normal MRC memory initialization;

Figure 2 is a schematic diagram of MRC memory initialization with memory bias +5% voltage value;

Figure 3 is a schematic diagram of the initialization of the MRC memory when the memory is pulled to a voltage value of -5%.

Detailed ways

Below according to accompanying drawing of description, in conjunction with specific embodiment, the present invention is further described:

A memory voltage bias test method based on SVID. In the memory initialization stage, when the MRC is running, the system reads the memory voltage value of the memory information, and sends it to the corresponding VR address via the SVID bus through the PCU unit inside the CPU. The SVID command "SetVID Fast XX" realizes the adjustment of the output voltage of the corresponding VR, and XX represents the output voltage of the memory VR.

In the memory initialization stage, the corresponding BIOS code is called MRC (Memory Reference Code). When running MRC, the system first reads the memory information, which includes the memory voltage value. After the CPU obtains the memory voltage, the corresponding voltage value is passed to the PCU. Send to the memory VR chip, the normal default is as follows: the initial voltage of the memory is 1.5V, if the 1.35V memory is inserted into the DIMM, the PCU will adjust the output voltage to 1.35V, if the 1.5V memory is inserted, the PCU will send it again " SetVID_ Fast XX” command to adjust the output voltage to 1.5V. As shown in Figure 1, it is the memory initialization process during the normal boot process of the system. The initial voltage of the system memory is 1.5V. The output voltage is adjusted to 1.5V. When the PCU obtains the memory model is 1.35V, the BIOS Code executed by the PCU will adjust the output voltage of the memory VR to 1.35V.

As shown in Figure 2, when the corresponding default value in the BIOS code is 1.35V, the PCU unit sends the SVID command "SetVID Fast 1.4175" to change it to an upper bias value of 1.4175V; when the default value is 1.5V, the PCU unit sends the SVID The command "SetVID Fast 1.575" is changed to an upper bias value of 1.575V, and the corresponding BIOS code is defined as version A. Achieve voltage pull-up bias +5%.

As shown in Figure 3, when the corresponding default value in the BIOS code is 1.35V, the PCU unit sends the SVID command "SetVID Fast 1.2825" to change it to a lower bias value of 1.2825V; when the default value is 1.5V, the PCU unit sends The SVID command "SetVID Fast 1.425" is changed to a lower bias value of 1.425V, and the corresponding BIOS code is defined as version B. To achieve a voltage pull-down bias of -5%.

The above embodiments are only used to illustrate the present invention, but not to limit the present invention. Those of ordinary skill in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, all Equivalent technical solutions also belong to the category of the present invention, and the scope of patent protection of the present invention should be defined by the claims.

Claims (3)

1. the memory voltage high low bias test method based on SVID, it is characterized in that: in the internal memory initialization stage, when running MRC, after system reads the memory voltage value of memory information, by the PCU unit of CPU inside, through SVID bus to corresponding VR address, send SVID order " SetVID Fast XX ", realize the output voltage adjustment of corresponding VR.

2. a kind of memory voltage high low bias test method based on SVID according to claim 1, it is characterized in that: when default value corresponding in BIOS code is 1.35V, PCU unit sends SVID order " SetVID Fast 1.4175 ", is changed into inclined value 1.4175V; As default value 1.5V, PCU unit sends SVID order " SetVID Fast 1.575 ", and change inclined value 1.575V into, corresponding BIOS code definition is A version.

3. a kind of memory voltage high low bias test method based on SVID according to claim 1, it is characterized in that: as default value 1.35V corresponding in BIOS code, PCU unit sends SVID order " SetVID Fast 1.2825 ", is changed into lower inclined value 1.2825V; When default value is 1.5V, PCU unit sends SVID order " SetVID Fast 1.425 ", and change lower inclined value 1.425V into, corresponding BIOS code definition is B version.