CN104733868A - Low-profile circuit analog absorber based on dipole array - Google Patents
Low-profile circuit analog absorber based on dipole array Download PDFInfo
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Abstract
本发明公开了一种新型的低剖面电路模拟吸收体,采用可以有效降低基于偶极子阵列电路模拟吸收体厚度的方法–感性接地面法,不仅可以有效降低吸收体的厚度,还可以展宽原结构的工作带宽。该方法以经典传输线理论为基础,通过在中心加载偶极子阵列电路与接地面之间引入短路贴片阵列,实现普通接地面向感性接地面的转化,从而有效降低电路模拟吸收体的厚度;另外,感性接地面与表面电路的电抗成分之间的耦合作用,还可以用来展宽吸收体的工作带宽。该技术主要是通过短路贴片阵列来实现,结构简单,采用普通的PCB板工艺,加工容易,并且成本和重量都相对较小,因而可以大规模地应用在电路模拟吸收体的设计当中。
The invention discloses a new type of low profile circuit simulated absorber, adopting a method that can effectively reduce the thickness of the simulated absorber based on a dipole array circuit - the inductive ground plane method, not only can effectively reduce the thickness of the absorber, but also can broaden the original The operating bandwidth of the structure. Based on the classic transmission line theory, the method introduces a short-circuit patch array between the center-loaded dipole array circuit and the ground plane to realize the conversion of the ordinary ground plane to the inductive ground plane, thereby effectively reducing the thickness of the circuit analog absorber; in addition , the coupling effect between the inductive ground plane and the reactive component of the surface circuit can also be used to broaden the operating bandwidth of the absorber. This technology is mainly realized by short-circuit patch arrays. It has a simple structure, adopts ordinary PCB board technology, is easy to process, and its cost and weight are relatively small, so it can be widely used in the design of circuit analog absorbers.
Description
技术领域technical field
本发明涉及一种用于电磁兼容和雷达吸收材料的电磁波吸收电路,特别是一种基于偶极子的低剖面电路模拟吸收体。The invention relates to an electromagnetic wave absorbing circuit for electromagnetic compatibility and radar absorbing materials, in particular to a dipole-based low profile circuit analog absorber.
背景技术Background technique
电子设备在电磁环境中的安全性研究,最早源于军用设备的电磁信息防泄漏的研究,称为TEMPEST技术(电磁信息泄露防护技术)。随着民用电子信息产品的广泛应用和快速的更新换代,电子设备的电磁环境安全性也受到关注。与TEMPEST技术不同的是,民用电子信息产品主要考虑的不只是自身的信息泄露问题,而是外部的电磁场是否会影响自身设备的正常工作,以及自身散发的电磁波是否会影响其它电子信息产品的正常工作。另外,随着现代侦察与探测技术水平的不断提高,对雷达吸波材料的性能也提出了更高的要求。The research on the safety of electronic equipment in the electromagnetic environment originated from the research on the prevention of electromagnetic information leakage of military equipment, which is called TEMPEST technology (electromagnetic information leakage protection technology). With the wide application and rapid replacement of civilian electronic information products, the electromagnetic environment safety of electronic equipment has also received attention. Different from TEMPEST technology, civil electronic information products mainly consider not only their own information leakage, but whether the external electromagnetic field will affect the normal operation of their own equipment, and whether the electromagnetic waves emitted by themselves will affect the normal operation of other electronic information products. Work. In addition, with the continuous improvement of modern reconnaissance and detection technology, higher requirements are placed on the performance of radar absorbing materials.
电磁波吸收体的使用是实现屏蔽电磁波不干扰其它设备以及不被其它设备干扰的一种有效手段。根据其作用机理不同,吸收体的研究主要分为两大类:一种是对新型材料的研究,例如吸收剂,吸波材料等复合材料的设计以及超材料的运用,其中超材料的运用通常可以实现剖面很低的吸收体,但是其带宽非常窄;另外一种就是基于电路理论的设计,例如金属网,Salisbury屏,Jaumann吸收体以及复阻抗电路模拟吸收体。目前,对电路模拟吸收体的研究着重于对电阻性材料的研究,通过设计不同形状和不同阻抗值的电阻膜,来实现对入射电磁波的吸收。对于此类吸收体,如果希望在更宽的带宽内获得比较理想的吸收性能,则采取的主要手段是增加吸收层的层数,但是,这不仅会增加制作的成本,还会使得吸收体的体积和重量增加。The use of electromagnetic wave absorbers is an effective means to shield electromagnetic waves from interfering with other equipment and from being interfered by other equipment. According to their different mechanisms of action, the research on absorbers is mainly divided into two categories: one is the research on new materials, such as the design of composite materials such as absorbers and wave-absorbing materials, and the application of metamaterials. The application of metamaterials is usually Absorbers with a very low profile can be realized, but their bandwidth is very narrow; the other is the design based on circuit theory, such as metal mesh, Salisbury screen, Jaumann absorber and complex impedance circuit simulation absorber. At present, the research on circuit analog absorbers focuses on the research on resistive materials, and the absorption of incident electromagnetic waves can be achieved by designing resistive films with different shapes and different impedance values. For this type of absorber, if it is desired to obtain ideal absorption performance in a wider bandwidth, the main means to be adopted is to increase the number of layers of the absorber layer, but this will not only increase the production cost, but also make the absorber Increased size and weight.
因此,现有技术的实现方法比较复杂,而且很难同时实现既具有宽的工作带宽又具有低剖面特性的微波吸收体。Therefore, the implementation method in the prior art is relatively complicated, and it is difficult to realize a microwave absorber with both wide operating bandwidth and low profile characteristics at the same time.
发明内容Contents of the invention
本发明所解决的技术问题在于提供一种基于偶极子的低剖面电路模拟吸收体,它不仅能有效降低原基于四分之一波长的电路模拟吸收体的厚度,还可以有效展宽吸收体的工作带宽。The technical problem solved by the present invention is to provide a low-profile circuit analog absorber based on dipoles, which can not only effectively reduce the thickness of the original circuit analog absorber based on a quarter wavelength, but also effectively widen the absorber. Working bandwidth.
实现本发明目的的技术解决方案为:一种基于偶极子阵列的低剖面电路模拟吸收体,包括若干吸收体单元,上述吸收体单元以方形栅格形式二维周期排布,构成阵列,每个吸收体单元均包括偶极子、薄膜贴片电阻、上层介质基板、方型金属贴片、下层介质基板、金属板、第一金属化通孔、第二金属化通孔;The technical solution to realize the object of the present invention is: a low-profile circuit analog absorber based on a dipole array, including a number of absorber units, the absorber units are two-dimensionally arranged periodically in the form of a square grid to form an array, each Each absorber unit includes a dipole, a thin film chip resistor, an upper dielectric substrate, a square metal patch, a lower dielectric substrate, a metal plate, a first metallized through hole, and a second metallized through hole;
下层介质基板的底部设置金属板,下层介质基板上表面中部设置方型金属贴片,下层介质基板开有第一金属化通孔、第二金属化通孔,该两个金属化通孔位于方型金属贴片的两侧,下层介质基板的上方设置上层介质基板,上层介质基板的上表面中部设置偶极子,偶极子的中部设置薄膜贴片电阻,偶极子的延伸方向与两个金属化通孔圆心连线相平行。A metal plate is arranged on the bottom of the lower dielectric substrate, a square metal patch is arranged in the middle of the upper surface of the lower dielectric substrate, and a first metallized through hole and a second metallized through hole are opened on the lower dielectric substrate. On both sides of the type metal patch, the upper dielectric substrate is arranged above the lower dielectric substrate, the dipole is arranged in the middle of the upper surface of the upper dielectric substrate, and the thin film chip resistor is arranged in the middle of the dipole. The extension direction of the dipole is consistent with the two The lines connecting the centers of the metallized through holes are parallel to each other.
上层介质基板与下层介质基板的介电常数εr均为2.2~10.2;双层介质基板的总厚度为其中λ0为在自由空间的波长,其中下层介质基板的厚度为0.5mm~1mm。The dielectric constants ε r of the upper dielectric substrate and the lower dielectric substrate are both 2.2 to 10.2; the total thickness of the double-layer dielectric substrate is Wherein λ 0 is the wavelength in free space, and the thickness of the lower dielectric substrate is 0.5 mm to 1 mm.
上层介质基板与下层介质基板的介质材料相同。The dielectric materials of the upper dielectric substrate and the lower dielectric substrate are the same.
方型金属贴片的边长为其中N为[0.75,0.80],λ0为在自由空间的波长,εr为介电常数,两个金属化通孔的直径均为0.5mm。The side length of the square metal patch is Where N is [0.75,0.80], λ 0 is the wavelength in free space, ε r is the dielectric constant, and the diameters of the two metallized via holes are both 0.5 mm.
偶极子的宽度为其长度的三十分之一,为 The width of a dipole is one-thirtieth of its length, which is
薄膜贴片电阻的阻值大于偶极子的输入阻抗值。The resistance value of the thin film chip resistor is greater than the input impedance value of the dipole.
相邻两个吸收体单元之间的宽度为λ0为在自由空间的波长,εr为介电常数。The width between two adjacent absorber units is λ 0 is the wavelength in free space, and ε r is the dielectric constant.
本发明与现有技术相比,其显著优点为:1)本发明提出的基于偶极子结构的低剖面电路模拟吸收体,厚度只有导波波长的七分之一,与普通的单层电路模拟吸收体的结构相比,厚度缩减了近45%;与此同时,带宽比基于普通接地面的普通偶极子阵列吸收体展宽了近110%;2)本发明提出的基于偶极子结构的低剖面电路模拟吸收体,虽然采用了双层的电路结构,但是使用普通的塑料螺钉就可以将其固定而不改变其工作特性,配合薄膜贴片电阻的使用,结构简单,加工容易,并且成本和重量都相对较小,因而可以大规模生产;此外,还可与其他技术,譬如MEMS开关技术相结合,设计出具有接收、发射及吸收等功能的雷达系统部件。Compared with the prior art, the present invention has the following remarkable advantages: 1) The low-profile circuit analog absorber based on the dipole structure proposed by the present invention has a thickness of only one-seventh of the guided wave wavelength, which is different from that of ordinary single-layer circuits. Compared with the structure of the simulated absorber, the thickness is reduced by nearly 45%; at the same time, the bandwidth is nearly 110% wider than the ordinary dipole array absorber based on the common ground plane; 2) the dipole-based structure proposed by the present invention The low-profile circuit simulates the absorber. Although it adopts a double-layer circuit structure, it can be fixed with ordinary plastic screws without changing its working characteristics. With the use of thin film chip resistors, the structure is simple and easy to process, and The cost and weight are relatively small, so it can be mass-produced; in addition, it can also be combined with other technologies, such as MEMS switch technology, to design radar system components with functions of receiving, emitting and absorbing.
下面结合附图对本发明作进一步详细描述。The present invention will be described in further detail below in conjunction with the accompanying drawings.
附图说明Description of drawings
图1为本发明的偶极子和上层介质基板的示意图。FIG. 1 is a schematic diagram of a dipole and an upper dielectric substrate of the present invention.
图2为本发明的方型金属贴片、金属化通孔和下层介质基板的示意图。Fig. 2 is a schematic diagram of a square metal patch, a metallized through hole and a lower dielectric substrate of the present invention.
图3为本发明的方型金属贴片、金属化通孔和金属板的示意图。Fig. 3 is a schematic diagram of a square metal patch, a metallized through hole and a metal plate of the present invention.
图4为基于偶极子的低剖面电路模拟吸收体结构的俯视图。Figure 4 is a top view of a dipole-based low-profile circuit analog absorber structure.
具体实施方式Detailed ways
结合图1、图2、图3和图4,本发明的一种低剖面电路模拟吸收体,包括若干吸收体单元,上述吸收体单元以方形栅格形式二维周期排布,构成阵列,每个吸收体单元均包括偶极子1、薄膜贴片电阻2、上层介质基板3、方型金属贴片4、下层介质基板5、金属板6、第一金属化通孔7、第二金属化通孔8;With reference to Fig. 1, Fig. 2, Fig. 3 and Fig. 4, a low-profile circuit analog absorber of the present invention includes several absorber units, and the absorber units are two-dimensionally arranged periodically in the form of a square grid to form an array, each Each absorber unit includes dipole 1, thin film chip resistor 2, upper dielectric substrate 3, square metal patch 4, lower dielectric substrate 5, metal plate 6, first metallized through hole 7, second metallized through hole 8;
下层介质基板5的底部设置金属板6,下层介质基板5上表面中部设置方型金属贴片4,下层介质基板5上开有第一金属化通孔7、第二金属化通孔8,该两个金属化通孔位于方型金属贴片4的两侧,下层介质基板5的上方设置上层介质基板3,上层介质基板3的上表面中部设置偶极子1,偶极子1的中部设置薄膜贴片电阻2,偶极子1的延伸方向与两个金属化通孔圆心连线相平行。A metal plate 6 is arranged at the bottom of the lower dielectric substrate 5, a square metal patch 4 is arranged in the middle of the upper surface of the lower dielectric substrate 5, and a first metallized through hole 7 and a second metallized through hole 8 are opened on the lower dielectric substrate 5. Two metallized through holes are located on both sides of the square metal patch 4, an upper dielectric substrate 3 is arranged above the lower dielectric substrate 5, a dipole 1 is arranged in the middle of the upper surface of the upper dielectric substrate 3, and a middle part of the dipole 1 is arranged In the thin film chip resistor 2, the extension direction of the dipole 1 is parallel to the line connecting the centers of the two metallized through holes.
上层介质基板3与下层介质基板5的介电常数εr均为2.2~10.2;双层介质基板的总厚度为其中λ0为在自由空间的波长,其中下层介质基板5的厚度为0.5mm~1mm。The dielectric constants ε r of the upper dielectric substrate 3 and the lower dielectric substrate 5 are both 2.2 to 10.2; the total thickness of the double-layer dielectric substrate is Wherein λ 0 is the wavelength in free space, and the thickness of the lower dielectric substrate 5 is 0.5mm˜1mm.
上层介质基板3与下层介质基板5的介质材料相同。The dielectric materials of the upper dielectric substrate 3 and the lower dielectric substrate 5 are the same.
方型金属贴片4的边长为其中N为[0.75,0.80],λ0为在自由空间的波长,εr为介电常数,两个金属化通孔的直径均为0.5mm。The side length of the square metal patch 4 is Where N is [0.75,0.80], λ 0 is the wavelength in free space, ε r is the dielectric constant, and the diameters of the two metallized through holes are both 0.5 mm.
偶极子1的宽度为其长度的三十分之一,为 The width of dipole 1 is one-thirtieth of its length, which is
薄膜贴片电阻2的阻值大于偶极子1的输入阻抗值。The resistance value of the thin film chip resistor 2 is greater than the input impedance value of the dipole 1 .
相邻两个吸收体单元之间的宽度为λ0为在自由空间的波长,εr为介电常数。The width between two adjacent absorber units is λ 0 is the wavelength in free space, and ε r is the dielectric constant.
下面对本发明的具体装置的细节及工作情况进行细化说明。The details and working conditions of the specific device of the present invention will be described in detail below.
偶极子1的宽度为0.8mm,长度为10.8mm;偶极子1中部位置加载薄膜贴片电阻2,其封装型号为0603,阻值为110Ω;以上述结构为周期单元进行二维排布并印制在上层介质基板3上,其中周期单元的尺寸为11.8mm*11.8mm,上层介质基板3的介电常数为2.65,厚度为3mm;方型金属贴片4的边长为8mm,相邻两方型金属贴片4的间距为11.8mm,构成二维周期阵列并印制在下层介质基板5上,其中下层介质基板5的介电常数为2.65,厚度为0.5mm;在下层介质基板5上分别向下开第一金属化通孔7和第二金属化通孔8,两个金属化通孔位于方型金属贴片4的两侧,两个通孔的圆心连线与偶极子1的延伸方向相同,两个金属化通孔的直径均为0.5mm。The width of the dipole 1 is 0.8mm, and the length is 10.8mm; the middle of the dipole 1 is loaded with a thin film chip resistor 2, the package type is 0603, and the resistance value is 110Ω; the above structure is used as a periodic unit for two-dimensional arrangement And printed on the upper dielectric substrate 3, wherein the size of the periodic unit is 11.8mm*11.8mm, the dielectric constant of the upper dielectric substrate 3 is 2.65, and the thickness is 3mm; the side length of the square metal patch 4 is 8mm, which is relatively The distance between two adjacent square metal patches 4 is 11.8mm, forming a two-dimensional periodic array and printed on the lower dielectric substrate 5, wherein the dielectric constant of the lower dielectric substrate 5 is 2.65, and the thickness is 0.5mm; The first metallized through-hole 7 and the second metallized through-hole 8 are respectively opened downward on the top 5, and the two metallized through-holes are located on both sides of the square metal patch 4, and the connection line between the centers of the two through-holes and the dipole The extension direction of sub-1 is the same, and the diameters of the two metallized through-holes are both 0.5 mm.
该实例包含18*18个周期单元,整体的横截面尺寸为212.4mm*212.4mm,总厚度为3.5mm,总重量为363克。经数值计算和实际测试,当电磁波垂直入射到样品上时,吸收率为90%的频段范围为8.05GHz-13.65GHz,相对带宽为52%。This example contains 18*18 periodic units, the overall cross-sectional size is 212.4mm*212.4mm, the total thickness is 3.5mm, and the total weight is 363 grams. According to the numerical calculation and actual test, when the electromagnetic wave is vertically incident on the sample, the frequency range of 90% absorption rate is 8.05GHz-13.65GHz, and the relative bandwidth is 52%.
下面对本发明基于偶极子的低剖面电路模拟吸收体的制备过程进行详细描述:The preparation process of the dipole-based low-profile circuit analog absorber of the present invention is described in detail below:
(1)首先,确定电路模拟吸收体的中心频率和两层介质基板的参数,主要是介电常数。(2)根据中心工作频率和介质基板的介电常数,确定等效工作波长,确定偶极子天线的长度,通常情况下为等效波长的一半。(1) First, determine the center frequency of the circuit simulated absorber and the parameters of the two-layer dielectric substrate, mainly the dielectric constant. (2) According to the central operating frequency and the dielectric constant of the dielectric substrate, determine the equivalent operating wavelength and determine the length of the dipole antenna, which is usually half of the equivalent wavelength.
(3)根据周期结构的主模对单元尺寸的要求,确定单元的宽度,通常为等效半波长的1.05倍,中心加载的贴片电阻值为偶极子天线的辐射电阻与周围单元的耦合电阻之和。(4)构成感性接地面的金属贴片阵列的周期与步骤(3)得到的相同,而金属贴片的边长则等于等效半波长的75%-80%;根据具体的加工精度,确定金属化通孔直径的大小,一般取0.5mm;介质基板的厚度为0.5mm,其底面全部金属化。(3) According to the requirements of the main mode of the periodic structure on the unit size, determine the width of the unit, usually 1.05 times the equivalent half wavelength, and the chip resistance value loaded in the center is the coupling between the radiation resistance of the dipole antenna and the surrounding units sum of resistances. (4) The period of the metal patch array constituting the inductive ground plane is the same as that obtained in step (3), and the side length of the metal patch is equal to 75%-80% of the equivalent half-wavelength; according to the specific processing accuracy, determine The diameter of the metallized through hole is generally 0.5mm; the thickness of the dielectric substrate is 0.5mm, and its bottom surface is all metallized.
(5)基于偶极子的低剖面电路模拟吸收体的厚度为等效波长的七分之一,因此上层电路的厚度为其中λ0为在自由空间的波长,εr为介电常数。(5) The thickness of the simulated absorber based on the low-profile dipole is one-seventh of the equivalent wavelength, so the thickness of the upper circuit is Where λ 0 is the wavelength in free space and ε r is the dielectric constant.
由上可知,本发明是为适应电磁波吸收体对低剖面的要求而设计,并且考虑到基于偶极子阵列电路模拟吸收体带宽太窄的问题,因此采用感性接地面技术。基于偶极子的低剖面电路模拟吸收体的厚度只有等效工作波长的七分之一左右,厚度较原四分之一波长的电吸收体缩减近45%;并且工作带宽可达52%,比基于偶极子的普通电路模拟吸收体的工作带宽(约21%)展宽了近110%。It can be seen from the above that the present invention is designed to meet the requirement of low profile of the electromagnetic wave absorber, and considering the problem that the bandwidth of the simulated absorber based on the dipole array circuit is too narrow, the inductive ground plane technology is adopted. The thickness of the low-profile circuit analog absorber based on dipoles is only about one-seventh of the equivalent working wavelength, and the thickness is reduced by nearly 45% compared with the original quarter-wavelength electric absorber; and the working bandwidth can reach 52%. It is nearly 110% wider than the working bandwidth (about 21%) of the common circuit analog absorber based on dipoles.
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| CN1856906A (en) * | 2003-08-04 | 2006-11-01 | 哈里公司 | Phased array antenna absorber and associated methods |
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| YUMEI CHANG等: "《Dipole array absorbing surface made thin and wideband with inductive ground》", 《PROCEEDINGS OF ASIA-PACIFIC MICROWAVE CONFERENCE 2011》 * |
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