CN104765701A - Data access method and device - Google Patents

Abstract

The invention discloses a data access method and equipment, belonging to the field of computers. The method includes: at each clock cycle, when detecting data access requests sent by a plurality of HACs through HAC-IFs respectively connected to the plurality of HACs, based on the priorities of the plurality of data access requests, receiving priority The highest data access request; based on the type of the received data access request, storing the received data access request in the data queue of the LMI; based on the amount of data carried by the target data access request in the data queue of the LMI, the According to the start address carried in the target data access request and the maximum data volume of the SOC data bus, data access is performed on the storage resources of the SOC. The invention uses the LMI to arbitrate, split and convert the data access request sent by the HAC, saving the duplicate resources of split logic and protocol conversion logic, and the SOC data bus only needs to provide an access interface for the LMI, reducing the SOC data bus number of access interfaces.

Description

Data access method and device

technical field

The invention relates to the computer field, in particular to a data access method and device.

Background technique

With the increasing complexity of the chip, the number of HAC (English: Hardware Accelerator; Chinese: Hardware Accelerator) in a single chip is increasing, and the storage resources of the SOC (English: System On Chip; Chinese: System on Chip) are greatly affected by the HAC. Data access is an indispensable part of HAC's business execution process.

At present, the specific process of data access by HAC to SOC storage resources can be as follows: As shown in Figure 1, each HAC is connected to a HAC-IF (English: Hardware Accelerator Interface; Chinese: Hardware Accelerator Interface), when each HAC When receiving a data access request, the HAC sends the data access request to the HAC-IF connected to it, and the HAC-IF, based on the specified amount of data and the amount of data carried by the data access request, in each clock cycle, from the data A sub-data access request is split from the access request, and the amount of sub-data carried in the sub-data access request is less than or equal to the specified amount of data. Wherein, the designated data volume is less than or equal to the maximum data volume required by the SOC data bus. Afterwards, the HAC-IF performs protocol conversion on the sub-data access request to obtain a data access command, so that the data access command meets the protocol of the SOC data bus. The HAC-IF sends the data access command to the SOC data bus. When the SOC data bus detects the data access commands sent by multiple HAC-IFs, based on the priority of the data access requests received by each HAC-IF, the receiving priority The data access command after splitting the highest-level data access request, and based on the data access command, performs data access to the storage resources of the SOC.

In the process of realizing the present invention, the inventor finds that there are at least the following problems in the prior art:

The SOC data bus provides an access interface for each HAC-IF. When the number of HACs increases, the access interfaces that the SOC data bus needs to provide will also increase; and the same split data needs to be arranged in each HAC-IF The logic of the access request and the logic of the protocol conversion waste a lot of resources.

Contents of the invention

In order to solve the problems in the prior art, embodiments of the present invention provide a data access method and device. Described technical scheme is as follows:

In a first aspect, a data access method is provided, the method comprising:

At each clock cycle, when multiple hardware accelerators HACs are detected to send data access requests through the hardware accelerator interface HAC-IF connected respectively with the multiple HACs, based on the priority of multiple data access requests, the priority of receiving highest data access request;

Based on the type of the received data access request, storing the received data access request in a data queue of the logical master interface LMI;

Based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus of the system on chip, perform data access to the storage resources of the SOC.

With reference to the first aspect, in a first possible implementation manner of the above first aspect, based on the type of the received data access request, storing the received data access request in a data queue of the logical master interface LMI, include:

If the type of the received data access request is a data write request, the received data access request is stored after the last data access request in the first data queue of the LMI, and the first data queue is used to store the data write request ;

If the type of the received data access request is a data read request, the received data access request is stored after the last data access request in the second data queue of the LMI, and the second data queue is used to store data read request.

With reference to the first aspect, in the second possible implementation manner of the first aspect above, the amount of data carried by the target data access request in the LMI-based data queue, the start of the target data access request carried The address and the maximum data volume of the SOC data bus of the system on chip, and data access to the storage resources of the SOC, including:

Obtain a target data write request from the first data queue of the LMI, and obtain a target data read request from the second data queue of the LMI;

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus, write the write data of the target data write request into the storage of the SOC resources;

Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, read the The read data for the target data read request.

With reference to the second possible implementation of the first aspect, in the third possible implementation of the first aspect above, the first data amount carried in the target data write request, the target data write request Carrying the first start address and the maximum data volume of the SOC data bus, writing the write data of the target data write request into the storage resources of the SOC, including:

Based on the first amount of data carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, obtain the write data from the target HAC, and perform a calculation on the number of times of obtaining the write data. Statistics to obtain the first number, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount and the first start address and the maximum data volume of the SOC data bus, split a sub-data write request from the target data write request, and perform protocol conversion on the sub-data write request to obtain a data write command, and the data write command carrying the first sub-data volume and the first sub-start address;

When the first number reaches the second specified number of times, during the process of obtaining the next write data of the second specified number of times from the target HAC, the data write command is sent to the SOC data bus, and clearing the first count, recounting the first count, and returning to the previous step until the splitting of the target data write request is completed;

When receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC multiple times, and sent to the SOC data bus one by one, so that the SOC data bus follows the The first sub-data amount and the first sub-start address write the received write data into the storage resources of the SOC.

With reference to the second possible implementation of the first aspect, in the fourth possible implementation of the first aspect above, the first data amount carried in the target data write request, the target data write request Carrying the first start address and the maximum data volume of the SOC data bus, writing the write data of the target data write request into the storage resources of the SOC, including:

Based on the first amount of data carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, obtain the write data from the target HAC, and perform a calculation on the number of times of obtaining the write data. Statistics to obtain the first number, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount and the first start address and the maximum amount of data of the SOC data bus, split a sub-data write request from the target data write request, carry out protocol conversion with the sub-data write request, obtain a data write command, and return to this step until the The splitting of the target data write request is completed;

Sending the data write command to the SOC data bus, the data write command carrying the first sub-data amount and the first sub-start address;

When the data write response returned by the SOC data bus is received, the write data obtained from the target HAC for multiple times will be sent to the SOC data bus one by one, so that the SOC data bus will follow the first sub- The data amount and the first sub-start address are used to write the received write data into the storage resources of the SOC.

With reference to the third possible implementation of the first aspect or the fourth possible implementation of the first aspect, in the fifth possible implementation of the first aspect above, the write request based on the target data carries The first data amount, the first start address carried by the target data write request and the bit width of the chip data bus, obtain the write data from the target HAC, and count the number of times of obtaining the write data to obtain the first number, include:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of write data from the target HAC, the chip data The bus is a data bus connected to the LMI;

Based on the acquisition times, sending indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into the acquisition times and send them;

The write data sent by the target HAC is received, and the number of times of receiving the write data is counted to obtain the first number.

In combination with the second possible implementation of the first aspect, the third possible implementation of the first aspect, or the fourth possible implementation of the first aspect, the sixth possible implementation of the first aspect above In the above, based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, from the storage resources of the SOC Read the read data of the target data read request, including:

Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, split one from the target data read request A sub-data read request, and performing protocol conversion on the sub-data read request to obtain a data read command;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start origin address;

receiving the read data sent by the storage resource of the SOC through the SOC data bus, and counting the number of times of receiving the read data to obtain a second number of times;

When the second number of times reaches the third specified number of times, during the process of the storage resource receiving the SOC sending the next read data of the third specified number of times through the SOC data bus, based on the second data amount, The second starting address and the maximum data volume of the SOC data bus, splitting the next sub-data read request from the target data read request, and performing protocol conversion on the next sub-data read request, Get the next data read command;

When the second number of times reaches the fourth specified number of times, the storage resource receiving the SOC transmits the next read data of the fourth specified number of times through the SOC data bus, and sends the next data read command Send to the SOC data bus, clear the second count, re-count the second count, and return to the previous step until the target data read request is split.

In combination with the second possible implementation of the first aspect, the third possible implementation of the first aspect, or the fourth possible implementation of the first aspect, the seventh possible implementation of the first aspect above In the above, based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, from the storage resources of the SOC Read the read data of the target data read request, including:

Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, split one from the target data read request Subdata read request;

Perform protocol conversion on the sub-data read request to obtain a data read command, and return to the previous step until the target data read request is split;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start origin address;

The read data sent by the storage resource of the SOC through the SOC data bus is successively received.

With reference to the first aspect, in an eighth possible implementation manner of the above first aspect, the method further includes:

For each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, the number of data write commands sent is counted to obtain the first number of commands, and the data sent Count the number of read commands to obtain the second number of commands;

When the number of the first command is equal to the first number threshold, stop receiving the data access request of the type sent by the HAC, which is a data write request, until the number of the first command is less than the first number threshold;

When the second number of commands is equal to the second number threshold, stop receiving the data access request sent by the HAC, whose type is a data read request, until the second number of commands is less than the second number threshold.

In a second aspect, a data access device is provided, and the device includes:

The receiving module is used for each clock cycle, when detecting the data access requests sent by multiple hardware accelerators HAC through the hardware accelerator interface HAC-IF respectively connected with the multiple HACs, based on the priority of multiple data access requests level, receiving the data access request with the highest priority;

A storage module, configured to store the received data access request in the data queue of the logical main interface LMI based on the type of the received data access request;

The data access module is used to store the SOC based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus of the system on chip. resources for data access.

With reference to the second aspect, in the first possible implementation manner of the above second aspect, the storage module includes:

The storage unit is configured to store the received data access request after the last data access request in the first data queue of the LMI if the type of the received data access request is a data write request, and the first data queue uses For storing data write requests;

The storage unit is further configured to store the received data access request after the last data access request in the second data queue of the LMI if the type of the received data access request is a data read request, the The second data queue is used to store data read requests.

With reference to the second aspect, in a second possible implementation manner of the above second aspect, the data access module includes:

An acquisition unit, configured to acquire a target data write request from the first data queue of the LMI, and acquire a target data read request from the second data queue of the LMI;

A writing unit, configured to write the target data write request based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus. Data is written into the storage resources of the SOC;

A reading unit, configured to read from the storage of the SOC based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus. The resource reads the read data of the target data read request.

With reference to the second possible implementation of the second aspect, in the third possible implementation of the second aspect above, the writing unit includes:

The obtaining subunit is configured to obtain write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and Obtaining the number of times of writing data is counted to obtain the first number, and the target HAC is the HAC that sends the writing request of the target data;

Splitting subunits, used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, The first start address and the maximum data volume of the SOC data bus, split a sub-data write request from the target data write request, and perform protocol conversion on the sub-data write request to obtain a data write command , the data write command carries a first sub-data amount and a first sub-start address;

The sending subunit is used to send the data write command to The SOC data bus, and clear the first number, re-count the first number, and return to the previous split subunit until the target data write request is split;

The sending subunit is further configured to obtain the write data of the data write command from the target HAC multiple times when receiving the data write response returned by the SOC data bus, and send them to the SOC data one by one bus, so that the SOC data bus writes the received write data into the storage resources of the SOC according to the first sub-data amount and the first sub-start address.

With reference to the second possible implementation of the second aspect, in the fourth possible implementation of the second aspect above, the writing unit includes:

The obtaining subunit is configured to obtain write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and Obtaining the number of times of writing data is counted to obtain the first number, and the target HAC is the HAC that sends the writing request of the target data;

Splitting subunits, used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, The first starting address and the maximum data volume of the SOC data bus, splitting a sub-data write request from the target data write request, performing protocol conversion on the sub-data write request, and obtaining a data write command, Return to the split subunit until the splitting of the target data write request is completed;

A sending subunit, configured to send the data write command to the SOC data bus, where the data write command carries a first sub-data amount and a first sub-start address;

The sending subunit is further configured to, when receiving the data write response returned by the SOC data bus, send the write data obtained from the target HAC multiple times to the SOC data bus one by one, so that the The SOC data bus writes the received write data into the storage resources of the SOC according to the first sub-data amount and the first sub-start address.

In combination with the third possible implementation of the second aspect or the fourth possible implementation of the second aspect, in the fifth possible implementation of the second aspect above,

The acquisition subunit is specifically used for:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of write data from the target HAC, the chip data The bus is a data bus connected to the LMI;

Based on the acquisition times, sending indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into the acquisition times and send them;

The write data sent by the target HAC is received, and the number of times of receiving the write data is counted to obtain the first number.

In combination with the second possible implementation of the second aspect, the third possible implementation of the second aspect, or the fourth possible implementation of the second aspect, the sixth possible implementation of the second aspect above In, the reading unit includes:

splitting subunits, for reading from the target data based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus Splitting a sub-data read request from the request, and performing protocol conversion on the sub-data read request to obtain a data read command;

A sending subunit, configured to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address;

The receiving subunit is used to receive the read data sent by the storage resources of the SOC through the SOC data bus, and count the number of times of receiving the read data to obtain the second number of times;

The splitting subunit is also used in the process of sending the next read data of the third specified number of times by the storage resource receiving the SOC through the SOC data bus when the second number of times reaches the third specified number of times , splitting the next sub-data read request from the target data read request based on the second data amount, the second start address, and the maximum data amount of the SOC data bus, and dividing the next sub-data read request Perform protocol conversion on a sub-data read request to obtain the next data read command;

The sending subunit is also used for receiving the storage resource of the SOC in the process of sending the next read data of the fourth specified number of times through the SOC data bus when the second number of times reaches the fourth specified number of times , sending the next data read command to the SOC data bus, and clearing the second number of times, recounting the second number of times, and returning to the previous split subunit until the target data read request is split complete.

In combination with the second possible implementation of the second aspect, the third possible implementation of the second aspect, or the fourth possible implementation of the second aspect, the seventh possible implementation of the second aspect above In, the reading unit includes:

splitting subunits, for reading from the target data based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus Split a sub-data read request from the request;

The protocol conversion subunit is used to perform protocol conversion on the sub-data read request, obtain a data read command, and return to the previous split sub-unit until the target data read request is split;

A sending subunit, configured to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address;

The receiving subunit is configured to successively receive the read data sent by the storage resources of the SOC through the SOC data bus.

With reference to the second aspect, in an eighth possible implementation manner of the second aspect above, the device further includes:

The statistical module is used for, for each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, counting the number of data write commands sent to obtain the first number of commands, And counting the number of data read commands sent to obtain the second number of commands;

A stop module, configured to stop receiving the data access request sent by the HAC when the number of the first command is equal to the first number threshold, until the number of the first command is less than the first number threshold a number threshold;

The stop module is further configured to stop receiving data access requests sent by the HAC when the number of the second commands is equal to the second number threshold until the number of the second commands is less than The second number threshold.

The beneficial effect brought by the technical solution provided by the embodiment of the present invention is: in the embodiment of the present invention, the data access request sent by the HAC is arbitrated, split and protocol converted through the LMI, which saves the cost of split logic and protocol conversion logic. The resources are repeated, and the LMI is connected to the SOC data bus. The SOC data bus only needs to provide an access interface for the LMI, and does not need to provide a data access interface for each HAC-IF, which reduces the number of access interfaces of the SOC data bus.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

Fig. 1 is an architecture diagram of a data access system provided by the prior art;

FIG. 2 is an architecture diagram of a data access system provided by an embodiment of the present invention;

Fig. 3 is a flow chart of a data access method provided by an embodiment of the present invention;

FIG. 4 is a flow chart of another data access method provided by an embodiment of the present invention;

Fig. 5 is a schematic structural diagram of a data access device provided by an embodiment of the present invention;

Fig. 6 is a schematic structural diagram of another data access device provided by an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

FIG. 2 is an architecture diagram of a data access system provided by an embodiment of the present invention. Referring to Fig. 2, the data access system includes multiple HACs, multiple HAC-IFs, LMI (English: Logic Master Interface; Chinese: Logic Master Interface), SOC data bus and multiple storage resources of the SOC. The output terminals of the multiple HACs are respectively connected to the input terminals of multiple HAC-IFs, and one HAC can be connected to at least one HAC-IF, and the output terminals of each HAC-IF are respectively connected to the input terminals of the LMI, and the output terminals of the LMI It is connected to the input end of the SOC data bus, and the output end of the SOC data bus is respectively connected to the plurality of storage resources. The multiple HACs are used to schedule the tasks generated during the HAC's business execution process, and generate corresponding first data access requests; the multiple HAC-IFs are used to send the first data access requests generated by the HACs to the LMI, and The output ports of the multiple HAC-IFs are the same, that is, the LMI only needs to provide multiple identical interfaces to connect to multiple HAC-IFs, and the LMI is used to send the first data access request to the multiple HAC-IFs Carry out arbitration, splitting, and protocol conversion, so as to send the data access command after the protocol conversion to the SOC data bus; the SOC data bus sends the received data access command to the corresponding storage resource, so as to realize the access to the storage resource of the SOC.

Fig. 3 is a flowchart of a data access method provided by an embodiment of the present invention. Referring to Figure 3, the method includes:

Step 301: In each clock cycle, when multiple HACs are detected to send data access requests through the HAC-IFs respectively connected to the multiple HACs, based on the priorities of the multiple data access requests, receive the data with the highest priority access request.

Step 302: Based on the type of the received data access request, store the received data access request in the data queue of the LMI.

Step 303: Based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus, perform data access to the storage resources of the SOC.

In the embodiment of the present invention, the data access request sent by the HAC is arbitrated, split, and protocol converted through the LMI, saving the duplicate resources of split logic and protocol conversion logic, and the LMI is connected to the SOC data bus, and the SOC data bus only An access interface needs to be provided for the LMI, and there is no need to provide a data access interface for each HAC-IF, which reduces the number of access interfaces of the SOC data bus.

Optionally, based on the type of the received data access request, the received data access request is stored in the data queue of the LMI, including:

If the type of the received data access request is a data write request, then the received data access request is stored after the last data access request in the first data queue of the LMI, and the first data queue is used to store the data write request;

If the type of the received data access request is a data read request, the received data access request is stored after the last data access request in the second data queue of the LMI, and the second data queue is used for storing the data read request.

Optionally, based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus, data access is performed on the storage resources of the SOC, including:

Obtain a target data write request from the first data queue of the LMI, and obtain a target data read request from the second data queue of the LMI;

Write the write data of the target data write request into the storage resource of the SOC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data volume of the SOC data bus;

Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, the read data of the target data read request is read from the storage resource of the SOC.

Optionally, write the write data of the target data write request into the storage resources of the SOC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus ,include:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is counted to obtain the first One time, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first starting address and the maximum data amount of the SOC data bus, from Splitting a sub-data write request from the target data write request, and performing protocol conversion on the sub-data write request to obtain a data write command, the data write command carries the first sub-data amount and the first sub-start address;

When the first number reaches the second specified number of times, in the process of obtaining the next write data of the second specified number of times from the target HAC, the data write command is sent to the SOC data bus, and the first number is cleared, Re-count the number for the first time, and return to the previous step until the splitting of the target data write request is completed;

When receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC multiple times, and sent to the SOC data bus one by one, so that the SOC data bus will start according to the first sub data volume and the first sub data. Write the received write data into the storage resources of the SOC.

Optionally, write the write data of the target data write request into the storage resources of the SOC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus ,include:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is counted to obtain the first One time, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first starting address and the maximum data amount of the SOC data bus, from Split a sub-data write request from the target data write request, perform protocol conversion on the sub-data write request, obtain a data write command, and return to this step until the split of the target data write request is completed;

Send the data write command to the SOC data bus, the data write command carries the first sub-data volume and the first sub-start address;

When the data write response returned by the SOC data bus is received, the write data obtained from the target HAC is sent to the SOC data bus one by one, so that the SOC data bus is based on the first sub-data volume and the first sub-start address, Write the received write data into the storage resources of the SOC.

Optionally, based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is calculated. Statistics, get the first number, including:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of the write data from the target HAC, the chip data bus is connected to the LMI data bus;

Based on the acquisition times, send indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into acquisition times and send them;

Receive the write data sent by the target HAC, and count the number of times the write data is received to obtain the first count.

Optionally, based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, the read data of the target data read request is read from the storage resource of the SOC. data, including:

Based on the second data volume carried by the target data read request, the second start address carried by the target data read request, and the maximum data volume of the SOC data bus, a sub-data read request is split from the target data read request, and the The sub-data read request performs protocol conversion to obtain a data read command;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data volume and the second sub-start address;

receiving the read data sent by the storage resources of the SOC through the SOC data bus, counting the number of times of receiving the read data, and obtaining the second number of times;

When the second number of times reaches the third specified number of times, the storage resource receiving the SOC sends the next read data of the third specified number of times through the SOC data bus, based on the second data amount, the second start address and the SOC data bus split the next sub-data read request from the target data read request, and perform protocol conversion on the next sub-data read request to obtain the next data read command;

When the second number of times reaches the fourth specified number of times, the storage resource receiving the SOC sends the next read data of the fourth specified number of times through the SOC data bus, sends the next data read command to the SOC data bus, and sends the first The second count is cleared, the second count is counted again, and the previous step is returned until the target data read request is split.

Optionally, based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, the read data of the target data read request is read from the storage resource of the SOC. data, including:

Splitting a sub-data read request from the target data read request based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus;

Perform protocol conversion on the sub-data read request to obtain a data read command, and return to the previous step until the target data read request is split;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data volume and the second sub-start address;

Receive the read data sent by the storage resources of the SOC through the SOC data bus one by one.

Optionally, the method also includes:

For each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, the number of data write commands sent is counted to obtain the first number of commands and the number of data read commands sent The number is counted to obtain the number of the second command;

When the number of the first command is equal to the first number threshold, stop receiving the data access request sent by the HAC as a data write request until the number of the first command is less than the first number threshold;

When the second number of commands is equal to the second number threshold, stop receiving data access requests of the type sent by the HAC, which are data read requests, until the second number of commands is less than the second number threshold.

All the above optional technical solutions can be combined in any way to form optional embodiments of the present invention, which will not be repeated in the embodiments of the present invention.

Fig. 4 is a flowchart of a data access method provided by an embodiment of the present invention. Referring to Figure 4, the method includes:

Step 401: For each HAC, when the HAC generates a data access request, send the data access request to the LMI through the HAC-IF connected to the HAC.

Specifically, for each HAC, when the HAC generates a data access request, if there are multiple HAC-IFs connected to the HAC, the HAC can select one of the multiple HAC-IFs connected to it to be in an idle state The selected HAC-IF then sends the generated data access request to the selected HAC-IF. When the selected HAC-IF receives the data access request, it sends the data access request to the LMI.

In the embodiment of the present invention, one HAC can be connected to multiple HAC-IFs, and the data access requests generated by the HAC can be sent to the LMI through the multiple HAC-IFs, which improves the parallel scheduling performance of the system. Moreover, the HAC and the SOC data bus are connected through the LMI to realize the decoupling of the HAC and the SOC data bus.

Step 402: In each clock cycle, when the LMI detects data access requests sent by multiple HACs through the HAC-IFs connected to the multiple HACs, based on the priorities of the multiple data access requests, the receiving priority is the highest data access requests.

Specifically, in each clock cycle, when the LMI detects data access requests sent by multiple HACs through the HAC-IFs respectively connected to the multiple HACs, the LMI obtains the priorities of the multiple data access requests, and obtains the priorities of the multiple data access requests from the multiple HACs. Among the data access requests, select the data access request with the highest priority and receive the data access request with the highest priority.

It should be noted that, in the current clock cycle, the LMI does not receive the data access request, and in the next clock cycle, the LMI may also receive the data access request with the highest priority based on the above arbitration method. Wherein, in the embodiment of the present invention, the method for the LMI to select and receive the data access request with the highest priority in each clock cycle may be referred to as the arbitration of multiple data access requests by the LMI.

For example, in the first clock cycle, LMI detects three data access requests, which are data access request 1, data access request 2, and data access request 3, and the priority of data access request 1 is higher than that of data access request 2. The priority of data access request 2 is higher than that of data access request 3, therefore, the LMI selects and receives data access request 1 in the first clock cycle. In the second clock cycle, if no new HAC generates a data access request, the LMI will detect data access request 2 and data access request 3, since the priority of data access request 2 is higher than that of data access request 3, therefore, On the second clock cycle, the LMI selects and accepts Data Access Request 2.

It should be noted that when the HAC-IF splits and converts the data access request and the SOC data bus arbitrates the data access command, if the data access request sent by the HAC-IF has the highest priority , when the channel between the HAC-IF and the SOC data bus is abnormal, the SOC data bus cannot process the data access commands sent by the HAC-IF at the current moment, which will affect the subsequent data access commands sent by other HAC-IFs. For processing, it is necessary to reset the HAC-IF, HAC, data bus, etc. In the embodiment of the present invention, the LMI receives the data access request sent by the HAC, and stores the received data access request in the data queue of the LMI. In this way, when the channel between the HAC-IF and the LMI fails, the LMI will Continue to process the data access request sent by the HAC stored in the data queue, without affecting the processing of other data access requests in the same data queue as the data access request of the HAC. It supports self-recovery when a single HAC is abnormal. It will affect other HACs' access to SOC storage resources. At this time, it is necessary to reset the abnormal HAC, and it is not necessary to reset the LMI, SOC data bus, and the like.

In addition, the data access request is stored in the data queue of the LMI. In this way, the HAC does not need to wait for the previous data access request to be processed before sending the next data access request. It only needs to confirm that the last data access request is received by the LMI and stored in the In the data queue, the next data access request can be sent, supporting the HAC to send data access requests continuously, maximizing the use of the data bus between the LMI and the HAC, and improving bus utilization.

Step 403: The LMI stores the received data access request in the data queue of the LMI based on the type of the received data access request, the LMI includes a first data queue and a second data queue, the first data queue is used to store the data write request, The second data queue is used to store data read requests.

Specifically, if the type of the received data access request is a data write request, then the LMI stores the received data access request after the last data access request in the first data queue; if the type of the received data access request is a data read request , then store the received data access request after the last data access request in the second data queue.

It should be noted that, in the embodiment of the present invention, both the first data queue and the second data queue can be first-in-first-out data queues, such as FIFO (English: First Input First Output; Chinese: First In First Out), the present invention The embodiment does not specifically limit this. In addition, in the embodiment of the present invention, the data access requests generated by each HAC do not affect each other, therefore, the data read request can be stored in one data queue, and the data write request can be stored in another data queue, and The two data queues can be independent of each other without affecting each other, and thus can access the storage resources of the SOC in parallel.

Through the above steps 401-403, the LMI can receive a data access request with the highest priority every clock cycle, and store it in the data queue of the LMI. And while the LMI is receiving the data access request with the highest priority, the data access requests stored in the data queue of the LMI can also be processed in parallel according to the following steps 404-411. In addition, the data access requests stored in the first data queue and the data access requests stored in the second data queue do not affect each other, therefore, the data access stored in the first data queue can be accessed through the following steps 405-408 The request is processed, and the data access request stored in the second data queue is processed through the following steps 409-411, and the steps 405-408 can be executed in parallel with the steps 409-411.

Step 404: The LMI acquires the target data write request from the first data queue, and acquires the target data read request from the second data queue.

Specifically, the LMI selects the first data access request from the first data queue, determines the selected data access request as the target data write request, and selects the first data access request from the second data queue. A data access request, determining the selected data access request as a target data read request.

Step 405: Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the LMI obtains the write data from the target HAC, and calculates the number of times of obtaining the write data. Statistics, get the first number, the target HAC is the HAC that sends the target data write request.

Specifically, the LMI calculates the number of acquisitions of write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus. The chip data bus is Data bus to interface with LMI. Based on the number of times of acquisition, indication information is sent to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into the number of times of acquisition and send it. When the target HAC receives the indication information, the target HAC divides the write data of the target data write request based on the acquisition times to obtain multiple write data blocks, and divides the multiple write data blocks obtained after division into multiple Consecutive clock cycles, respectively sent to the LMI. The LMI receives the write data sent by the target HAC, and counts the number of times the write data is received to obtain the first count.

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the LMI calculates the number of acquisitions of the write data from the target HAC. The specific operation can be: LMI based on The first start address carried by the target data write request, judge whether the first start address is aligned with the start storage address of the target HAC storing the write data, and if the addresses are aligned, divide the first data amount carried by the target data write request by The bit width of the chip data bus to get the number of acquisitions. If the addresses are not aligned, subtract the bits corresponding to the first start address from the bit width of the chip data bus to obtain the acquired data volume, and then divide the first data volume by the acquired data volume, and round up the obtained value to obtain Acquisitions.

For example, the bit width of the chip data bus is 16 bits, and the first data volume is 48 bits. If the first start address is the corresponding position of 0 bit, and the starting storage address of the target HAC storing the write data is the corresponding position of 0 bit, then the two addresses are aligned. At this time, divide the first data amount of 48 bits by the bit width of the chip data bus of 16 bits, and obtain the acquisition times as 3. If the first starting address corresponds to 1 bit, and the starting storage address of the target HAC to store write data is corresponding to 0 bit, then the two addresses are not aligned, and the bit width of the chip data bus is 16 bits minus 1 bit corresponding to the first starting address , the acquired data amount is 15 bits, and then, divide the first data amount 48 bits by the acquired data amount 15 bits, and the obtained value is 3.2, round up 3.2, and the obtained number of times is 4.

For another example, if the number of acquisitions is 3, the target HAC divides the write data of the target data write request to obtain 3 data blocks, and sends the 3 data blocks to the LMI respectively in 3 consecutive clock cycles, so that the LMI In 3 clock cycles, write data is obtained from the target HAC respectively.

It should be noted that the data bus connected to the LMI includes the data bus between the LMI and the SOC data bus, and also includes the data bus connected between the LMI and the HAC-IF, and the two data buses have the same bit width. In addition, the method for judging whether the addresses are aligned can refer to related technologies, and when the addresses are aligned, how much data the bus can transmit each time, and when the addresses are not aligned, how much data the bus can transmit each time can refer to related technologies.

Step 406: When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first start address and the maximum data of the SOC data bus Amount, split a sub-data write request from the target data write request, and convert the sub-data write request to a protocol to obtain a data write command, the data write command carries the first sub-data amount and the first sub-start address .

Specifically, the first count is compared with the first specified count, and when the first count is equal to the first specified count, in the process of receiving the target HAC sending the next write data for the first specified count, based on the SOC data bus For the maximum data volume, the first data volume is divided to obtain multiple first sub-data volumes, and the multiple first sub-data volumes are less than or equal to the maximum data volume of the SOC data bus. The first sub-start address is acquired, and a sub-data write request is generated, where the sub-data write request carries the first sub-data amount and the first sub-start address. Perform protocol conversion on the sub-data write request to obtain a data write command, and the data write command carries the first sub-data amount and the first sub-start address.

Obtaining the first sub-start address includes: for the first split sub-data write request, the first sub-start address of the sub-data write request is the first start address. For other sub-data write requests, the first sub-start address of the other sub-data write request is an address continuous after the end address of the previous sub-data write request. That is, based on the first sub-data amount and the first sub-start address carried in the last split sub-data write request, calculate the first sub-start address of the current split sub-data write request, and other sub-data write The request is a sub-data write request split after the first split sub-data write request. In addition, based on the first sub-data amount and the first sub-start address carried in the last split sub-data write request, the method of calculating the first sub-start address of the current split sub-data write request can refer to the existing method , which is not described in detail in the embodiment of the present invention.

In the embodiment of the present invention, when the write data is obtained from the target HAC, there is a delay time for data feedback, and it only takes one clock cycle to split the sub-data write request from the target data write request. Therefore, preferably, the first The specified number of times is the number of write data acquisitions for each sub-data write request minus 2, that is, the number of write data acquisitions corresponding to the first amount of sub-data minus 2. In this way, in the process of obtaining the penultimate write data of the current sub-data write request, the current sub-data write request can be split from the target data write request, effectively utilizing the delay time of data feedback, and improving data access efficiency.

Of course, the first specified number of times may also be the write data acquisition times of each sub-data write request minus 3, 4, etc., and the first specified number of times only needs to be greater than 1, which is not specifically limited in this embodiment of the present invention.

It should be noted that, in the embodiment of the present invention, the amount of data for a single access of the SOC data bus is constant. Therefore, in the embodiment of the present invention, if the first data amount carried by the target data write request is greater than the maximum data of the SOC data bus When the amount is large, it is necessary to split the target data write request so that the first sub-data amount carried by the split sub-data write request is less than or equal to the maximum data amount of a single access of the SOC data bus. In order to improve data access efficiency as much as possible, the first sub-data volume may be equal to the maximum data volume of a single access of the SOC data bus as much as possible.

Step 407: When the first number reaches the second specified number of times, in the process of obtaining the next write data of the second specified number of times from the target HAC, send the data write command to the SOC data bus, and send the first number Clear to zero, re-count the number for the first time, and return to step 406 until the splitting of the target data write request is completed.

Specifically, compare the first number with the second specified number, and when the first number is equal to the second specified number, during the process of receiving the next write data for the second specified number of times sent by the target HAC, write the data to The command is sent to the SOC data bus, so that the SOC data bus sends the data write command to the storage resource of the SOC, and the first number is cleared. When the write data sent by the target HAC is received again, count the number of times of receiving write data again, that is, re-count the number for the first time, and return to step 406 until the split of the target data write request is completed.

In the embodiment of the present invention, when the write data is obtained from the target HAC, there is a delay time for data feedback, and it only takes one clock cycle to send the data write command to the SOC data bus. Therefore, preferably, the second specified number of times can be set The write data acquisition times for each sub-data write request is subtracted by 1, that is, the write data acquisition times corresponding to the first sub-data amount is subtracted by 1. In this way, during the process of obtaining the last write data of the current sub-data access request, the data write command can be sent to the SOC data bus, effectively utilizing the delay time of data feedback, and improving the data access efficiency.

Step 408: When receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC for multiple times, and sent to the SOC data bus one by one, so that the SOC data bus will follow the first sub-data amount and The first sub-start address writes the received write data into the storage resources of the SOC, and ends the operation.

Specifically, when receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC multiple times, and sent to the SOC data bus one by one, so that the SOC data bus sends the write data to the SOC The storage resource of the SOC writes the received write data into the storage resource of the SOC according to the first sub-data amount and the first sub-start address.

In the embodiment of the present invention, through the above-mentioned steps 405-408, before the next data write command is sent, the next data write command is split from the target data write request in advance, and the last write of the previous data write command At the same time as the data is sent, the next data write command is sent to the SOC data bus, so that the write operation can achieve pipeline operation, thereby ensuring the effective use of the SOC data bus, and in this way, it can also prevent the write data from being sent out, and excessive The invalid data write command occupies the port of the SOC storage resource, causing the rest of the bus visitors to be unable to access.

Optionally, in the embodiment of the present invention, not only can the target data write request be split, protocol converted and other operations can be performed through the above steps 405-408 to realize access to the storage resources of the SOC, but also the following (1 )-(4) steps to achieve, including:

(1), based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is calculated Statistics, get the first number, the target HAC is the HAC that sends the target data write request.

This step is the same as the above step 405 and will not be repeated here.

(2), when the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first starting address and the maximum of the SOC data bus For data volume, split a sub-data write request from the target data write request, perform protocol conversion on the sub-data write request, obtain a data write command, and return to this step until the split of the target data write request is completed.

In the embodiment of the present invention, through step (2), the target data write request can be split in multiple consecutive clock cycles to obtain multiple sub-data write requests, thereby performing protocol conversion on the multiple sub-data write requests , get multiple data write commands.

(3) Send the data write command to the SOC data bus, where the data write command carries the first sub-data amount and the first sub-start address.

(4), when receiving the data writing response that SOC data bus returns, with the writing data that obtains from target HAC for many times, send to SOC data bus one by one, make SOC data bus according to the first sub-data volume and the first sub-data The starting address is used to write the received write data into the storage resources of the SOC.

In the process of splitting the target data write request, each time a data write command is obtained, the data write command can be sent to the SOC data bus during the process of splitting the next sub-data write request, so that multiple data The write commands are continuously sent to the SOC data bus in multiple clock cycles, so as to send the write data of the multiple data write commands to the SOC data bus.

Step 409: LMI splits a sub-data read request from the target data read request based on the second data volume carried in the target data read request, the second start address carried in the target data read request, and the maximum data volume of the SOC data bus , and perform protocol conversion on the sub-data read request to obtain a data read command.

Specifically, based on the maximum data volume of the SOC data bus, the second data volume carried by the target data read request is divided to obtain a plurality of second sub-data volumes, and the multiple second sub-data volumes are less than or equal to the SOC data bus unit The maximum amount of data accessed at one time. The second sub-start address is obtained, and a sub-data read request is generated, where the sub-data read request carries the second sub-data amount and the second sub-start address. Perform protocol conversion on the sub-data read request to obtain a data read command.

Obtaining the second sub-start address includes: for the first split sub-data read request, the second sub-start address of the sub-data read request is the second start address. For other sub-data read requests, the second sub-start address of the other sub-data read request is an address continuous after the end address of the previous sub-data read request. That is, based on the second sub-data amount and the second sub-start address carried in the last split sub-data read request, calculate the second sub-start address of the currently split sub-data read request, and other sub-data read requests The request is a sub-data read request split after the first split sub-data read request. Based on the second sub-data amount and the second sub-start address carried in the last split sub-data read request, the method for calculating the second sub-start address of the currently split sub-data read request can refer to the existing method , which is not described in detail in the embodiment of the present invention.

In the embodiment of the present invention, when the read data is obtained from the storage resources of the SOC, there is a delay time for data feedback, and it only takes one clock cycle to split the sub-data read request from the target data read request, therefore, preferably, it can be set The third specified number of times is the number of read data acquisitions for each sub-data read request minus 2, that is, the number of read data acquisitions corresponding to the second amount of sub-data minus 2. In this way, in the process of obtaining the penultimate read data of the current sub-data read request, the next sub-data read request can be split from the target data read request, effectively utilizing the delay time of data feedback, and improving data access efficiency .

Of course, the third specified number of times can also be the number of read data acquisitions of each sub-data read request minus 3, 4, etc., and the third specified number of times only needs to be greater than 1, which is not specifically limited in this embodiment of the present invention.

It should be noted that, in the embodiment of the present invention, the data amount of a single access of the SOC data bus is constant, therefore, in the embodiment of the present invention, if the second data amount carried by the target data read request is greater than the maximum data of the SOC data bus When the amount is large, the target data read request needs to be split so that the second sub-data amount carried by the split sub-data read request is less than or equal to the maximum data amount of a single access to the SOC data bus. In order to improve data access efficiency as much as possible, the second sub-data volume may be equal to the maximum data volume of a single access of the SOC data bus as much as possible.

Step 410: The LMI sends the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address.

Specifically, the data read command is sent to the SOC data bus, so that the SOC data bus sends the data read command to the storage resources of the SOC, and the data read command carries the second sub-data amount and the second sub-start address. When the storage resource of the SOC receives the data read command sent by the SOC data bus, the data read command can be obtained from the storage resource of the SOC according to the second sub-data amount and the second sub-start address carried by the data read command. command read data. The storage resource of the SOC calculates the number of times to send the read data to the LMI based on the second sub-data amount, the second sub-start address and the bit width of the chip data bus. Based on the sending times, the read data is divided to obtain multiple read data blocks, and the divided multiple read data blocks are respectively sent to the LMI through the SOC data bus in multiple consecutive clock cycles.

The storage resources of the SOC are based on the second sub-data volume, the second sub-start address and the bit width of the chip data bus. The specific operation for calculating the number of times the read data is sent to the LMI can be: based on the second sub-start address, Judging whether the second sub-start address is aligned with the start storage address for storing read data in the storage resource of the SOC, if the address is aligned, divide the second sub-data amount by the bit width of the chip data bus to obtain the number of transmissions. If the addresses are not aligned, subtract the bits corresponding to the second sub-start address from the bit width of the chip data bus to obtain the amount of sent data, and then divide the second sub-data amount by the amount of sent data, and round up the obtained value Integrate to get the sending times.

Step 411: The LMI receives the read data sent by the storage resources of the SOC through the SOC data bus, counts the times of receiving the read data, and obtains a second number of times.

Since the storage resource of the SOC sends the read data to the LMI through the SOC data bus in multiple consecutive clock cycles, when the LMI receives the read data, it can count the times of receiving the read data to obtain the second number.

Step 412: When the second number of times reaches the third specified number of times, the storage resource receiving the SOC sends the next read data of the third specified number of times through the SOC data bus, based on the second data amount, the second start address and the SOC The maximum data volume of the data bus, split the next sub-data read request from the target data read request, and perform protocol conversion on the next sub-data read request to obtain the next data read command.

In the embodiment of the present invention, when receiving the read data sent by the SOC data bus, there is a delay time for data feedback, and it only takes one clock cycle to split the sub-data read request from the target data read request. Therefore, preferably, the second 3. The specified number of times is the number of times for sending read data for each sub-data read request minus 2, that is, the number of times for sending read data corresponding to the second amount of sub-data minus 2. In this way, in the process of obtaining the penultimate read data of the current sub-data read request, the next sub-data read request is split from the target data read request, effectively utilizing the delay time of data feedback, and improving data access efficiency .

Step 413: When the second number of times reaches the fourth specified number of times, the storage resource receiving the SOC sends the next read data of the fourth specified number of times through the SOC data bus, and sends the next data read command to the SOC data bus, and Clear the second count to zero, re-count the second count, and return to step 412 until the splitting of the target data read request is completed.

Specifically, the second number of times is compared with the fourth specified number of times, and when the second number of times is equal to the fourth specified number of times, the storage resource receiving the SOC sends the next read data of the fourth specified number of times through the SOC data bus. The next data read command is sent to the SOC data bus, so that the SOC data bus sends the next data read command to the storage resources of the SOC, and the second count is cleared. When the read data sent by the storage resources of the SOC through the SOC data bus is received again, the number of times the read data is received is counted again, that is, the second count is counted again, and the step 412 is returned until the target data read request is split complete.

In the embodiment of the present invention, when receiving the read data sent by the storage resources of the SOC through the SOC data bus, there is a delay time for data feedback, and it only takes one clock cycle to send the data read command to the storage resources of the SOC through the SOC data bus. Therefore, preferably, the fourth specified number of times can be set as the number of read data transmissions for each sub-data read request minus 1, that is, the number of read data transmissions corresponding to the second amount of sub-data minus 1. In this way, in the process of obtaining the last read data of the current sub-data read request, the next data read command is sent to the storage resource of the SOC through the SOC data bus, effectively utilizing the delay time of data feedback, and improving the data access efficiency.

In the embodiment of the present invention, through the above-mentioned steps 409-413, before the next data read command is sent, the next data read command is pre-split from the target data read request, and the last read command of the previous data read command At the same time as the data is received, the next data read command is sent to the SOC data bus, so that the read operation also realizes pipeline operation, thereby ensuring the effective use of the SOC data bus, and in this way, it can also prevent the read data from not being received, excessive The invalid data read command occupies the port of the SOC storage resource, causing the rest of the bus visitors to be unable to access.

Optionally, in the embodiment of the present invention, not only can the target data read request be split, protocol converted and other operations can be performed through the above steps 409-413 to realize access to the storage resources of the SOC, but also the following (1 )-(4) steps to achieve, including:

(1), based on the second data volume carried by the target data read request, the second start address carried by the target data read request, and the maximum data volume of the SOC data bus, a sub-data read request is split from the target data read request .

This step is the same as the above step 409, and will not be repeated here.

(2) Perform protocol conversion on the sub-data read request to obtain a data read command, and return to step (1) until the target data read request is split.

In the embodiment of the present invention, through steps (1) and (2), the target data read request can be split in multiple consecutive clock cycles to obtain multiple sub-data read requests, so that the multiple sub-data read requests Request protocol conversion and get multiple data read commands.

(3) Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resources of the SOC, and the data read command carries the second sub-data amount and the second sub-start address.

(4) Receive sequentially the read data sent by the storage resources of the SOC through the SOC data bus.

In the process of splitting the target data read request, each time a data read command is obtained, the data read command can be sent to the SOC data bus in the process of splitting the next sub-data read request, so that multiple data The read commands are continuously sent to the SOC data bus in multiple clock cycles, so as to obtain the read data of the multiple data read commands from the storage resources of the SOC.

It should be noted that, in the embodiment of the present invention, the LMI is connected to the SOC data bus, as follows, the SOC data bus only needs to provide an access interface for the LMI, which reduces the number of interfaces of the SOC data bus, reduces the cost, and furthermore It is better to maintain the timing of the commands received by the SOC data bus. In addition, the data access request is split and protocol converted through the LMI, that is, the logic of splitting the data access request and the logic of protocol conversion only need to be arranged in the LMI, and there is no need to arrange the split data in each HAC-IF The logic of access request and protocol conversion avoids the waste of repeated resources.

Further, for each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, the number of data write commands sent is counted to obtain the first number of commands; and the data sent Count the number of read commands to obtain the second number of commands; when the first number of commands is equal to the threshold of the first number, stop receiving data access requests sent by the HAC with the type of data write request until the first number of commands less than the first number threshold. When the second number of commands is equal to the second number threshold, stop receiving data access requests of the type sent by the HAC, which are data read requests, until the second number of commands is less than the second number threshold.

Optionally, in this embodiment of the present invention, the first number threshold and the second number threshold are set in advance, and the first number threshold and the second number threshold may be equal or unequal. The example does not specifically limit this. In addition, for different HACs, the first number threshold can be different, and the second number threshold can also be different, that is, different HACs can have different first number thresholds, and can also have different second number thresholds. The threshold is also not specifically limited in this embodiment of the present invention.

Among them, by counting the number of commands sent by the HAC, the number of data access requests sent by the HAC in the LMI is controlled to achieve flow control, improve the processing speed of the LMI, and further increase the speed of data access, and also prevent High-priority data access requests frequently and massively access the storage resources of the SOC.

In the embodiment of the present invention, the data access request sent by the HAC is arbitrated, split, and protocol converted through the LMI, saving the duplicate resources of split logic and protocol conversion logic, and the LMI is connected to the SOC data bus, and the SOC data bus only An access interface needs to be provided for the LMI, and there is no need to provide a data access interface for each HAC-IF, which reduces the number of access interfaces of the SOC data bus. In addition, in the embodiment of the present invention, the write operation and the read operation can be processed in parallel, and the write operation and the read operation can be pipelined separately, which improves the bus utilization rate, and effectively utilizes the delay time of data feedback, improving improve the efficiency of data access.

Fig. 5 is a schematic structural diagram of a data access device provided by an embodiment of the present invention. Referring to Figure 5, the device includes:

The receiving module 501 is configured to receive the priority based on the priorities of the multiple data access requests when multiple HACs are detected to send data access requests through the HAC-IFs respectively connected to the multiple HACs in each clock cycle highest data access request;

The storage module 502 is configured to store the received data access request in the data queue of the LMI based on the type of the received data access request;

The data access module 503 is configured to perform data access to the storage resources of the SOC based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus.

Optionally, the storage module 502 includes:

The storage unit is configured to store the received data access request after the last data access request in the first data queue of the LMI if the type of the received data access request is a data write request, and the first data queue is used to store the data write ask;

The storage unit is also used to store the received data access request after the last data access request in the second data queue of the LMI if the type of the received data access request is a data read request, and the second data queue is used for storing Data read request.

Optionally, the data access module 503 includes:

An acquisition unit, configured to acquire a target data write request from the first data queue of the LMI, and acquire a target data read request from the second data queue of the LMI;

The write unit is used to write the write data of the target data write request into the storage of the SOC based on the first data volume carried by the target data write request, the first start address carried by the target data write request, and the maximum data volume of the SOC data bus resources;

The reading unit is used to read the target data read request from the storage resource of the SOC based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus read data.

Optionally, the writing unit includes:

The obtaining subunit is used to obtain the write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and obtain the write data. The number of times is counted to obtain the first number, and the target HAC is the HAC that sends the target data write request;

Splitting the sub-units is used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, the first start address and the SOC data bus The maximum data volume of the target data write request is split into a sub-data write request, and the sub-data write request is converted into a protocol to obtain a data write command. The data write command carries the first sub-data volume and the first sub-data initial address;

The sending subunit is used to send the data write command to the SOC data bus in the process of obtaining the next write data of the second specified number of times from the target HAC when the first number reaches the second specified number of times, and sends the second Clear the first count, re-count the first count, and return to the previous split subunit until the target data write request is split;

The sending subunit is also used to obtain the write data of the data write command from the target HAC multiple times when receiving the data write response returned by the SOC data bus, and send it to the SOC data bus one by one, so that the SOC data bus follows the first The amount of sub-data and the first sub-start address, and write the received write data into the storage resources of the SOC.

Optionally, the writing unit includes:

The obtaining subunit is used to obtain the write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and obtain the write data. The number of times is counted to obtain the first number, and the target HAC is the HAC that sends the target data write request;

Splitting the sub-units is used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, the first start address and the SOC data bus split a sub-data write request from the target data write request, perform protocol conversion on the sub-data write request, obtain the data write command, and return to the split sub-unit until the target data write request is split. ;

The sending subunit is used to send the data write command to the SOC data bus, and the data write command carries the first sub-data amount and the first sub-start address;

The sending subunit is also used to send the write data obtained from the target HAC to the SOC data bus one by one when receiving the data write response returned by the SOC data bus, so that the SOC data bus can be used according to the first sub data amount and The first sub-start address writes the received write data into the storage resources of the SOC.

Optionally,

Get subunits, specifically for:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of the write data from the target HAC, the chip data bus is connected to the LMI data bus;

Based on the acquisition times, send indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into acquisition times and send them;

Receive the write data sent by the target HAC, and count the number of times the write data is received to obtain the first count.

Optionally, the reading unit includes:

split sub-units, for splitting a sub-data from the target data read request based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus Read request, and perform protocol conversion on the split sub-data read request to obtain a data read command;

The sending subunit is used to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address;

The receiving subunit is used to receive the read data sent by the storage resources of the SOC through the SOC data bus, and count the number of times of receiving the read data to obtain the second number of times;

Splitting sub-units is also used when the second number of times reaches the third specified number of times, the storage resource receiving the SOC sends the next read data of the third specified number of times through the SOC data bus, based on the second data amount, the second start address and the maximum data volume of the SOC data bus, split the next sub-data read request from the target data read request, and perform protocol conversion on the next sub-data read request to obtain the next data read command;

The sending subunit is also used to send the next data read command to the SOC during the process of sending the next read data of the fourth specified number of times by the storage resource receiving the SOC through the SOC data bus when the second number reaches the fourth specified number of times Data bus, clear the second count to zero, re-count the second count, and return to the previous split subunit until the target data read request is split.

Optionally, the reading unit includes:

split sub-units, for splitting a sub-data from the target data read request based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus read request;

The protocol conversion subunit is used to perform protocol conversion on the split sub-data read request, obtain a data read command, and return to the previous split sub-unit until the target data read request is split;

The sending subunit is used to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address;

The receiving subunit is configured to successively receive the read data sent by the storage resources of the SOC through the SOC data bus.

Optionally, the device also includes:

The statistics module is used for each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, counting the number of data write commands sent, obtaining the first number of commands, and sending Count the number of data read commands to obtain the second number of commands;

The stop module is used to stop receiving the data access request sent by the HAC when the number of the first command is equal to the first number threshold, until the number of the first command is less than the first number threshold;

The stop module is further configured to stop receiving data access requests sent by the HAC when the number of the second commands is equal to the second threshold until the number of the second commands is less than the second threshold.

In the embodiment of the present invention, the data access request sent by the HAC is arbitrated, split, and protocol converted through the LMI, saving the duplicate resources of split logic and protocol conversion logic, and the LMI is connected to the SOC data bus, and the SOC data bus only An access interface needs to be provided for the LMI, and there is no need to provide a data access interface for each HAC-IF, which reduces the number of access interfaces of the SOC data bus.

Fig. 6 is a schematic structural diagram of a data access device provided by an embodiment of the present invention. Referring to Figure 6, the device includes:

The receiver 601 is configured to, in each clock cycle, when detecting data access requests sent by multiple HACs through the HAC-IFs respectively connected to the multiple HACs, based on the priorities of the multiple data access requests, receive the priority Highest data access request.

The memory 602 is configured to store the received data access request in the data queue of the LMI based on the type of the received data access request.

The processor 603 is further configured to perform data access to the storage resources of the SOC based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus.

Optionally, the memory 602 is specifically used for:

If the type of the received data access request is a data write request, then the received data access request is stored after the last data access request in the first data queue of the LMI, and the first data queue is used to store the data write request;

If the type of the received data access request is a data read request, the received data access request is stored after the last data access request in the second data queue of the LMI, and the second data queue is used for storing the data read request.

Optionally, the processor 603 is specifically configured to:

Obtain a target data write request from the first data queue of the LMI, and obtain a target data read request from the second data queue of the LMI;

Write the write data of the target data write request into the storage resource of the SOC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data volume of the SOC data bus;

Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, the read data of the target data read request is read from the storage resource of the SOC.

Optionally, the processor 603 is specifically configured to:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is counted to obtain the first One time, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first starting address and the maximum data amount of the SOC data bus, from Splitting a sub-data write request from the target data write request, and performing protocol conversion on the sub-data write request to obtain a data write command, the data write command carries the first sub-data amount and the first sub-start address;

When the first number reaches the second specified number of times, in the process of obtaining the next write data of the second specified number of times from the target HAC, the data write command is sent to the SOC data bus, and the first number is cleared, Re-count the number for the first time, and return to the previous step until the splitting of the target data write request is completed;

When receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC multiple times, and sent to the SOC data bus one by one, so that the SOC data bus will start according to the first sub data volume and the first sub data. Write the received write data into the storage resources of the SOC.

Optionally, processing 603 is specifically used for:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, the write data is obtained from the target HAC, and the number of times of obtaining the write data is counted to obtain the first One time, the target HAC is the HAC that sends the target data write request;

When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount, the first starting address and the maximum data amount of the SOC data bus, from Split a sub-data write request from the target data write request, perform protocol conversion on the sub-data write request, obtain a data write command, and return to this step until the split of the target data write request is completed;

Send the data write command to the SOC data bus, the data write command carries the first sub-data volume and the first sub-start address;

When the data write response returned by the SOC data bus is received, the write data obtained from the target HAC is sent to the SOC data bus one by one, so that the SOC data bus is based on the first sub-data volume and the first sub-start address, Write the received write data into the storage resources of the SOC.

Optionally, the processor 603 is specifically configured to:

Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of the write data from the target HAC, the chip data bus is connected to the LMI data bus;

Based on the acquisition times, send indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into acquisition times and send them;

Receive the write data sent by the target HAC, and count the number of times the write data is received to obtain the first count.

Optionally, the processor 603 is specifically configured to:

Based on the second data volume carried by the target data read request, the second start address carried by the target data read request, and the maximum data volume of the SOC data bus, a sub-data read request is split from the target data read request, and the The sub-data read request performs protocol conversion to obtain a data read command;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data volume and the second sub-start address;

receiving the read data sent by the storage resources of the SOC through the SOC data bus, counting the number of times of receiving the read data, and obtaining the second number of times;

When the second number of times reaches the third specified number of times, the storage resource receiving the SOC sends the next read data of the third specified number of times through the SOC data bus, based on the second data amount, the second start address and the SOC data bus split the next sub-data read request from the target data read request, and perform protocol conversion on the next sub-data read request to obtain the next data read command;

When the second number of times reaches the fourth specified number of times, the storage resource receiving the SOC sends the next read data of the fourth specified number of times through the SOC data bus, sends the next data read command to the SOC data bus, and sends the first The second count is cleared, the second count is counted again, and the previous step is returned until the target data read request is split.

Optionally, the processor 603 is specifically configured to:

Splitting a sub-data read request from the target data read request based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus;

Perform protocol conversion on the sub-data read request to obtain a data read command, and return to the previous step until the target data read request is split;

Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data volume and the second sub-start address;

Receive the read data sent by the storage resources of the SOC through the SOC data bus one by one.

Optionally, the device also includes:

The processor 603 is further configured to, for each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, count the number of data write commands sent to obtain the first number of commands, and Counting the number of data read commands sent to obtain the second number of commands;

The processor 603 is further configured to, when the number of the first command is equal to the first number threshold, stop receiving the data access request sent by the HAC as a data write request until the number of the first command is less than the first number threshold;

The processor 603 is further configured to, when the second number of commands is equal to the second number threshold, stop receiving data access requests sent by the HAC as data read requests until the second number of commands is less than the second number threshold.

In the embodiment of the present invention, the data access request sent by the HAC is arbitrated, split, and protocol converted through the LMI, saving the duplicate resources of split logic and protocol conversion logic, and the LMI is connected to the SOC data bus, and the SOC data bus only An access interface needs to be provided for the LMI, and there is no need to provide a data access interface for each HAC-IF, which reduces the number of access interfaces of the SOC data bus.

It should be noted that: the data access device provided by the above embodiment only uses the division of the above functional modules as an example for data access. In practical applications, the above function allocation can be completed by different functional modules according to needs. The internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the data access device and the data access method embodiments provided by the above embodiments belong to the same idea, and the specific implementation process thereof is detailed in the method embodiments, and will not be repeated here.

Those of ordinary skill in the art can understand that all or part of the steps for implementing the above embodiments can be completed by hardware, and can also be completed by instructing related hardware through a program. The program can be stored in a computer-readable storage medium. The above-mentioned The storage medium mentioned may be a read-only memory, a magnetic disk or an optical disk, and the like.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (18)

1. A data access method, characterized in that the method comprises: At each clock cycle, when multiple hardware accelerators HACs are detected to send data access requests through the hardware accelerator interface HAC-IF connected respectively with the multiple HACs, based on the priority of multiple data access requests, the priority of receiving highest data access request; Based on the type of the received data access request, storing the received data access request in a data queue of the logical master interface LMI; Based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus of the system on chip, perform data access to the storage resource of the SOC. 2. The method according to claim 1, wherein the type of the received data access request based on the received data access request is stored in the data queue of the logical main interface LMI, comprising: If the type of the received data access request is a data write request, the received data access request is stored after the last data access request in the first data queue of the LMI, and the first data queue is used to store the data write request ; If the type of the received data access request is a data read request, the received data access request is stored after the last data access request in the second data queue of the LMI, and the second data queue is used to store data read request. 3. The method according to claim 1, wherein the amount of data carried by the target data access request in the LMI-based data queue, the start address carried by the target data access request, and the system-on-chip SOC The maximum data volume of the data bus, data access to SOC storage resources, including: Obtain a target data write request from the first data queue of the LMI, and obtain a target data read request from the second data queue of the LMI; Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus, write the write data of the target data write request into the storage of the SOC resources; Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, read the The read data for the target data read request. 4. The method according to claim 3, wherein the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data of the SOC data bus amount, writing the write data of the target data write request into the storage resources of the SOC, including: Based on the first amount of data carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, obtain the write data from the target HAC, and perform a calculation on the number of times of obtaining the write data. Statistics to obtain the first number, the target HAC is the HAC that sends the target data write request; When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount and the first start address and the maximum data volume of the SOC data bus, split a sub-data write request from the target data write request, and perform protocol conversion on the sub-data write request to obtain a data write command, and the data write command carrying the first sub-data volume and the first sub-start address; When the first number reaches the second specified number of times, during the process of obtaining the next write data of the second specified number of times from the target HAC, the data write command is sent to the SOC data bus, and clearing the first count, recounting the first count, and returning to the previous step until the splitting of the target data write request is completed; When receiving the data write response returned by the SOC data bus, the write data of the data write command will be obtained from the target HAC multiple times, and sent to the SOC data bus one by one, so that the SOC data bus follows the The first sub-data amount and the first sub-start address write the received write data into the storage resources of the SOC. 5. The method according to claim 3, wherein the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data of the SOC data bus amount, writing the write data of the target data write request into the storage resources of the SOC, including: Based on the first amount of data carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, obtain the write data from the target HAC, and perform a calculation on the number of times of obtaining the write data. Statistics to obtain the first number, the target HAC is the HAC that sends the target data write request; When the first number reaches the first specified number of times, in the process of obtaining the next write data of the first specified number of times from the target HAC, based on the first data amount and the first start address and the maximum amount of data of the SOC data bus, split a sub-data write request from the target data write request, carry out protocol conversion with the sub-data write request, obtain a data write command, and return to this step until the The splitting of the target data write request is completed; Sending the data write command to the SOC data bus, the data write command carrying the first sub-data amount and the first sub-start address; When the data write response returned by the SOC data bus is received, the write data obtained from the target HAC for multiple times will be sent to the SOC data bus one by one, so that the SOC data bus will follow the first sub- The data amount and the first sub-start address are used to write the received write data into the storage resources of the SOC. 6. The method according to claim 4 or 5, wherein the first data amount carried by the target data write request, the first start address carried by the target data write request, and the chip data bus Bit width, obtain the write data from the target HAC, and count the number of times to obtain the write data to get the first number, including: Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of write data from the target HAC, the chip data The bus is a data bus connected to the LMI; Based on the acquisition times, sending indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into the acquisition times and send them; The write data sent by the target HAC is received, and the number of times of receiving the write data is counted to obtain the first number. 7. The method according to any one of claims 3-5, wherein the second data volume carried in the target data read request and the second start address carried in the target data read request and the maximum data volume of the SOC data bus, read the read data of the target data read request from the storage resources of the SOC, including: Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, split one from the target data read request A sub-data read request, and performing protocol conversion on the sub-data read request to obtain a data read command; Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start origin address; receiving the read data sent by the storage resource of the SOC through the SOC data bus, and counting the number of times of receiving the read data to obtain a second number of times; When the second number of times reaches the third specified number of times, during the process of the storage resource receiving the SOC sending the next read data of the third specified number of times through the SOC data bus, based on the second data amount, The second starting address and the maximum data volume of the SOC data bus, splitting the next sub-data read request from the target data read request, and performing protocol conversion on the next sub-data read request, Get the next data read command; When the second number of times reaches the fourth specified number of times, the storage resource receiving the SOC transmits the next read data of the fourth specified number of times through the SOC data bus, and sends the next data read command Send to the SOC data bus, clear the second count, re-count the second count, and return to the previous step until the target data read request is split. 8. The method according to any one of claims 3-5, wherein the second data volume carried in the target data read request and the second start address carried in the target data read request and the maximum data volume of the SOC data bus, read the read data of the target data read request from the storage resources of the SOC, including: Based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus, split one from the target data read request Subdata read request; Perform protocol conversion on the sub-data read request to obtain a data read command, and return to the previous step until the target data read request is split; Send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start origin address; The read data sent by the storage resource of the SOC through the SOC data bus is successively received. 9. The method of claim 1, further comprising: For each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, the number of data write commands sent is counted to obtain the first number of commands, and the data sent Count the number of read commands to obtain the second number of commands; When the number of the first command is equal to the first number threshold, stop receiving the data access request of the type sent by the HAC, which is a data write request, until the number of the first command is less than the first number threshold; When the second number of commands is equal to the second number threshold, stop receiving the data access request sent by the HAC, whose type is a data read request, until the second number of commands is less than the second number threshold. 10. A data access device, characterized in that the device comprises: The receiving module is used for each clock cycle, when detecting the data access requests sent by multiple hardware accelerators HAC through the hardware accelerator interface HAC-IF respectively connected with the multiple HACs, based on the priority of multiple data access requests level, receiving the data access request with the highest priority; A storage module, configured to store the received data access request in the data queue of the logical main interface LMI based on the type of the received data access request; The data access module is used to store the SOC based on the amount of data carried by the target data access request in the data queue of the LMI, the start address carried by the target data access request, and the maximum data amount of the SOC data bus of the system on chip. resources for data access. 11. The device according to claim 10, wherein the storage module comprises: The storage unit is configured to store the received data access request after the last data access request in the first data queue of the LMI if the type of the received data access request is a data write request, and the first data queue uses For storing data write requests; The storage unit is further configured to store the received data access request after the last data access request in the second data queue of the LMI if the type of the received data access request is a data read request, the The second data queue is used to store data read requests. 12. The device according to claim 10, wherein the data access module comprises: An acquisition unit, configured to acquire a target data write request from the first data queue of the LMI, and acquire a target data read request from the second data queue of the LMI; A writing unit, configured to write the target data write request based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the maximum data amount of the SOC data bus. Data is written into the storage resources of the SOC; A reading unit, configured to read from the storage of the SOC based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus. The resource reads the read data of the target data read request. 13. The device according to claim 12, wherein the writing unit comprises: The obtaining subunit is configured to obtain write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and Obtaining the number of times of writing data is counted to obtain the first number, and the target HAC is the HAC that sends the writing request of the target data; Splitting subunits, used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, The first start address and the maximum data volume of the SOC data bus, split a sub-data write request from the target data write request, and perform protocol conversion on the sub-data write request to obtain a data write command , the data write command carries a first sub-data amount and a first sub-start address; The sending subunit is used to send the data write command to The SOC data bus, and clear the first number, re-count the first number, and return to the previous split subunit until the target data write request is split; The sending subunit is further configured to obtain the write data of the data write command from the target HAC multiple times when receiving the data write response returned by the SOC data bus, and send them to the SOC data one by one bus, so that the SOC data bus writes the received write data into the storage resources of the SOC according to the first sub-data amount and the first sub-start address. 14. The device according to claim 12, wherein the writing unit comprises: The obtaining subunit is configured to obtain write data from the target HAC based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, and Obtaining the number of times of writing data is counted to obtain the first number, and the target HAC is the HAC that sends the writing request of the target data; Splitting subunits, used for obtaining the next write data of the first specified number of times from the target HAC when the first number reaches the first specified number of times, based on the first data amount, The first starting address and the maximum data volume of the SOC data bus, splitting a sub-data write request from the target data write request, performing protocol conversion on the sub-data write request, and obtaining a data write command, Return to the split subunit until the splitting of the target data write request is completed; A sending subunit, configured to send the data write command to the SOC data bus, where the data write command carries a first sub-data amount and a first sub-start address; The sending subunit is further configured to, when receiving the data write response returned by the SOC data bus, send the write data obtained from the target HAC multiple times to the SOC data bus one by one, so that the The SOC data bus writes the received write data into the storage resources of the SOC according to the first sub-data amount and the first sub-start address. 15. Apparatus as claimed in claim 13 or 14, characterized in that, The acquisition subunit is specifically used for: Based on the first data amount carried by the target data write request, the first start address carried by the target data write request, and the bit width of the chip data bus, calculate the number of acquisitions of write data from the target HAC, the chip data The bus is a data bus connected to the LMI; Based on the acquisition times, sending indication information to the target HAC, where the indication information is used to instruct the target HAC to divide the write data of the target data write request into the acquisition times and send them; The write data sent by the target HAC is received, and the number of times of receiving the write data is counted to obtain the first number. 16. The device according to any one of claims 12-14, wherein the reading unit comprises: splitting subunits, for reading from the target data based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus Splitting a sub-data read request from the request, and performing protocol conversion on the sub-data read request to obtain a data read command; A sending subunit, configured to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address; The receiving subunit is used to receive the read data sent by the storage resources of the SOC through the SOC data bus, and count the number of times of receiving the read data to obtain the second number of times; The splitting subunit is also used in the process of sending the next read data of the third specified number of times by the storage resource receiving the SOC through the SOC data bus when the second number of times reaches the third specified number of times , splitting the next sub-data read request from the target data read request based on the second data amount, the second start address, and the maximum data amount of the SOC data bus, and dividing the next sub-data read request Perform protocol conversion on a sub-data read request to obtain the next data read command; The sending subunit is also used for receiving the storage resource of the SOC in the process of sending the next read data of the fourth specified number of times through the SOC data bus when the second number of times reaches the fourth specified number of times , sending the next data read command to the SOC data bus, and clearing the second number of times, recounting the second number of times, and returning to the previous split subunit until the target data read request is split complete. 17. The device according to any one of claims 12-14, wherein the reading unit comprises: splitting subunits, for reading from the target data based on the second data amount carried by the target data read request, the second start address carried by the target data read request, and the maximum data amount of the SOC data bus Split a sub-data read request from the request; The protocol conversion subunit is used to perform protocol conversion on the sub-data read request, obtain a data read command, and return to the previous split sub-unit until the target data read request is split; A sending subunit, configured to send the data read command to the SOC data bus, so that the SOC data bus sends the data read command to the storage resource of the SOC, and the data read command carries the second sub-data amount and the second sub-start address; The receiving subunit is configured to successively receive the read data sent by the storage resources of the SOC through the SOC data bus. 18. The device of claim 10, further comprising: The statistical module is used for, for each HAC, when sending data write commands and data read commands belonging to the HAC to the SOC data bus, counting the number of data write commands sent to obtain the first number of commands, And counting the number of data read commands sent to obtain the second number of commands; A stop module, configured to stop receiving the data access request sent by the HAC when the number of the first command is equal to the first number threshold, until the number of the first command is less than the first number threshold a number threshold; The stop module is further configured to stop receiving data access requests sent by the HAC when the number of the second commands is equal to the second number threshold until the number of the second commands is less than The second number threshold.