CN104866423B - The test method and system of a kind of software configuration item - Google Patents
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Abstract
本发明涉及一种软件配置项的测试方法及系统,其系统包括网络接口模块、CPU处理模块、FPGA模块、信号转换模块、接口转换模块和存储模块;所述网络接口模块用于接收测试控制终端发送的测试序列;所述CPU处理模块用于接收测试序列,并对测试序列进行解析和调度,生成相应的测试指令,配置对应测试指令的测试接口参数;所述FPGA模块根据测试接口参数产生配置接口时序关系和测试数据;所述信号转换模块用于将接口时序关系和测试数据转换为与测试设备相匹配的测试激励信息;所述接口转换模块用于将被测设备根据测试激励信息做出的响应信息反馈到FPGA模块;所述存储模块用于存储响应信息。具有接口可灵活配置、便于携带和远程控制等优点。
The present invention relates to a method and system for testing software configuration items. The system includes a network interface module, a CPU processing module, an FPGA module, a signal conversion module, an interface conversion module and a storage module; the network interface module is used to receive a test control terminal The test sequence sent; the CPU processing module is used to receive the test sequence, and analyze and schedule the test sequence, generate corresponding test instructions, and configure the test interface parameters of the corresponding test instructions; the FPGA module generates configuration according to the test interface parameters Interface timing relationship and test data; the signal conversion module is used to convert the interface timing relationship and test data into test stimulus information that matches the test equipment; the interface conversion module is used to make the device under test according to the test stimulus information The response information is fed back to the FPGA module; the storage module is used to store the response information. It has the advantages of flexible interface configuration, portability and remote control.
Description
技术领域technical field
本发明涉及一种软件配置项的测试方法及系统。The invention relates to a testing method and system for software configuration items.
背景技术Background technique
软件配置项的测试目前采用的仿真测试系统主要有两种,一种是基于虚拟化平台的仿真配合脚本的测试,此种测试系统往往不能真实反映器件本身的实际特性,输入激励过于理想,被测对象已忽略电气特性,输出信号不一定能反映被测对象真实状态等弊端,此外仿真配合脚本测试方法需要花费大量的测试时间,测试效率低下;There are two main types of simulation test systems currently used for testing software configuration items. One is based on virtualization platform simulation with script testing. This kind of test system often cannot truly reflect the actual characteristics of the device itself, and the input stimulus is too ideal. The test object has ignored the electrical characteristics, and the output signal may not reflect the real state of the test object. In addition, the simulation and script test method need to spend a lot of test time, and the test efficiency is low;
第二种主要的测试系统是基于接口的半实物仿真测试系统,该系统基本采用通用独立的接口板卡,虽然此种测试系统能够反映真实物理器件的实际特性,但以任务为驱动的配置项级嵌入式系统测试,要求各个接口之间精确配合,基于接口的测试系统各个接口间协同工作的能力和时间精度无法保证。The second main test system is the hardware-in-the-loop simulation test system based on the interface. This system basically uses a general-purpose independent interface board. Although this test system can reflect the actual characteristics of the real physical device, the task-driven configuration item High-level embedded system testing requires precise cooperation between interfaces, and the ability and time accuracy of interface-based test systems to work together cannot be guaranteed.
近年来,随着软件配置项的软件规模和接口复杂度不断扩大,使得具有接口可配置、成本低、便于携带和远程可控制的测试系统方案变得更为迫切。In recent years, with the continuous expansion of software scale and interface complexity of software configuration items, it is more urgent to have a test system solution with configurable interface, low cost, portability and remote control.
发明内容Contents of the invention
本发明所要解决的技术问题是提供一种接口可配置、成本低、便于远程控制、适用于多外部接口的软件配置项的测试系统及方法。The technical problem to be solved by the present invention is to provide a testing system and method for software configuration items with configurable interfaces, low cost, convenient remote control, and applicable to multiple external interfaces.
本发明解决上述技术问题的技术方案如下:一种软件配置项的测试方法,具体包括以下步骤:The technical solution of the present invention to solve the above-mentioned technical problems is as follows: a method for testing software configuration items, specifically comprising the following steps:
步骤1:接收测试控制终端发送的测试序列;Step 1: Receive the test sequence sent by the test control terminal;
步骤2:判断是否执行测试序列,如果是,执行步骤3;否则,结束;Step 2: Determine whether to execute the test sequence, if yes, execute step 3; otherwise, end;
步骤3:对测试序列进行解析和调度,生成相应的测试指令,配置对应测试指令的测试接口参数;Step 3: Analyze and schedule the test sequence, generate corresponding test instructions, and configure test interface parameters corresponding to the test instructions;
步骤4:FPGA模块根据测试接口参数产生配置接口时序关系和测试数据;Step 4: The FPGA module generates configuration interface timing relationship and test data according to the test interface parameters;
步骤5:将接口时序关系和测试数据转换为与测试设备相匹配的测试激励信息;Step 5: Convert the interface timing relationship and test data into test stimulus information matching the test equipment;
步骤6:被测设备根据测试激励信息做出响应信息,并将响应信息反馈到FPGA模块;Step 6: The device under test makes response information according to the test stimulus information, and feeds the response information back to the FPGA module;
步骤7:存储并显示响应信息,完成测试。Step 7: Store and display the response information to complete the test.
本发明的有益效果是:本发明中,软件配置项的测试系统中信号转换模块和接口转换模块根据被测试设备的外部总线类型和物理接口特征,进行配置选择,由FPGA模块统一管理,便于集中控制,集成度高、成本低;相比传统的仿真测试系统节省了测试资源,更加符合软件配置项外部接口灵活多变的测试需求。本发明中,FPGA模块能够根据外部总线类型,配置各种时序模型,测试总线接口协议正常、异常的情况,完全实现可编程配置逻辑的自主化,有效解决各类商业板卡堆积带来的局限性。本发明中,CPU处理模块和网络接口模块可以通过以太网与测试监控系统相连接,组成分布式集合测试系统,测试监控系统通过以太网将测试序列发给软件配置项测试系统,同时接收测试数据进行实时回显、判读和存储,相比传统的软件配置项测试系统具有便于携带,远程控制等优点。The beneficial effects of the present invention are: in the present invention, the signal conversion module and the interface conversion module in the test system of the software configuration items are selected according to the external bus type and physical interface characteristics of the device under test, and are managed uniformly by the FPGA module, which is convenient for centralization Control, high integration, low cost; compared with the traditional simulation test system, it saves test resources and is more in line with the flexible and changeable test requirements of the external interface of software configuration items. In the present invention, the FPGA module can configure various timing models according to the type of the external bus, test whether the bus interface protocol is normal or abnormal, fully realize the autonomy of the programmable configuration logic, and effectively solve the limitations caused by the accumulation of various commercial boards and cards sex. In the present invention, the CPU processing module and the network interface module can be connected with the test monitoring system through the Ethernet to form a distributed collective test system, and the test monitoring system sends the test sequence to the software configuration item test system through the Ethernet, and receives test data at the same time Real-time echo, interpretation and storage, compared with the traditional software configuration item test system, has the advantages of portability and remote control.
在上述技术方案的基础上,本发明还可以做如下改进。On the basis of the above technical solutions, the present invention can also be improved as follows.
进一步,步骤3中通三态总线将测试指令和测试接口参数发送到FPGA模块。Further, in step 3, the test instruction and test interface parameters are sent to the FPGA module through the tri-state bus.
进一步,所述步骤2中根据系统本身的IP地址,由运行的操作系统及相关应用程序判断是否执行测试序列。Further, in the step 2, according to the IP address of the system itself, whether to execute the test sequence is judged by the running operating system and related application programs.
进一步,所述FPGA模块通过特定的接口根据接口协议采集响应信息,并将响应信息存入存储模块中。Further, the FPGA module collects response information through a specific interface according to the interface protocol, and stores the response information in the storage module.
本发明解决上述技术问题的技术方案如下:一种软件配置项的测试系统,包括网络接口模块、CPU处理模块、FPGA模块、信号转换模块、接口转换模块和存储模块;The technical solution of the present invention for solving the above-mentioned technical problems is as follows: a test system for software configuration items, including a network interface module, a CPU processing module, an FPGA module, a signal conversion module, an interface conversion module and a storage module;
所述网络接口模块用于接收测试控制终端发送的测试序列;The network interface module is used to receive the test sequence sent by the test control terminal;
所述CPU处理模块用于接收测试序列,并对测试序列进行解析和调度,生成相应的测试指令,配置对应测试指令的测试接口参数;The CPU processing module is used to receive test sequences, and analyze and schedule the test sequences, generate corresponding test instructions, and configure test interface parameters corresponding to the test instructions;
所述FPGA模块根据测试接口参数产生配置接口时序关系和测试数据;Described FPGA module produces configuration interface sequence relation and test data according to test interface parameter;
所述信号转换模块用于将接口时序关系和测试数据转换为与测试设备相匹配的测试激励信息;The signal conversion module is used to convert the interface timing relationship and test data into test stimulus information matched with the test equipment;
所述接口转换模块用于将被测设备根据测试激励信息做出的响应信息反馈到FPGA模块;The interface conversion module is used to feed back the response information made by the device under test according to the test stimulus information to the FPGA module;
所述存储模块用于存储响应信息。The storage module is used for storing response information.
本发明的有益效果是:本发明中,软件配置项的测试系统中信号转换模块和接口转换模块根据被测试设备的外部总线类型和物理接口特征,进行配置选择,由FPGA模块统一管理,便于集中控制,集成度高、成本低;相比传统的仿真测试系统节省了测试资源,更加符合软件配置项外部接口灵活多变的测试需求。本发明中,FPGA模块能够根据外部总线类型,配置各种时序模型,测试总线接口协议正常、异常的情况,完全实现可编程配置逻辑的自主化,有效解决各类商业板卡堆积带来的局限性。本发明中,CPU处理模块和网络接口模块可以通过以太网与测试监控系统相连接,组成分布式集合测试系统,测试监控系统通过以太网将测试序列发给软件配置项测试系统,同时接收测试数据进行实时回显、判读和存储,相比传统的软件配置项测试系统具有便于携带,远程控制等优点。The beneficial effects of the present invention are: in the present invention, the signal conversion module and the interface conversion module in the test system of the software configuration items are selected according to the external bus type and physical interface characteristics of the device under test, and are managed uniformly by the FPGA module, which is convenient for centralization Control, high integration, low cost; compared with the traditional simulation test system, it saves test resources and is more in line with the flexible and changeable test requirements of the external interface of software configuration items. In the present invention, the FPGA module can configure various timing models according to the type of the external bus, test whether the bus interface protocol is normal or abnormal, fully realize the autonomy of the programmable configuration logic, and effectively solve the limitations caused by the accumulation of various commercial boards and cards sex. In the present invention, the CPU processing module and the network interface module can be connected with the test monitoring system through the Ethernet to form a distributed collective test system, and the test monitoring system sends the test sequence to the software configuration item test system through the Ethernet, and receives test data at the same time Real-time echo, interpretation and storage, compared with the traditional software configuration item test system, has the advantages of portability and remote control.
在上述技术方案的基础上,本发明还可以做如下改进。On the basis of the above technical solutions, the present invention can also be improved as follows.
进一步,所述FPGA模块通过特定的接口根据接口协议采集响应信息,并将响应信息存入存储模块中;所述FPGA模块同时发送通知信息到CPU处理模块,所述CPU处理模块根据通知信息向读取模块读取响应信息,并将响应信息通过网络接口模块传输到外部显示端进行显示。Further, the FPGA module collects response information according to the interface protocol through a specific interface, and stores the response information in the storage module; the FPGA module sends notification information to the CPU processing module at the same time, and the CPU processing module sends the notification information to the reader according to the notification information. The fetching module reads the response information, and transmits the response information to an external display terminal through the network interface module for display.
进一步,所述FPGA模块通过普通的IO接口将接口时序关系和测试数据传递到信号转换模块。Further, the FPGA module transmits the interface timing relationship and test data to the signal conversion module through a common IO interface.
进一步,所述接口转换模块将响应信息通过外部物理接口和信号转换模块反馈到FPGA模块。Further, the interface conversion module feeds back the response information to the FPGA module through the external physical interface and the signal conversion module.
进一步,所述信号转换模块包括通用信号转换芯片、可配置芯片和PHY芯片,所述信号转换模块根据被测设备外部总线类型进行配置,以满足测试需要。Further, the signal conversion module includes a general signal conversion chip, a configurable chip and a PHY chip, and the signal conversion module is configured according to the type of the external bus of the device under test to meet the test requirements.
进一步,所述接口转换模块根据被测设备的物理接口进行配置选择接口。Further, the interface conversion module configures and selects an interface according to the physical interface of the device under test.
进一步,还包括电源模块,所述电源模块用于为网络接口模块、CPU处理模块、FPGA模块和信号转换模块供电。Further, a power supply module is also included, and the power supply module is used for supplying power to the network interface module, the CPU processing module, the FPGA module and the signal conversion module.
本测试系统将软件配置项中的各种外部接口集成到一块接口板卡上,由一片FPGA统一控制,能够有效、精确的仿真和模拟软件配置项的各类外部接口,根据保证测试的顺利进行,该测试系统具有接口可灵活配置、便于携带和远程控制等优点。This test system integrates various external interfaces in software configuration items into one interface board, which is uniformly controlled by an FPGA, and can effectively and accurately simulate and simulate various external interfaces of software configuration items. , the test system has the advantages of flexible interface configuration, portability and remote control.
本测试系统在整个测试过程中,首先经过网络接口模块接收测试执行系统发送的测试序列,并将测试序列传送到CPU处理模块进行处理;CPU处理模块将测试序列进行解析,生成并组织相应的测试指令,配置相应的测试接口参数,将指令和参数通过三态总线发送到FPGA模块;FPGA模块通过解析接收的测试指令和接口参数,根据接口参数产生和配置接口时序关系和测试数据,通过普通IO口传递给信号驱动模块;信号驱动模块将将FPGA模块输出的电信号转化成与测试设备相匹配的电气信号特征;通过物理接口转换模块将测试激励信息发送到被测试设备;被测试设备根据测试激励做出响应,响应信息通过被测设备的外部物理接口模块和信号驱动模块传递给FPGA模块;FPGA模块通过特定的接口根据接口协议采集测试响应信息,并将测试响应信息暂存在存储模块中,同时通知CPU处理模块;CPU处理模块根据通知信息向存储模块读取测试响应信息,并测试响应信息打包通过网络接口模块传送到测试监显系统,完成测试工作;During the whole test process, the test system first receives the test sequence sent by the test execution system through the network interface module, and transmits the test sequence to the CPU processing module for processing; the CPU processing module analyzes the test sequence, generates and organizes the corresponding test Instructions, configure the corresponding test interface parameters, and send the instructions and parameters to the FPGA module through the tri-state bus; the FPGA module generates and configures the interface timing relationship and test data according to the interface parameters by analyzing the received test instructions and interface parameters. port to the signal driver module; the signal driver module converts the electrical signal output by the FPGA module into an electrical signal characteristic that matches the test equipment; sends the test stimulus information to the device under test through the physical interface conversion module; the device under test according to the test The stimulus responds, and the response information is transmitted to the FPGA module through the external physical interface module and signal driver module of the device under test; the FPGA module collects the test response information through a specific interface according to the interface protocol, and temporarily stores the test response information in the storage module. At the same time, the CPU processing module is notified; the CPU processing module reads the test response information from the storage module according to the notification information, and the test response information is packaged and sent to the test monitoring system through the network interface module to complete the test work;
软件配置项的测试系统包括网络接口模块、CPU处理模块、FPGA模块、信号驱动模块、接口转换模块、电源模块和存储模块。其中:The test system of software configuration items includes network interface module, CPU processing module, FPGA module, signal driver module, interface conversion module, power supply module and storage module. in:
(1)网络接口模块是通过以太网络接口接收测试执行系统发送的测试序列和发送测试数据给测试监控系统;(1) The network interface module receives the test sequence sent by the test execution system and sends test data to the test monitoring system through the Ethernet interface;
(2)CPU处理模块将通过网络接口模块接收到的测试序列进行解析,并把测试序列转化成各种接口和总线的测试激励,同时接收FPGA模块采集的测试响应进行打包转送给网络模块进行传输;(2) The CPU processing module will analyze the test sequence received by the network interface module, and convert the test sequence into test stimuli for various interfaces and buses, and at the same time receive the test response collected by the FPGA module, package and transfer it to the network module for transmission ;
(3)FPGA模块实现各种总线接口(422总线、SPI总线、1553B总线、1394总线等)的时序关系,并将CPU模块转送的测试激励配置到各个接口;(3) The FPGA module realizes the timing relationship of various bus interfaces (422 bus, SPI bus, 1553B bus, 1394 bus, etc.), and configures the test stimulus transferred by the CPU module to each interface;
(4)信号驱动模块用FPGA模块输出的时序信号驱动相应信号特征芯片(BU61580、422芯片、LVDS芯片、AD/DA芯片、1394总线芯片等);(4) The signal driver module drives the corresponding signal feature chip (BU61580, 422 chip, LVDS chip, AD/DA chip, 1394 bus chip, etc.) with the timing signal output by the FPGA module;
(5)接口转换模块将各种信号统一到与软件配置项相匹配的物理接口上;电源模块驱动用于驱动测试系统中各个模块工作;(5) The interface conversion module unifies various signals to the physical interface that matches the software configuration items; the power module driver is used to drive the work of each module in the test system;
(6)存储模块用于存储CPU模块上的操作系统文件、临时运行程序和暂存FPGA采集的数据。(6) The storage module is used to store operating system files on the CPU module, temporary running programs and temporarily store data collected by the FPGA.
通过将这几部分相互连接组成软件配置项的测试系统;在测试过程中根据测试接口和测试任务的需求,利用软件配置项测试系统实现相应功能、性能、接口、边界和强度测试,并对测试数据进行存储回传。By connecting these parts with each other to form a test system for software configuration items; during the test process, according to the requirements of the test interface and test tasks, use the software configuration item test system to realize the corresponding function, performance, interface, boundary and strength tests, and test The data is stored and sent back.
信号转换模块包括1394链路层、物理层芯片、1553B芯片、422芯片、AD/DA芯片、LVDS芯片、OC门控芯片等,测试的总线接口为1394总线、1553B总线、422协议、LVDS数据采集和接收、AD/DA接口等;信号转换模块可以根据被测设备外部总线类型进行配置,以满足测试的需要。The signal conversion module includes 1394 link layer, physical layer chip, 1553B chip, 422 chip, AD/DA chip, LVDS chip, OC gate control chip, etc. The bus interface tested is 1394 bus, 1553B bus, 422 protocol, LVDS data acquisition And receiving, AD/DA interface, etc.; the signal conversion module can be configured according to the external bus type of the device under test to meet the needs of the test.
接口转换模块根据被测设备的物理接口进行配置选择。The interface conversion module performs configuration selection according to the physical interface of the device under test.
附图说明Description of drawings
图1为本发明所述的一种软件配置项的测试方法流程图;Fig. 1 is a flow chart of a testing method of a software configuration item according to the present invention;
图2为本发明所述的一种软件配置项的测试系统结构框图;Fig. 2 is a structural block diagram of a test system of a software configuration item according to the present invention;
图3为本发明具体实施例1所述的一种软件配置项的测试系统结构框图。FIG. 3 is a structural block diagram of a test system for a software configuration item described in Embodiment 1 of the present invention.
具体实施方式Detailed ways
以下结合附图对本发明的原理和特征进行描述,所举实例只用于解释本发明,并非用于限定本发明的范围。The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.
如图1所示,为本发明所述的一种软件配置项的测试方法,具体包括以下步骤:As shown in Figure 1, it is a method for testing a software configuration item according to the present invention, which specifically includes the following steps:
步骤1:接收测试控制终端发送的测试序列;Step 1: Receive the test sequence sent by the test control terminal;
步骤2:判断是否执行测试序列,如果是,执行步骤3;否则,结束;Step 2: Determine whether to execute the test sequence, if yes, execute step 3; otherwise, end;
步骤3:对测试序列进行解析和调度,生成相应的测试指令,配置对应测试指令的测试接口参数;Step 3: Analyze and schedule the test sequence, generate corresponding test instructions, and configure test interface parameters corresponding to the test instructions;
步骤4:FPGA模块根据测试接口参数产生配置接口时序关系和测试数据;Step 4: The FPGA module generates configuration interface timing relationship and test data according to the test interface parameters;
步骤5:将接口时序关系和测试数据转换为与测试设备相匹配的测试激励信息;Step 5: Convert the interface timing relationship and test data into test stimulus information matching the test equipment;
步骤6:被测设备根据测试激励信息做出响应信息,并将响应信息反馈到FPGA模块;Step 6: The device under test makes response information according to the test stimulus information, and feeds the response information back to the FPGA module;
步骤7:存储并显示响应信息,完成测试。Step 7: Store and display the response information to complete the test.
步骤3中通三态总线将测试指令和测试接口参数发送到FPGA模块。In step 3, the test command and test interface parameters are sent to the FPGA module through the three-state bus.
所述步骤2中根据系统本身的IP地址,由运行的操作系统及相关应用程序判断是否执行测试序列。In the step 2, according to the IP address of the system itself, whether to execute the test sequence is judged by the running operating system and related application programs.
所述FPGA模块通过特定的接口根据接口协议采集响应信息,并将响应信息存入存储模块中。The FPGA module collects response information through a specific interface according to the interface protocol, and stores the response information in the storage module.
如图2所示,为本发明所述的一种软件配置项的测试系统,包括网络接口模块1、CPU处理模块2、FPGA模块3、信号转换模块4、接口转换模块5和存储模块6;As shown in Figure 2, it is a test system of a software configuration item according to the present invention, including a network interface module 1, a CPU processing module 2, an FPGA module 3, a signal conversion module 4, an interface conversion module 5 and a storage module 6;
所述网络接口模块1用于接收测试控制终端发送的测试序列;The network interface module 1 is used to receive the test sequence sent by the test control terminal;
所述CPU处理模块2用于接收测试序列,并对测试序列进行解析和调度,生成相应的测试指令,配置对应测试指令的测试接口参数;The CPU processing module 2 is used to receive test sequences, and analyze and schedule the test sequences, generate corresponding test instructions, and configure test interface parameters corresponding to the test instructions;
所述FPGA模块3根据测试接口参数产生配置接口时序关系和测试数据;Described FPGA module 3 produces configuration interface sequence relation and test data according to test interface parameter;
所述信号转换模块4用于将接口时序关系和测试数据转换为与测试设备相匹配的测试激励信息;The signal conversion module 4 is used to convert the interface timing relationship and test data into test stimulus information matched with the test equipment;
所述接口转换模块5用于将被测设备根据测试激励信息做出的响应信息反馈到FPGA模块;The interface conversion module 5 is used to feed back the response information that the device under test makes according to the test stimulus information to the FPGA module;
所述存储模块6用于存储响应信息。The storage module 6 is used for storing response information.
所述FPGA模块3通过特定的接口根据接口协议采集响应信息,并将响应信息存入存储模块6中;所述FPGA模块3同时发送通知信息到CPU处理模块2,所述CPU处理模块2根据通知信息向读取模块读取响应信息,并将响应信息通过网络接口模块1传输到外部显示端进行显示。Described FPGA module 3 collects response information according to interface protocol through specific interface, and stores response information in storage module 6; Described FPGA module 3 sends notification information to CPU processing module 2 simultaneously, and described CPU processing module 2 according to notification The information reads response information from the reading module, and transmits the response information to an external display terminal through the network interface module 1 for display.
所述FPGA模块3通过普通的IO接口将接口时序关系和测试数据传递到信号转换模块4。The FPGA module 3 transmits the interface timing relationship and test data to the signal conversion module 4 through a common IO interface.
所述接口转换模块5将响应信息通过外部物理接口和信号转换模块4反馈到FPGA模块3。The interface conversion module 5 feeds back the response information to the FPGA module 3 through the external physical interface and the signal conversion module 4 .
所述信号转换模块4包括通用信号转换芯片、可配置芯片和PHY芯片,所述信号转换模块4根据被测设备外部总线类型进行配置,以满足测试需要。The signal conversion module 4 includes a general signal conversion chip, a configurable chip and a PHY chip, and the signal conversion module 4 is configured according to the type of the external bus of the device under test to meet the test requirements.
所述接口转换模块5根据被测设备的物理接口进行配置选择接口。The interface conversion module 5 configures and selects an interface according to the physical interface of the device under test.
还包括电源模块7,所述电源模块7用于为网络接口模块1、CPU处理模块2、FPGA模块3和信号转换模块4供电。A power supply module 7 is also included, and the power supply module 7 is used for supplying power to the network interface module 1 , the CPU processing module 2 , the FPGA module 3 and the signal conversion module 4 .
如图3所示,为本发明具体实施例1所述的一种软件配置项的测试系统,RJ45接口1、CPU处理器2、FPGA可编程配置器件3、由通用信号转换芯片、可配置芯片和PHY芯片组成的信号转换模块4、由标准连接器和自定义连接器组成的接口转换模块5、由DDR、SDRAM和FLASH组成的存储模块6,和电源模块7;RJ45接口1通过MII接口与CPU处理器2相连接;CPU处理器2通过Local Bus总线与FPGA可编程配置器件3进行通信;FPGA可编程配置器件3引出的GPIO和CLOCK信号来驱动由通用信号转换芯片、可配置芯片和PHY芯片组成信号转换模块4工作;由通用信号转换芯片、可配置芯片和PHY芯片组成信号转换模块4所外接的通信信号由由标准连接器和自定义连接器组成的接口转换模块5的物理接口来与被测设备进行交联通信;电源模块7来驱动和保证各个模块正常工作;由DDR、SDRAM和FLASH组成的存储模块6通过三态总线与CPU处理器2和FPGA可编程配置器件3相连接,并提供相关数据的存储设备。As shown in Figure 3, it is a test system of a kind of software configuration item described in Embodiment 1 of the present invention, RJ45 interface 1, CPU processor 2, FPGA programmable configuration device 3, by general signal conversion chip, configurable chip Signal conversion module 4 composed of PHY chip, interface conversion module 5 composed of standard connector and custom connector, storage module 6 composed of DDR, SDRAM and FLASH, and power module 7; RJ45 interface 1 communicates with The CPU processor 2 is connected; the CPU processor 2 communicates with the FPGA programmable configuration device 3 through the Local Bus bus; the GPIO and CLOCK signals drawn by the FPGA programmable configuration device 3 drive the general signal conversion chip, the configurable chip and the PHY The chip forms the signal conversion module 4 to work; the external communication signal of the signal conversion module 4 is composed of a general signal conversion chip, a configurable chip and a PHY chip by the physical interface of the interface conversion module 5 composed of a standard connector and a custom connector. Cross-link communication with the device under test; power supply module 7 to drive and ensure the normal operation of each module; storage module 6 composed of DDR, SDRAM and FLASH is connected to CPU processor 2 and FPGA programmable configuration device 3 through a three-state bus , and provide storage devices for related data.
本发明中,结合分布式测试系统拓扑结构,本测试系统接收到测试控制终端的发送测试任务,根据测试系统本身的IP地址,由运行在CPU处理模块2上Linux操作系统及相关应用程序来判断是否接收测试任务,如果接收测试任务序列,应用程序对测试序列进行解析和调度,如果为直接测试任务,则将测试参数通过Local Bus总线传送给FPGA模块3,运行在FPGA模块3上的可编程逻辑程序接收到测试激励,根据地址信号来驱动相应的信号转换模块4工作,输出的总线信号由接口转换模块5通过物理器件与被测试设备交互,被测试设备产生测试响应,通过接口转换模块5和信号转换模块4,由FPGA模块3采集暂存,并通过Local Bus传送给CPU处理模块2,应用程序对测试响应进行打包,经过网络接口模块1给相应的测试监显终端和测试服务器。In the present invention, in conjunction with the topological structure of the distributed test system, the test system receives the sending test task of the test control terminal, and according to the IP address of the test system itself, it is judged by the Linux operating system and related application programs running on the CPU processing module 2 Whether to receive the test task, if the test task sequence is received, the application program will analyze and schedule the test sequence, if it is a direct test task, the test parameters will be transmitted to the FPGA module 3 through the Local Bus, and the programmable program running on the FPGA module 3 The logic program receives the test stimulus and drives the corresponding signal conversion module 4 to work according to the address signal. The output bus signal is interacted with the device under test by the interface conversion module 5 through the physical device, and the device under test generates a test response. And the signal conversion module 4 is collected and temporarily stored by the FPGA module 3, and sent to the CPU processing module 2 through the Local Bus, and the application program packages the test response, and sends it to the corresponding test monitor terminal and test server through the network interface module 1.
信号转换模块4包括两种形式的配置结构:简单通用信号转换和可配置芯片+PHY芯片;简单通用信号转换模块只做信号转换,可配置芯片+PHY芯片用来产生特定的标准通信协议。还可以根据被测试软件配置项的外部接口进行自由配置扩展。The signal conversion module 4 includes two configuration structures: simple general signal conversion and configurable chip + PHY chip; simple general signal conversion module only performs signal conversion, and configurable chip + PHY chip is used to generate a specific standard communication protocol. It can also freely configure and expand according to the external interface of the tested software configuration item.
信号转换模块5由实际测试的软件配置项的外部物理接口表现形式,选取相应匹配标准物理连接或者自定义的物理连接器。The signal conversion module 5 selects a corresponding matching standard physical connection or a custom physical connector from the external physical interface expression form of the software configuration item actually tested.
以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.
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