CN104932152B - The manufacturing method of liquid crystal display panel and liquid crystal display panel - Google Patents

Abstract

The present invention provides a kind of liquid crystal display panel and its manufacturing method, the liquid crystal display panel includes array substrate and color membrane substrates, and the array substrate includes data line, scan line, thin film transistor (TFT) and open region.The array substrate further includes patterning flatness layer, it is formed on the data line, the scan line and the thin film transistor (TFT), and expose the open region, the patterning flatness layer being wherein located in the scan line forms a columnar projections, the columnar projections are supported between the array substrate and the color membrane substrates, without additionally making introns, to save the photosensitive type introns processing procedure on color membrane substrates.

Description

Liquid crystal display panel and method for manufacturing liquid crystal display panel

【Technical field】

The invention relates to the field of liquid crystal display, in particular to a liquid crystal display panel and a method for manufacturing the liquid crystal display panel.

【Background technique】

A traditional liquid crystal display panel includes a color filter (CF, Color filter) substrate, an array substrate and a liquid crystal. The color filter substrate includes a first glass substrate, a black matrix (BM, Black Matrix) layer, a colored pattern layer and a protective layer (OC, Over Coat) layer, the first glass substrate, a black matrix layer, a colored pattern layer and a protective layer The array substrate is sequentially stacked and arranged as a whole; the array substrate includes a second glass substrate, a gate line layer, an insulating layer, a semiconductor layer, a metal layer and a passivation layer, and the second glass substrate, a gate line layer, an insulating layer, a semiconductor layer, a metal layer The passivation layer and the passivation layer are sequentially stacked and arranged as a whole.

Spacers are used to support the color filter substrate and the array substrate of a traditional liquid crystal display panel. The color filter substrate and the array substrate are superimposed and combined, and there is a fixed-distance gap between the spacers, and the liquid crystal is placed in the gap. Generally, in a low temperature polysilicon (LTPS, Low Temperature Poly-silicon) thin film transistor liquid crystal display (ie, LTPS-TFT LCD), the spacer is realized by using a photo spacer (PS). For small and medium-sized products, the photosensitive spacers are formed on the color filter substrate. The specific color filter process is that after the black matrix layer, colored pattern layer, and protective layer are completed, photolithography using a photomask (Photomask) The process forms photosensitive spacers on specific areas on the protective layer.

However, the production of photosensitive spacers on the color filter substrate requires an additional high-cost photolithography process compared with the traditional color filter substrate, which is not conducive to cost reduction.

【Content of invention】

An object of the present invention is to provide a liquid crystal display panel, which forms a columnar protrusion as a spacer on the flat layer of the array substrate, thereby saving the photosensitive spacer process on the color filter substrate.

Another object of the present invention is to provide a method for manufacturing a liquid crystal display panel, which can be made into a flat layer and columnar protrusions as spacers through a halftone photolithography process through a single exposure, thereby saving the color filter substrate. Photosensitive spacer process.

In order to solve the above problems, a preferred embodiment of the present invention provides a liquid crystal display panel, which includes an array substrate and a color filter substrate, the array substrate includes data lines, scan lines and thin film transistors, the data lines and the The scan lines define the open area. The array substrate further includes a patterned planar layer, which is formed on the data lines, the scan lines and the thin film transistors, and exposes the opening area, wherein the patterned layers on the scan lines The flat layer forms a columnar protrusion, and the columnar protrusion is supported between the array substrate and the color filter substrate.

In a preferred embodiment of the present invention, the patterned flat layer forming the columnar protrusion has a first thickness, the patterned flat layer on the data line has a second thickness, and the first A thickness is greater than the second thickness. Preferably, the first thickness is between 2.8 and 3.2 microns, and the second thickness is between 2.1 and 2.6 microns. In addition, there is a thickness of a liquid crystal cell between the array substrate and the color filter substrate, and the first thickness is equal to the thickness of the liquid crystal cell.

In a preferred embodiment of the present invention, the thin film transistor is a low temperature polysilicon thin film transistor, and the liquid crystal display panel is a fringe field switching mode display panel. Preferably, the array substrate includes a base substrate, and a buffer layer, a semiconductor layer, a gate insulating layer, a gate metal layer, and an interlayer dielectric layer are sequentially formed on the base substrate at the position of the scanning line. , the patterned flat layer, common electrode layer, passivation layer and pixel electrode layer.

Similarly, in order to solve the above problems, another preferred embodiment of the present invention provides a method for manufacturing a liquid crystal display panel, which includes: providing an array substrate including data lines, scan lines and thin film transistors, the data lines and the The scanning line defines an opening area; coating a flat layer on the array substrate; patterning the flat layer by using a half-tone photolithography process to form a layer located on the data line, the scanning line and the thin film transistor. And expose the patterned flat layer of the opening area, wherein the patterned flat layer on the scanning line forms a columnar protrusion; and combine the array substrate and the color filter substrate to make the columnar protrusion Supported between the array substrate and the color filter substrate.

In a preferred embodiment of the present invention, the patterned flat layer forming the columnar protrusion has a first thickness, the patterned flat layer on the data line has a second thickness, and the first A thickness is greater than the second thickness. Preferably, the first thickness is between 2.8 and 3.2 microns, and the second thickness is between 2.1 and 2.6 microns.

In a preferred embodiment of the present invention, after combining the array substrate and the color filter substrate, there is a liquid crystal cell thickness between the array substrate and the color filter substrate, and the first thickness is equal to the thickness of the liquid crystal cell .

Compared with the prior art, the present invention forms columnar protrusions on the flat layer in the array substrate through a halftone photolithography process as a spacer between the array substrate and the color filter substrate, and removes the flat layer originally in the opening area, so as to A sufficient thickness of the liquid crystal cell between the array substrate and the color filter substrate is achieved without additional spacers, thereby saving the photosensitive spacer process on the color filter substrate.

In order to make the above content of the present invention more obvious and easy to understand, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

【Description of drawings】

1 is a schematic top view of an array substrate of a liquid crystal display panel of the present invention;

Fig. 2 is a schematic cross-sectional view of the liquid crystal display panel of Fig. 1 on the line segment AA';

Fig. 3 is a schematic cross-sectional view of the liquid crystal display panel of Fig. 1 on the line segment BB';

4 is a flowchart of a method for manufacturing a liquid crystal display panel in a preferred embodiment of the present invention;

FIG. 5A is a schematic diagram of step S10;

FIG. 5B is a schematic diagram of step S20;

FIG. 5C is a schematic diagram of step S30;

FIG. 5D is a schematic diagram of step S40.

【Detailed ways】

The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present invention can be practiced.

Referring to FIGS. 1 to 3, FIG. 1 is a schematic top view of the array substrate of the liquid crystal display panel of the present invention, FIG. 2 is a schematic cross-sectional view of the liquid crystal display panel of FIG. Schematic cross-section of BB' line segment. As shown in the figure, the liquid crystal display panel 10 of this embodiment includes an array substrate 20 , a color filter substrate 30 and a liquid crystal layer (not shown) therebetween.

As shown in FIG. 1, FIG. 1 shows a pixel structure on an array substrate 20. The array substrate 20 includes data lines 210, scan lines 220, and thin film transistors 230. The data lines 210 and the scan lines 220 define openings. The area 240, wherein the opening area 240 is the light-transmitting area.

In this embodiment, the thin film transistor 230 is a low temperature polysilicon (LTPS, Low Temperature Poly-silicon) thin film transistor. Specifically, as shown in FIG. 2, the array substrate 20 includes a base substrate 201, and a buffer layer (Buffer layer) 202 and a semiconductor layer 203 are sequentially formed on the base substrate 201 at the position of the scanning line 220. , gate insulating layer (GI layer) 204, gate metal layer (GE layer) 205, interlayer dielectric layer (ILD layer) 206, patterned flat layer (PLN layer) 207, common electrode layer 208, passivation layer 209 and the pixel electrode layer 210. The color filter substrate 30 includes a glass substrate 301 , a black matrix (BM) 302 , a color resist layer 303 , and an overcoat layer (OC) 304 thereon.

In this embodiment, no common electrode is provided on the color filter substrate 30, and the common electrode layer 208, the passivation layer 209, and the pixel electrode layer 210 of the array substrate 20 are all on the same substrate, so the liquid crystal display of this embodiment The panel 10 is a fringe field switching (FFS, Fringe Filed Switching) mode display panel that generates a horizontal electric field. However, the present invention is not limited thereto, AD-SDS (Advanced-Super Dimensional Switching, referred to as ADS, advanced super-dimensional field switch) type, IPS (In Plane Switch, transverse electric field effect) type, TN (Twist Nematic, twisted nematic ) type liquid crystal display panels are within the scope of the present invention.

It should be noted that the patterned planarization layer 207 is formed on the data line 210 , the scan line 220 and the thin film transistor 230 and exposes the opening region 240 . That is to say, the patterned planarization layer 207 of this embodiment does not entirely cover the interlayer dielectric layer 206 , but has holes dug in the opening area 240 to expose the interlayer dielectric layer 206 in the opening area 240 .

Referring to FIG. 1 and FIG. 2, the patterned flat layer 207 on the scanning line 220 forms a columnar protrusion 2071, and the columnar protrusion 2071 is supported between the array substrate 20 and the color filter substrate 30, and serves as spacer between the two substrates.

Referring to FIG. 1 and FIG. 3, FIG. 3 shows a schematic cross-sectional view of the liquid crystal display panel 10 located on the data line 210, where the array substrate 20 includes a base substrate 201, and is sequentially formed at the position of the scanning line 220. The gate insulating layer (GI layer) 204, interlayer dielectric layer (ILD layer) 206, source metal layer 211, patterned flat layer (PLN layer) 207, common electrode layer 208, passivation layer on the base substrate 201 layer 209 and pixel electrode layer 210.

As shown in FIG. 2 and FIG. 3, the patterned flat layer 207 forming the columnar protrusion 2071 has a first thickness T1, and the patterned flat layer located on the data line has a second thickness T2. , and the first thickness T1 is greater than the second thickness T2. Specifically, in this embodiment, the first thickness T1 is between 2.8 and 3.2 microns (μm), and the second thickness T2 is between 2.1 and 2.6 microns. As shown in FIG. 2 , there is a liquid crystal cell thickness (Cell gap) Cg between the array substrate 20 and the color filter substrate 30 , and the first thickness T1 is equal to the liquid crystal cell thickness Cg. That is to say, the columnar protrusion 2071 of this embodiment acts as a spacer between the two substrates, that is, the height of the columnar protrusion 2071 is equal to the thickness Cg of the liquid crystal cell.

The manufacturing method of the liquid crystal display panel of the present embodiment will be described in detail below, please refer to FIGS. 4 to 5D together. FIG. Schematic diagram of S10 to S40. The manufacturing method of the liquid crystal display panel of this embodiment starts at step S10.

Referring to FIG. 5A , in step S10 , an array substrate 20 including data lines 210 , scan lines 220 and thin film transistors 230 is provided, the data lines 210 and scan lines 220 define an opening area 240 , and then step S20 is performed. That is, a base substrate 201 is provided, and a buffer layer 202, a semiconductor layer 203, a gate insulating layer 204, a gate metal layer 205, and an interlayer interlayer are sequentially formed on the base substrate 201 at the position of the scanning line 220. Electrical layer 206. This step is well known to those skilled in the art and will not be described in detail here.

Referring to FIG. 5B , in step S20 , a flat layer 207 is coated on the array substrate 20 , and then step S30 is executed. Specifically, the flat layer 207 is a transparent organic material.

Please refer to FIG. 5C, in step S30, the planarization layer 207 is patterned by a half-tone photolithography process to form a After patterning the flat layer 207 in the opening area 240 , step S40 is performed, wherein the patterned flat layer 207 on the scan line 220 forms a columnar protrusion 2071 . It is worth mentioning that the above-mentioned halftone photolithography process includes the steps of coating photoresist layer, prebaking, halftone mask exposure, developing, postbaking, etching, stripping photoresist and so on.

Referring to FIG. 5D , in step S40 , a common electrode layer 208 , a passivation layer 209 and a pixel electrode layer 210 are formed, and then step S50 is performed. This step is well known to those skilled in the art and will not be described in detail here.

Please refer to FIG. 2 again. In step S50, the array substrate 20 and the color filter substrate 30 are combined so that the columnar protrusions 2071 are supported between the array substrate 20 and the color filter substrate 30, as two Spacers between substrates.

Similarly, the patterned flat layer 207 forming the columnar protrusion 2071 has a first thickness T1, the patterned flat layer 207 on the data line 220 has a second thickness T2, and the first thickness T1 greater than the second thickness T2. Preferably, the first thickness T1 can be easily set to be between 2.8 to 3.2 micrometers, and the second thickness T2 can be set to be between 2.1 to 2.6 micrometers through a halftone photolithography process. As shown in FIG. 2 , after combining the array substrate 20 and the color filter substrate 30 , there is a liquid crystal cell thickness Cg between the array substrate 20 and the color filter substrate 30 , and the first thickness T1 is equal to the liquid crystal cell thickness Cg.

To sum up, the present invention forms columnar protrusions 207 on the flat layer 207 in the array substrate 20 through a halftone photolithography process as spacers between the array substrate 20 and the color filter substrate 30, and removes the spacer in the opening area 240. The planarization layer 207 is used to achieve a sufficient liquid crystal cell thickness Cg between the array substrate 20 and the color filter substrate 30 without additional spacers, thereby saving the photosensitive spacer process on the color filter substrate.

Although the present invention has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present invention. Those skilled in the art can make various modifications and changes without departing from the spirit and scope of the present invention. Modification, therefore, the scope of protection of the present invention is subject to the scope defined by the claims.

Claims (10)

1. a kind of manufacturing method of liquid crystal display panel, which is characterized in that including：

There is provided include interlayer dielectric layer, data line, scan line and thin film transistor (TFT) array substrate, the data line and described sweep It retouches line and defines open region, wherein the interlayer dielectric layer is exposed in the open region；

Coating flat layer is in the array substrate；

Using halftoning photoetching process, successively include coating photoresist layer in the flatness layer, prebake, half-tone mask exposure, The processes such as development, rear roasting, etching, stripping photoresist pattern the flatness layer, to be formed positioned at the data line, the scanning On line and the thin film transistor (TFT) and the patterning flatness layer of the open region is exposed, wherein the institute in the scan line It states patterning flatness layer and forms a columnar projections；And

In conjunction with the array substrate and color membrane substrates so that the columnar projections are supported in the array substrate and the color film base Between plate.

2. the manufacturing method of liquid crystal display panel according to claim 1, which is characterized in that form the columnar projections The patterning flatness layer has a first thickness, and being located at the patterning flatness layer on the data line has one second thickness Degree, and the first thickness is more than the second thickness.

3. the manufacturing method of liquid crystal display panel according to claim 2, which is characterized in that the first thickness between Between 2.8 to 3.2 microns, the second thickness is between 2.1 to 2.6 microns.

4. the manufacturing method of liquid crystal display panel according to claim 2, which is characterized in that in conjunction with the array substrate and After the color membrane substrates, there is a thickness of liquid crystal box, described first thickness etc. between the array substrate and the color membrane substrates In the thickness of liquid crystal box.

5. a kind of liquid crystal display panel, including array substrate and color membrane substrates, the array substrate includes interlayer dielectric layer, data Line, scan line and thin film transistor (TFT), the data line and the scan line define open region, which is characterized in that the array Substrate further includes：

Flatness layer is patterned, is formed on the data line, the scan line and the thin film transistor (TFT), and exposes described open The interlayer dielectric layer is exposed in mouth region, the open region, wherein the patterning flatness layer in the scan line is formed One columnar projections, the columnar projections are supported between the array substrate and the color membrane substrates.

6. liquid crystal display panel according to claim 5, which is characterized in that form the patterning of the columnar projections Flatness layer has a first thickness, and the patterning flatness layer being located on the data line has a second thickness, and described First thickness is more than the second thickness.

7. liquid crystal display panel according to claim 6, which is characterized in that the first thickness is between 2.8 to 3.2 microns Between, the second thickness is between 2.1 to 2.6 microns.

8. liquid crystal display panel according to claim 6, which is characterized in that the array substrate and the color membrane substrates it Between have a thickness of liquid crystal box, the first thickness be equal to the thickness of liquid crystal box.

9. liquid crystal display panel according to claim 5, which is characterized in that the thin film transistor (TFT) is that low temperature polycrystalline silicon is thin Film transistor, and the liquid crystal display panel is fringe field switching mode display panel.

10. liquid crystal display panel according to claim 9, which is characterized in that the array substrate includes underlay substrate, simultaneously Buffer layer on the underlay substrate, semiconductor layer, gate insulating layer, grid metal are sequentially formed in the scan line position Layer, the interlayer dielectric layer, the patterning flatness layer, common electrode layer, passivation layer and pixel electrode layer.