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CN105047694B - A kind of junction termination structures of horizontal high voltage power device - Google Patents

A kind of junction termination structures of horizontal high voltage power device Download PDF

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CN105047694B
CN105047694B CN201510542990.6A CN201510542990A CN105047694B CN 105047694 B CN105047694 B CN 105047694B CN 201510542990 A CN201510542990 A CN 201510542990A CN 105047694 B CN105047694 B CN 105047694B
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junction termination
termination structures
drift region
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curvature
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CN105047694A (en
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乔明
王裕如
张晓菲
代刚
方冬
张波
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65Lateral DMOS [LDMOS] FETs
    • H10D30/655Lateral DMOS [LDMOS] FETs having edge termination structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts

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Abstract

The invention belongs to technical field of semiconductors, more particularly to a kind of junction termination structures of horizontal high voltage power device.The structure of the present invention, the inwall of N-type drift region 2 and the inwall of p type buried layer 9 extend to centre be connected with the inwall of N-type drift region 2 in direct junction termination structures and the inwall of p type buried layer 9 respectively in curvature junction termination structures, N-type drift region 2 and the inwall vertical direction of p type buried layer 9 all have ɑ degree angles in bearing of trend and direct junction termination structures, and ɑ degree angles are 45 degree;It so can effectively alleviate the curvature effect of junction electric field.The vertical direction of bearing of trend in junction, p type buried layer 9, apart from for 5 microns, improves charge unbalance problem beyond N-type drift region 2.Beneficial effects of the present invention are to improve the problem of straight line junction termination structures are with curvature junction termination structures connected component charge unbalance and junction electric field curvature effect, it is to avoid device punctures in advance, so that the breakdown voltage optimized.

Description

一种横向高压功率器件的结终端结构A Junction Termination Structure for Lateral High Voltage Power Devices

技术领域technical field

本发明属于半导体技术领域,具体的说涉及一种横向高压功率器件的结终端结构。The invention belongs to the technical field of semiconductors, and in particular relates to a junction terminal structure of a lateral high-voltage power device.

背景技术Background technique

高压功率集成电路的发展离不开可集成的横向高压功率半导体器件。横向高压功率半导体器件通常为闭合结构,包括圆形、跑道型和叉指状等结构。对于闭合的跑道型结构和叉指状结构,在弯道部分和指尖部分会出现小曲率终端,电场线容易在小曲率半径处发生集中,从而导致器件在小曲率半径处提前发生雪崩击穿,这对于横向高压功率器件版图结构提出了新的挑战。The development of high-voltage power integrated circuits is inseparable from the integration of lateral high-voltage power semiconductor devices. Lateral high-voltage power semiconductor devices are usually closed structures, including circular, racetrack and interdigitated structures. For the closed racetrack structure and interdigitated structure, there will be small curvature terminations in the curved part and the fingertip part, and the electric field lines are easy to concentrate at the small curvature radius, which will lead to early avalanche breakdown of the device at the small curvature radius , which poses new challenges to the layout structure of lateral high-voltage power devices.

公开号为CN102244092A的中国专利公开了“一种横向高压功率器件的结终端结构,如图1所示,器件终端结构包括漏极N+1、N型漂移区2、P型衬底3、栅极多晶硅4、栅氧化层5、P-well区6、源极N+7、源极P+8。器件结构分为两部分,包括直线结终端结构和曲率结终端结构。直线结终端结构中,P-well区6与N型漂移区2相连,当漏极施加高电压时,P-well区6与N型漂移区2所构成的PN结冶金结面开始耗尽,轻掺杂N型漂移区2的耗尽区将主要承担耐压,电场峰值出现在P-well区6与N型漂移区2所构成的PN结冶金结面。为解决高掺杂P-well区6与轻掺杂N型漂移区2所构成的PN结曲率冶金结面的电力线高度集中,造成器件提前发生雪崩击穿的问题,专利采用了如图1所示的曲率结终端结构,高掺杂P-well区6与轻掺杂P型衬底3相连,轻掺杂P型衬底3与轻掺杂N型漂移区2相连,高掺杂P-well区6与轻掺杂N型漂移区2的距离为LP。当器件漏极加高压时,器件源极指尖曲率部分轻掺杂P型衬底3与轻掺杂N型漂移区2相连,代替了高掺杂P-well区6与轻掺杂N型漂移区2所构成的PN结冶金结面,轻掺杂P型衬底3为耗尽区增加附加电荷,既有效降低了由于高掺杂P-well区6处的高电场峰值,又与N型漂移区2引入新的电场峰值。由于P型衬底3和N型漂移区2都是轻掺杂,所以在同等偏置电压条件下,冶金结处电场峰值降低。又由于器件指尖曲率部分高掺杂P-well区6与轻掺杂P型衬底3的接触增大了P型曲率终端处的半径,缓解了电场线的过度集中,避免器件在源极指尖曲率部分的提前击穿,提高器件指尖曲率部分的击穿电压。同时,该专利所提出的结终端结构还应用在三重RESURF结构器件中。图2为器件直线结终端结构中N型漂移区2为三重RESURF结构的器件剖面示意图;图3为器件曲率结终端结构中N型漂移区2为三重RESURF结构的器件剖面示意图。然而,该专利在三重RESURF结构器件下,对直线结终端结构和曲率结终端结构相连部分的终端结构没有进行优化,在相连部分,由于电荷的不平衡以及连接处电场仍存在曲率效应,会导致功率器件提前击穿,因此器件耐压不是最优值。The Chinese patent with the publication number CN102244092A discloses "a junction terminal structure of a lateral high-voltage power device, as shown in Fig. Extreme polysilicon 4, gate oxide layer 5, P-well region 6, source N + 7, source P + 8. The device structure is divided into two parts, including a straight junction termination structure and a curvature junction termination structure. In the straight junction termination structure , the P-well region 6 is connected to the N-type drift region 2. When a high voltage is applied to the drain, the PN junction metallurgical junction formed by the P-well region 6 and the N-type drift region 2 begins to deplete, and the lightly doped N-type The depletion region of the drift region 2 will mainly bear the withstand voltage, and the peak value of the electric field appears at the PN junction metallurgical junction formed by the P-well region 6 and the N-type drift region 2. The power lines of the PN junction curvature metallurgical junction formed by the heterogeneous N-type drift region 2 are highly concentrated, causing the problem of avalanche breakdown in advance. The patent adopts the curvature junction terminal structure as shown in Figure 1, and the highly doped P-well The region 6 is connected to the lightly doped P-type substrate 3, the lightly doped P-type substrate 3 is connected to the lightly doped N-type drift region 2, and the highly doped P-well region 6 is connected to the lightly doped N-type drift region 2. The distance is L P. When high voltage is applied to the drain of the device, the lightly doped P-type substrate 3 connected to the lightly doped N-type drift region 2 in the curvature of the fingertip of the device source replaces the highly doped P-well region 6 and the The PN junction metallurgical junction formed by the lightly doped N-type drift region 2, the lightly doped P-type substrate 3 adds additional charges to the depletion region, which effectively reduces the high electric field due to the highly doped P-well region 6 peak, and introduces a new electric field peak with the N-type drift region 2. Since the P-type substrate 3 and the N-type drift region 2 are lightly doped, the electric field peak at the metallurgical junction is reduced under the same bias voltage condition. Due to the contact between the highly doped P-well region 6 of the device fingertip curvature and the lightly doped P-type substrate 3, the radius of the P-type curvature terminal is increased, the excessive concentration of electric field lines is alleviated, and the device is avoided in the source finger. The early breakdown of the tip curvature increases the breakdown voltage of the fingertip curvature of the device. At the same time, the junction termination structure proposed in this patent is also applied to the triple RESURF structure device. Figure 2 shows the N-type drift in the straight junction termination structure of the device Area 2 is a device cross-sectional schematic diagram of a triple RESURF structure; Fig. 3 is a device cross-sectional schematic diagram of a triple RESURF structure in an N-type drift region 2 in a device curvature junction terminal structure. However, this patent is under a triple RESURF structure device, and the linear junction terminal structure The terminal structure of the part connected to the curvature junction terminal structure is not optimized. In the connected part, due to the charge imbalance and the curvature effect of the electric field at the connection, the power device will break down early, so the device withstand voltage is not optimal.

发明内容Contents of the invention

本发明所要解决的,就是针对传统器件电荷不平衡以及连接处电场曲率效应的缺陷,提出一种横向高压功率器件的结终端结构。What the present invention aims to solve is to propose a junction terminal structure of a lateral high-voltage power device, aiming at the defects of charge imbalance of traditional devices and electric field curvature effect at connections.

为实现上述目的,本发明采用如下技术方案:To achieve the above object, the present invention adopts the following technical solutions:

一种横向高压功率器件的结终端结构,如图4所示,包括直线结终端结构和曲率结终端结构;A junction termination structure of a lateral high-voltage power device, as shown in FIG. 4 , includes a straight junction termination structure and a curvature junction termination structure;

所述直线结终端结构与横向高压功率器件有源区结构相同,包括漏极N+接触区1、N型漂移区2、P型衬底3、栅极多晶硅4、栅氧化层5、P-well区6、源极N+接触区7、源极P+接触区8、P型埋层9;P-well区6与N型漂移区2位于P型衬底3的上层,其中P-well区6位于中间,两边是N型漂移区2,且P-well区6与N型漂移区2相连;N型漂移区2中远离P-well区6的两侧是漏极N+接触区1,P-well区6的表面具有与金属化源极相连的源极N+接触区7和源极P+接触区8,其中源极P+接触区8位于中间,源极N+接触区7位于源极P+接触区8两侧;P型埋层9位于N型漂移区2中,在P-well区6与N+接触区1之间;源极N+接触区7与N型漂移区2之间的P-well区6表面的上方是栅氧化层5,栅氧化层5的表面的上方是栅极多晶硅4。The linear junction terminal structure is the same as that of the active region of the lateral high-voltage power device, including the drain N + contact region 1, the N-type drift region 2, the P-type substrate 3, the gate polysilicon 4, the gate oxide layer 5, the P- Well region 6, source N + contact region 7, source P + contact region 8, P-type buried layer 9; P-well region 6 and N-type drift region 2 are located on the upper layer of P-type substrate 3, where P-well Region 6 is located in the middle, with N-type drift region 2 on both sides, and P-well region 6 is connected to N-type drift region 2; both sides of N-type drift region 2 away from P-well region 6 are drain N + contact regions 1 , the surface of the P-well region 6 has a source N + contact region 7 and a source P + contact region 8 connected to the metallized source, wherein the source P + contact region 8 is located in the middle, and the source N + contact region 7 Located on both sides of the source P + contact region 8; the P-type buried layer 9 is located in the N-type drift region 2, between the P-well region 6 and the N + contact region 1; the source N + contact region 7 is connected to the N-type drift region Above the surface of the P-well region 6 between the regions 2 is the gate oxide layer 5 , and above the surface of the gate oxide layer 5 is the gate polysilicon 4 .

所述曲率结终端结构包括漏极N+接触区1、N型漂移区2、P型衬底3、栅极多晶硅4、栅氧化层5、P-well区6、源极P+接触区8、P型埋层9;P-well区6表面上方是栅氧化层5,栅氧化层5的表面上方是栅极多晶硅4;曲率结终端结构中的N+接触区1、N型漂移区2、栅极多晶硅4、栅氧化层5和P型埋层9分别与直线结终端结构中的N+接触区1、N型漂移区2、栅极多晶硅4、栅氧化层5和P型埋层9相连并形成环形结构;其中,曲率结终端结构中的环形N+接触区1包围环形N型漂移区2,曲率结终端结构中的环形N型漂移区2内有环形栅极多晶硅4和环形栅氧化层5;与“直线结终端结构中的P-well区6与N型漂移区2相连”不同的是,曲率结终端结构中的P-well区6与N型漂移区2不相连且相互间距为LP,LP的具体取值范围在数微米至数十微米之间;The curvature junction termination structure includes a drain N + contact region 1, an N-type drift region 2, a P-type substrate 3, a gate polysilicon 4, a gate oxide layer 5, a P-well region 6, and a source P + contact region 8 , P-type buried layer 9; the gate oxide layer 5 is above the surface of the P-well region 6, and the gate polysilicon 4 is above the surface of the gate oxide layer 5; N + contact region 1 and N-type drift region 2 in the curvature junction termination structure , gate polysilicon 4, gate oxide layer 5 and P-type buried layer 9 are respectively connected with N + contact region 1, N-type drift region 2, gate polysilicon 4, gate oxide layer 5 and P-type buried layer in the linear junction termination structure 9 are connected and form a ring structure; wherein, the ring-shaped N + contact region 1 in the curvature junction termination structure surrounds the ring-shaped N-type drift region 2, and the ring-shaped N-type drift region 2 in the curvature junction termination structure has a ring-shaped gate polysilicon 4 and a ring Gate oxide layer 5; different from "the P-well region 6 in the linear junction termination structure is connected to the N-type drift region 2", the P-well region 6 in the curvature junction termination structure is not connected to the N-type drift region 2 and The mutual spacing is L P , and the specific value range of L P is between a few microns and tens of microns;

其特征在于,所述曲率结终端结构中N型漂移区2与直线结终端结构中N型漂移区2连接处靠近P-well区6的一侧,曲率结终端结构中N型漂移区2的末端具有第一斜面,所述第一斜面与P-well区6连接,第一斜面与器件横线方向具有ɑ度夹角;所述曲率结终端结构中P型埋层9与直线结终端结构中P型埋层9连接处靠近P-well区6的一侧,曲率结终端结构中P型埋层9的末端具有第二斜面,所述第二斜面与第一斜面平行;ɑ度夹角的具体取值范围为30度到60度;所述第一斜面和第二斜面之间的间距为b,b的具体取值范围为0到15微米;所述曲率结终端结构中的环形P型埋层9的内壁与曲率结终端结构中的环形N型漂移区2和P型衬底3的连接处的间距为a。It is characterized in that the junction of the N-type drift region 2 in the curvature junction termination structure and the N-type drift region 2 in the linear junction termination structure is close to the side of the P-well region 6, and the N-type drift region 2 in the curvature junction termination structure is The end has a first slope, the first slope is connected to the P-well region 6, and the first slope has an angle of α degrees with the direction of the horizontal line of the device; in the curvature junction termination structure, the P-type buried layer 9 and the straight junction termination structure The junction of the P-type buried layer 9 is close to the side of the P-well region 6, and the end of the P-type buried layer 9 in the curvature junction terminal structure has a second slope, and the second slope is parallel to the first slope; The specific value range of is 30 degrees to 60 degrees; the distance between the first slope and the second slope is b, and the specific value range of b is 0 to 15 microns; the ring P in the curvature junction terminal structure The distance between the inner wall of the type buried layer 9 and the connection between the annular N-type drift region 2 and the P-type substrate 3 in the curvature junction termination structure is a.

本发明总的技术方案,在直线结终端结构和曲率结终端结构相连部分,曲率结终端结构中N型漂移区2内壁向中间延伸至与直接结终端结构中N型漂移区2内壁连接,延伸方向与直接结终端结构中N型漂移区2内壁垂直方向具有ɑ度夹角,ɑ度夹角的具体取值范围为30度到60度;所述曲率结终端结构中P型埋层9内壁向中间延伸至与直接结终端结构中P型埋层9内壁连接,延伸方向与直接结终端结构中P型埋层9内壁垂直方向具有ɑ度夹角,ɑ度夹角的具体取值范围为30度到60度;相较于传统结构,在连接处以ɑ度角连接直线结终端结构和曲率结终端结构,可以有效缓解连接处电场的曲率效应。在连接处延伸方向的垂直方向,P型埋层9与N型漂移区2之间有间距b,b的具体取值范围0-15微米。在实际工艺中,N型漂移区2通过离子注入形成,在退火推结后,N型漂移区2会向外扩散,将P型埋层9超出N型漂移区2一些距离,使得扩散出去的N型漂移区2有P型杂质耗尽,这样,在直线结终端结构和曲率结终端结构相连部分,电荷不平衡的问题得以改善,从而得到最优化的击穿电压。在上述方案中,应当理解的是,直线结终端结构中P型埋层9和曲率结终端结构中P型埋层9的外壁是指整个器件中P型埋层9靠近N+接触区1的一侧,内壁是指整个器件中P型埋层9靠近P型衬底3的一侧;其他部位的外壁与内壁均为此含义。In the general technical solution of the present invention, in the connecting part of the straight junction terminal structure and the curvature junction termination structure, the inner wall of the N-type drift region 2 in the curvature junction termination structure extends to the middle to connect with the inner wall of the N-type drift region 2 in the direct junction termination structure, extending The direction and the vertical direction of the inner wall of the N-type drift region 2 in the direct junction terminal structure have an included angle of α degrees, and the specific value range of the included angle of α degrees is 30 degrees to 60 degrees; the inner wall of the P-type buried layer 9 in the curvature junction terminal structure Extending to the middle to connect with the inner wall of the P-type buried layer 9 in the direct junction terminal structure, the extension direction has an included angle of ɑ degrees with the vertical direction of the inner wall of the P-type buried layer 9 in the direct junction terminal structure, and the specific value range of the included angle of ɑ degrees is 30 degrees to 60 degrees; compared with the traditional structure, connecting the straight junction terminal structure and the curvature junction terminal structure at an angle of ɑ degrees at the connection can effectively alleviate the curvature effect of the electric field at the connection. In the direction perpendicular to the extending direction of the connection, there is a distance b between the P-type buried layer 9 and the N-type drift region 2, and the specific value of b is in the range of 0-15 microns. In the actual process, the N-type drift region 2 is formed by ion implantation. After annealing pushes the junction, the N-type drift region 2 will diffuse outward, and the P-type buried layer 9 will exceed the N-type drift region 2 by some distance, so that the diffused The N-type drift region 2 is depleted with P-type impurities. In this way, the problem of charge imbalance can be improved at the connecting portion of the straight junction terminal structure and the curvature junction terminal structure, thereby obtaining an optimized breakdown voltage. In the above scheme, it should be understood that the outer wall of the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure refers to a part of the P-type buried layer 9 close to the N+ contact region 1 in the entire device. The side and the inner wall refer to the side of the P-type buried layer 9 close to the P-type substrate 3 in the entire device; the outer and inner walls of other parts have this meaning.

进一步的,所述曲率结终端结构中P型埋层9外壁与直线结终端结构中P型埋层9外壁位于N型漂移区2中,所述曲率结终端结构中的环形P型埋层9的内壁与曲率结终端结构中的环形N型漂移区2和P型衬底3的连接处的间距为a,a的具体取值范围为0到15微米。Further, the outer wall of the P-type buried layer 9 in the curvature junction termination structure and the outer wall of the P-type buried layer 9 in the linear junction termination structure are located in the N-type drift region 2, and the ring-shaped P-type buried layer 9 in the curvature junction termination structure The distance between the inner wall and the joint between the annular N-type drift region 2 and the P-type substrate 3 in the curvature junction terminal structure is a, and the specific value of a ranges from 0 to 15 microns.

进一步的,所述直线结终端结构中P型埋层9的内壁位于曲率结终端结构中的N型漂移区2中。Further, the inner wall of the P-type buried layer 9 in the linear junction termination structure is located in the N-type drift region 2 in the curvature junction termination structure.

进一步的,所述直线结终端结构中P型埋层9的内壁位于曲率结终端结构中的P型衬底3中。Further, the inner wall of the P-type buried layer 9 in the linear junction termination structure is located in the P-type substrate 3 in the curvature junction termination structure.

进一步的,所述第二斜面位于曲率结终端结构中的N型漂移区2中。Further, the second slope is located in the N-type drift region 2 in the curvature junction termination structure.

进一步的,所述第二斜面位于曲率结终端结构中的P型衬底3中。Further, the second slope is located in the P-type substrate 3 in the curvature junction terminal structure.

本发明的有益效果为,本发明通过对直线结终端结构与曲率结终端结构相连部分的终端结构进行分析和优化,改善直线结终端结构与曲率结终端结构相连部分电荷不平衡的问题以及电场曲率效应,避免器件提前击穿,从而得到最优化的击穿电压。The beneficial effect of the present invention is that, by analyzing and optimizing the terminal structure of the connecting part of the linear junction terminal structure and the curvature junction terminal structure, the present invention improves the problem of charge imbalance and the electric field curvature Effect, to avoid premature breakdown of the device, so as to obtain the optimal breakdown voltage.

附图说明Description of drawings

图1为传统的横向高压功率半导体器件的结终端结构示意图;FIG. 1 is a schematic diagram of a junction terminal structure of a conventional lateral high-voltage power semiconductor device;

图2为传统的器件直线结终端结构中N型漂移区2为三重RESURF结构的器件剖面示意图;FIG. 2 is a schematic cross-sectional view of a device in which the N-type drift region 2 is a triple RESURF structure in a conventional straight-line junction terminal structure;

图3为传统的器件曲率结终端结构中N型漂移区2为三重RESURF结构的器件剖面示意图;3 is a schematic cross-sectional view of a device in which the N-type drift region 2 is a triple RESURF structure in a traditional device curvature junction terminal structure;

图4为本发明的横向高压功率器件的结终端结构示意图;4 is a schematic diagram of a junction terminal structure of a lateral high-voltage power device of the present invention;

图5为实施例1的结构示意图;Fig. 5 is the structural representation of embodiment 1;

图6为实施例2的结构示意图;Fig. 6 is the structural representation of embodiment 2;

图7为实施例3的结构示意图;Fig. 7 is the structural representation of embodiment 3;

图8为实施例4的结构示意图。FIG. 8 is a schematic structural diagram of Embodiment 4.

具体实施方式detailed description

下面结合附图和实施例,详细描述本发明的技术方案:Below in conjunction with accompanying drawing and embodiment, describe technical solution of the present invention in detail:

实施例1:Example 1:

如图5所示,本例的结构为包括直线结终端结构和曲率结终端结构;As shown in Figure 5, the structure of this example includes a straight line knot terminal structure and a curvature knot terminal structure;

所述直线结终端结构与横向高压功率器件有源区结构相同,包括漏极N+接触区1、N型漂移区2、P型衬底3、栅极多晶硅4、栅氧化层5、P-well区6、源极N+接触区7、源极P+接触区8、P型埋层9;P-well区6与N型漂移区2位于P型衬底3的上层,其中P-well区6位于中间,两边是N型漂移区2,且P-well区6与N型漂移区2相连;N型漂移区2中远离P-well区6的两侧是漏极N+接触区1,P-well区6的表面具有与金属化源极相连的源极N+接触区7和源极P+接触区8,其中源极P+接触区8位于中间,源极N+接触区7位于源极P+接触区8两侧;P型埋层9位于N型漂移区2中,在P-well区6与N+接触区1之间;源极N+接触区7与N型漂移区2之间的P-well区6表面的上方是栅氧化层5,栅氧化层5的表面的上方是栅极多晶硅4。The linear junction terminal structure is the same as that of the active region of the lateral high-voltage power device, including the drain N + contact region 1, the N-type drift region 2, the P-type substrate 3, the gate polysilicon 4, the gate oxide layer 5, the P- Well region 6, source N + contact region 7, source P + contact region 8, P-type buried layer 9; P-well region 6 and N-type drift region 2 are located on the upper layer of P-type substrate 3, where P-well Region 6 is located in the middle, with N-type drift region 2 on both sides, and P-well region 6 is connected to N-type drift region 2; both sides of N-type drift region 2 away from P-well region 6 are drain N + contact regions 1 , the surface of the P-well region 6 has a source N + contact region 7 and a source P + contact region 8 connected to the metallized source, wherein the source P + contact region 8 is located in the middle, and the source N + contact region 7 Located on both sides of the source P + contact region 8; the P-type buried layer 9 is located in the N-type drift region 2, between the P-well region 6 and the N + contact region 1; the source N + contact region 7 is connected to the N-type drift region Above the surface of the P-well region 6 between the regions 2 is the gate oxide layer 5 , and above the surface of the gate oxide layer 5 is the gate polysilicon 4 .

所述曲率结终端结构包括漏极N+接触区1、N型漂移区2、P型衬底3、栅极多晶硅4、栅氧化层5、P-well区6、源极P+接触区8、P型埋层9;P-well区6表面上方是栅氧化层5,栅氧化层5的表面上方是栅极多晶硅4;曲率结终端结构中的N+接触区1、N型漂移区2、栅极多晶硅4、栅氧化层5和P型埋层9分别与直线结终端结构中的N+接触区1、N型漂移区2、栅极多晶硅4、栅氧化层5和P型埋层9相连并形成环形结构;其中,曲率结终端结构中的环形N+接触区1包围环形N型漂移区2,曲率结终端结构中的环形N型漂移区2内有环形栅极多晶硅4和环形栅氧化层5;与“直线结终端结构中的P-well区6与N型漂移区2相连”不同的是,曲率结终端结构中的P-well区6与N型漂移区2不相连且相互间距为LP,LP的具体取值范围在数微米至数十微米之间;The curvature junction termination structure includes a drain N + contact region 1, an N-type drift region 2, a P-type substrate 3, a gate polysilicon 4, a gate oxide layer 5, a P-well region 6, and a source P + contact region 8 , P-type buried layer 9; the gate oxide layer 5 is above the surface of the P-well region 6, and the gate polysilicon 4 is above the surface of the gate oxide layer 5; N + contact region 1 and N-type drift region 2 in the curvature junction termination structure , gate polysilicon 4, gate oxide layer 5 and P-type buried layer 9 are respectively connected with N + contact region 1, N-type drift region 2, gate polysilicon 4, gate oxide layer 5 and P-type buried layer in the linear junction termination structure 9 are connected and form a ring structure; wherein, the ring-shaped N + contact region 1 in the curvature junction termination structure surrounds the ring-shaped N-type drift region 2, and the ring-shaped N-type drift region 2 in the curvature junction termination structure has a ring-shaped gate polysilicon 4 and a ring Gate oxide layer 5; different from "the P-well region 6 in the linear junction termination structure is connected to the N-type drift region 2", the P-well region 6 in the curvature junction termination structure is not connected to the N-type drift region 2 and The mutual spacing is L P , and the specific value range of L P is between a few microns and tens of microns;

所述曲率结终端结构中N型漂移区2内壁向中间延伸至与直接结终端结构中N型漂移区2内壁连接,延伸方向与直接结终端结构中N型漂移区2内壁垂直方向具有ɑ度夹角,ɑ度夹角为45度;所述曲率结终端结构中P型埋层9内壁向中间延伸至与直接结终端结构中P型埋层9内壁连接,延伸方向与直接结终端结构中P型埋层9内壁垂直方向具有ɑ度夹角,ɑ度夹角为45度;所述直线结终端结构中P型埋层9和曲率结终端结构中P型埋层9的连接处位于P型衬底3中,直线结终端结构中P型埋层9和曲率结终端结构中P型埋层9的连接处与直接结终端结构中N型漂移区2和曲率结终端结构中N型漂移区2的连接处的间距为b,b为5微米;所述曲率结终端结构中的环形P型埋层9的内壁位于N型漂移区2中,曲率结终端结构中的环形P型埋层9的内壁与曲率结终端结构中的环形N型漂移区2和P型衬底3的连接处的间距为a,a为5微米。The inner wall of the N-type drift region 2 in the curvature junction termination structure extends to the middle to connect with the inner wall of the N-type drift region 2 in the direct junction termination structure, and the extension direction has a degree to the vertical direction of the inner wall of the N-type drift region 2 in the direct junction termination structure. The included angle is 45 degrees; the inner wall of the P-type buried layer 9 in the curvature junction terminal structure extends to the middle to connect with the inner wall of the P-type buried layer 9 in the direct junction termination structure, and the extension direction is the same as that in the direct junction termination structure. The vertical direction of the inner wall of the P-type buried layer 9 has an included angle of ɑ degrees, and the included angle of ɑ degrees is 45 degrees; the connection between the P-type buried layer 9 in the linear junction terminal structure and the P-type buried layer 9 in the curvature junction terminal structure is located at P In the substrate 3, the junction of the P-type buried layer 9 in the straight-line junction termination structure and the P-type buried layer 9 in the curvature junction termination structure and the N-type drift region 2 in the direct junction termination structure and the N-type drift in the curvature junction termination structure The distance between the junctions of the regions 2 is b, and b is 5 microns; the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2, and the ring-shaped P-type buried layer in the curvature junction termination structure The distance between the inner wall of 9 and the connection between the annular N-type drift region 2 and the P-type substrate 3 in the curvature junction termination structure is a, and a is 5 microns.

本例的工作原理为:曲率结终端结构中N型漂移区2内壁向中间延伸至与直接结终端结构中N型漂移区2内壁连接,延伸方向与直接结终端结构中N型漂移区2内壁垂直方向具有ɑ度夹角,ɑ度夹角为45度;所述曲率结终端结构中P型埋层9内壁向中间延伸至与直接结终端结构中P型埋层9内壁连接,延伸方向与直接结终端结构中P型埋层9内壁垂直方向具有ɑ度夹角,ɑ度夹角为45度;这样,相较于传统结构,在连接处以45度角连接直线结终端结构和曲率结终端结构,可以有效缓解连接处电场的曲率效应。直线结终端结构和曲率结终端结构相连部分,在连接处延伸方向的垂直方向,P型埋层9超出N型漂移区2距离为5微米。在实际工艺中,N型漂移区2通过离子注入形成,在退火推结后,N型漂移区2会扩散,将P型埋层9超出N型漂移区2一些距离,使得扩散出去的N型漂移区2有P型杂质耗尽,这样,在直线结终端结构和曲率结终端结构相连部分,电荷不平衡与连接处电场曲率效应的问题得以改善,从而得到更优化的击穿电压。The working principle of this example is: the inner wall of the N-type drift region 2 in the curvature junction termination structure extends to the middle to connect with the inner wall of the N-type drift region 2 in the direct junction termination structure, and the extension direction is the same as the inner wall of the N-type drift region 2 in the direct junction termination structure The vertical direction has an included angle of α degree, and the included angle of α degree is 45 degrees; the inner wall of the P-type buried layer 9 in the curvature junction terminal structure extends to the middle to connect with the inner wall of the P-type buried layer 9 in the direct junction terminal structure, and the extension direction is the same as In the direct junction terminal structure, the vertical direction of the inner wall of the P-type buried layer 9 has an included angle of ɑ degrees, and the included angle of ɑ degrees is 45 degrees; thus, compared with the traditional structure, the straight junction terminal structure and the curvature junction terminal are connected at an angle of 45 degrees at the junction The structure can effectively alleviate the curvature effect of the electric field at the junction. In the connecting portion of the linear junction terminal structure and the curvature junction terminal structure, the distance between the P-type buried layer 9 and the N-type drift region 2 is 5 microns in the vertical direction to the extending direction of the connection. In the actual process, the N-type drift region 2 is formed by ion implantation. After annealing pushes the junction, the N-type drift region 2 will diffuse, and the P-type buried layer 9 will exceed the N-type drift region 2 by some distance, so that the diffused N-type The drift region 2 is depleted with P-type impurities. In this way, the problem of charge imbalance and the curvature effect of the electric field at the connection is improved in the connecting portion of the straight junction termination structure and the curvature junction termination structure, thereby obtaining a more optimized breakdown voltage.

实施例2Example 2

如图6所示,本例与实施例1不同的地方在于,本例中曲率结终端结构中的环形P型埋层9的内壁位于P型衬底3中,其原理与实施例1相同。As shown in FIG. 6 , this example differs from Example 1 in that the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure is located in the P-type substrate 3 , and the principle is the same as that of Example 1.

实施例3Example 3

如图7所示,本例与实施例2不同的地方在于,本例中直线结终端结构P型埋层9和曲率结终端结构中P型埋层9的连接处位于N型漂移区2中,其原理与实施例2相同。As shown in Figure 7, the difference between this example and Example 2 is that in this example, the junction of the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2 , its principle is the same as that of Embodiment 2.

实施例4Example 4

如图8所示,本例与实施例1不同的地方在于,本例中直线结终端结构P型埋层9和曲率结终端结构中P型埋层9的连接处位于N型漂移区2中,其原理与实施例1相同。As shown in Figure 8, the difference between this example and Example 1 is that in this example, the junction of the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2 , its principle is the same as in Example 1.

Claims (6)

1. a kind of junction termination structures of horizontal high voltage power device, including straight line junction termination structures and curvature junction termination structures;
The straight line junction termination structures are identical with horizontal high voltage power device active area structure, including drain electrode N+Contact zone (1), N-type Drift region (2), P type substrate (3), grid polycrystalline silicon (4), gate oxide (5), P-well areas (6), source electrode N+Contact zone (7), source Pole P+Contact zone (8), p type buried layer (9);P-well areas (6) are located at the upper strata of P type substrate (3), wherein P- with N-type drift region (2) Well areas (6) are located at centre, and both sides are N-type drift region (2), and P-well areas (6) are connected with N-type drift region (2);N-type is drifted about The both sides away from P-well areas (6) are drain electrode N in area (2)+Contact zone (1), the surface of P-well areas (6) has and metallization source Extremely connected source electrode N+Contact zone (7) and source electrode P+Contact zone (8), wherein source electrode P+Contact zone (8) is located at centre, source electrode N+Connect Touch area (7) and be located at source electrode P+Contact zone (8) both sides;P type buried layer (9) is located in N-type drift region (2), in P-well areas (6) and N+ Between contact zone (1);Source electrode N+It is grid oxygen above P-well areas (6) surface between contact zone (7) and N-type drift region (2) It is grid polycrystalline silicon (4) to change above layer (5), the surface of gate oxide (5);
The curvature junction termination structures include drain electrode N+Contact zone (1), N-type drift region (2), P type substrate (3), grid polycrystalline silicon (4), gate oxide (5), P-well areas (6), source electrode P+Contact zone (8), p type buried layer (9);P-well areas (6) surface is Gate oxide (5), the surface of gate oxide (5) is grid polycrystalline silicon (4);N in curvature junction termination structures+Contact zone (1), N-type drift region (2), grid polycrystalline silicon (4), gate oxide (5) and p type buried layer (9) respectively with straight line junction termination structures N+Contact zone (1), N-type drift region (2), grid polycrystalline silicon (4), gate oxide (5) are connected with p type buried layer (9) and form ring Shape structure;Wherein, the annular N in curvature junction termination structures+Contact zone (1) surrounds annular N-type drift region (2), curvature knot terminal There are annular grid polysilicon (4) and annular gate oxide (5) in annular N-type drift region (2) in structure;With " straight line knot terminal P-well areas (6) in structure are connected from N-type drift region (2) " unlike, the P-well areas (6) in curvature junction termination structures It is not attached to N-type drift region (2) and each other away from for LP, LPSpecific span at a few micrometers between some tens of pm;
Characterized in that, N-type drift region (2) in N-type drift region (2) and straight line junction termination structures in the curvature junction termination structures The end of junction N-type drift region (2) in the side of P-well areas (6), curvature junction termination structures has the first inclined-plane, institute State the first inclined-plane to be connected with P-well areas (6), the first inclined-plane has ɑ degree angles with device crossline direction;The curvature knot terminal In structure in p type buried layer (9) and straight line junction termination structures p type buried layer (9) junction close to the side of P-well areas (6), curvature The end of p type buried layer (9) has the second inclined-plane in junction termination structures, and second inclined-plane is parallel with the first inclined-plane;ɑ degree angles Specific span is 30 degree to 60 degree;Spacing between first inclined-plane and the second inclined-plane is b, b specific span For 0 to 15 microns;The inwall of ring-shaped P type buried regions (9) in the curvature junction termination structures and the ring in curvature junction termination structures The spacing of the junction of shape N-type drift region (2) and P type substrate (3) is a.
2. a kind of junction termination structures of horizontal high voltage power device according to claim 1, it is characterised in that the curvature P type buried layer (9) outer wall is located in N-type drift region (2) with p type buried layer (9) outer wall in straight line junction termination structures in junction termination structures, The inwall of ring-shaped P type buried regions (9) in the curvature junction termination structures and the annular N-type drift region in curvature junction termination structures (2) and the spacing of junction of P type substrate (3) is a, a specific span is 0 to 15 microns.
3. a kind of junction termination structures of horizontal high voltage power device according to claim 2, it is characterised in that the straight line The inwall of p type buried layer (9) is located in the N-type drift region (2) in curvature junction termination structures in junction termination structures.
4. a kind of junction termination structures of horizontal high voltage power device according to claim 2, it is characterised in that the straight line The inwall of p type buried layer (9) is located in the P type substrate (3) in curvature junction termination structures in junction termination structures.
5. the junction termination structures of a kind of horizontal high voltage power device according to claim 3 or 4, it is characterised in that described Second inclined-plane is located in the N-type drift region (2) in curvature junction termination structures.
6. the junction termination structures of a kind of horizontal high voltage power device according to claim 3 or 4, it is characterised in that described Second inclined-plane is located in the P type substrate (3) in curvature junction termination structures.
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