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CN105244316A - Mask-assisted method for preparing porous GaN layer - Google Patents

Mask-assisted method for preparing porous GaN layer Download PDF

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CN105244316A
CN105244316A CN201510675079.2A CN201510675079A CN105244316A CN 105244316 A CN105244316 A CN 105244316A CN 201510675079 A CN201510675079 A CN 201510675079A CN 105244316 A CN105244316 A CN 105244316A
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mask
sio2
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齐成军
张嵩
陈建丽
王再恩
徐永宽
程红娟
兰飞飞
李宝珠
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CETC 46 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off

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Abstract

本发明涉及一种掩膜辅助制备多孔GaN层的方法-,即为在氮化镓(GaN)基片上通过光刻制作掩膜之后经腐蚀制备多孔GaN层的方法-,通过在GaN基片上光刻条形掩膜图案,采用射频磁控溅射法在具有掩膜图案的基片上镀制SiO2薄膜,经丙酮清洗去除光刻胶,连同胶上的SiO2一起去除获得SiO2条形掩膜。然后利用HVPE设备进行较短时间的GaN外延生长,生长中先后采用两种工艺,第一种为纵向生长能力较强的工艺,第二种为横向生长能力较强的工艺,两种工艺生长时间需严格控制,使得SiO2掩膜不完全被GaN所覆盖,进而利用氢氟酸(HF)腐蚀SiO2,获得多孔GaN层,将制备的多孔GaN层作为薄弱层,继续GaN晶体生长工艺,该技术效果制作的多孔GaN层均匀,可实现辅助GaN自剥离,制作方法简单、可控。

The invention relates to a mask-assisted method for preparing a porous GaN layer—that is, a method for preparing a porous GaN layer by etching a mask after making a mask on a gallium nitride (GaN) substrate by photolithography—by photolithography on a GaN substrate Carve a stripe mask pattern, use radio frequency magnetron sputtering method to plate SiO2 thin film on the substrate with mask pattern, wash with acetone to remove photoresist, and remove together with SiO2 on the glue to obtain SiO2 stripe mask. Then use HVPE equipment to carry out GaN epitaxial growth for a short period of time. During the growth, two processes are used successively. The first is a process with strong vertical growth capability, and the second is a process with strong lateral growth capability. The growth time of the two processes is Strict control is required so that the SiO2 mask is not completely covered by GaN, and then the SiO2 is corroded by hydrofluoric acid (HF) to obtain a porous GaN layer, and the prepared porous GaN layer is used as a weak layer to continue the GaN crystal growth process. The technical effect The prepared porous GaN layer is uniform, can realize assisted GaN self-stripping, and the manufacturing method is simple and controllable.

Description

一种掩膜辅助制备多孔GaN层的方法A mask-assisted method for preparing porous GaN layer

技术领域 technical field

本发明涉及一种制备多孔GaN层的方法,特别涉及一种掩膜辅助制备多孔GaN层的方法。 The invention relates to a method for preparing a porous GaN layer, in particular to a mask-assisted method for preparing a porous GaN layer.

背景技术 Background technique

氮化镓(GaN)是一种直接带隙宽禁带半导体材料,帯隙宽度为3.4eV,其较高的击穿电压、强化学稳定性、耐高温耐腐蚀等特点,使GaN在LED、紫外探测器等光电领域和高温大功率、高频器件等微电子领域均有着广阔的应用前景。GaN的生长目前主要以蓝宝石或其他单晶材料作衬底通过气相外延法获得,由于自支撑GaN在器件制作方面具有其独特的优势,所以需要衬底和外延层分离技术,现有剥离技术包括腐蚀剥离、激光剥离、注氢剥离以及自剥离等,其中腐蚀剥离过程中外延层也会受到侵蚀,激光剥离后剥离界面粗糙且完整性不能保证,注氢剥离会受注入深度的限制,所以目前最为常用的是自剥离技术。自剥离技术关键在于薄弱层的制作,利用多孔GaN层作为剥离时候的薄弱层,不仅可以缓解生长中的应力,而且在降温过程中由于热失配的存在会使得衬底和外延层之间实现分离。因此,在当前自支撑GaN晶体制备中,多孔GaN的制作已经成为了辅助GaN自剥离的关键技术。 Gallium Nitride (GaN) is a semiconductor material with a direct bandgap and a wide bandgap. Photoelectric fields such as ultraviolet detectors and microelectronics fields such as high-temperature, high-power, and high-frequency devices have broad application prospects. The growth of GaN is currently mainly obtained by vapor phase epitaxy using sapphire or other single crystal materials as substrates. Since self-supporting GaN has its unique advantages in device manufacturing, it requires the separation technology of substrate and epitaxial layer. Existing stripping technologies include Corrosion stripping, laser stripping, hydrogen injection stripping and self-stripping, etc., in which the epitaxial layer will also be eroded during the corrosion stripping process. After laser stripping, the stripping interface is rough and the integrity cannot be guaranteed. Hydrogen injection stripping will be limited by the implantation depth, so the current The most commonly used is the self-stripping technique. The key to the self-stripping technology lies in the fabrication of the weak layer. Using the porous GaN layer as the weak layer during the peeling can not only relieve the stress during growth, but also make the gap between the substrate and the epitaxial layer realizable due to the existence of thermal mismatch during the cooling process. separate. Therefore, in the current preparation of self-supporting GaN crystals, the fabrication of porous GaN has become a key technology to assist GaN self-exfoliation.

发明内容 Contents of the invention

鉴于GaN生长的自剥离技术已成为了目前半导体行业研究热点,本发明利用SiO2掩膜腐蚀辅助制作多孔GaN层,用以作为薄弱层辅助GaN自剥离工艺,具体技术方案是,一种掩膜辅助制备多孔GaN层的方法,其特征在于:工艺步骤为, In view of the fact that the self-stripping technology of GaN growth has become a research hotspot in the semiconductor industry at present, the present invention uses SiO2 mask etching to assist in the fabrication of porous GaN layers, which are used as weak layers to assist the GaN self-stripping process. The specific technical solution is, a mask-assisted The method for preparing a porous GaN layer is characterized in that: the process steps are,

(1)在GaN基片上制备SiO2条形掩膜 (1) Preparation of SiO2 stripe mask on GaN substrate

a)利用HVPE设备,在2inchc面蓝宝石上生长一层约5μm厚的GaN薄膜,作为基片, a) Using HVPE equipment, grow a layer of GaN film with a thickness of about 5 μm on the 2inchc surface sapphire as the substrate,

b)光刻条形掩膜,利用匀胶机在GaN基片上均匀涂覆一层光刻胶,然后在加热平台约70°C下烘胶10min,接着采用条形掩膜版在光刻机上曝光,曝光时间在20~30s之间,曝光结束之后,利用比例为1:50的KOH水溶液或其他显影液进行显影,显影时间控制在1min左右,最后在70°C下烘干固胶,即可获得条形光刻掩膜, b) Photolithographic strip mask, uniformly coat a layer of photoresist on the GaN substrate with a coater, then bake the glue on a heating platform at about 70°C for 10 minutes, and then use a strip mask on the photolithography machine Exposure, the exposure time is between 20 and 30s. After the exposure is over, use KOH aqueous solution or other developer with a ratio of 1:50 to develop. The development time is controlled at about 1min. Finally, dry the glue at 70°C, that is Strip photolithography masks are available,

c)打开磁控溅射仪,在具有掩膜图案的GaN基片上通过调节溅射功率和溅射时间来镀制厚度为100~200nm的SiO2薄膜, c) Turn on the magnetron sputtering apparatus, and plate a SiO2 film with a thickness of 100-200 nm on the GaN substrate with a mask pattern by adjusting the sputtering power and sputtering time,

d)取出镀膜片,然后在丙酮浸泡下超声清洗,去除光刻胶以及胶上SiO2,再经去离子水漂洗,即在GaN基片上获得SiO2条形掩膜, d) Take out the coated film, and then ultrasonically clean it in acetone to remove the photoresist and SiO2 on the glue, and then rinse it with deionized water to obtain a SiO2 strip mask on the GaN substrate.

(2)利用具有掩膜图案GaN基片制备多孔GaN层 (2) Prepare a porous GaN layer by using a GaN substrate with a mask pattern

a)将(1)中制备好的GaN掩膜基片放入HVPE设备,升温到1020°C, a) Put the GaN mask substrate prepared in (1) into the HVPE equipment, and heat up to 1020°C,

b)在N2做载气条件下,首先采用纵向生长能力较强的工艺,通过控制生长时间,达到使得GaN生长高度不超过掩膜高度, b) Under the condition of N2 as the carrier gas, first adopt a process with strong vertical growth capability, and control the growth time so that the growth height of GaN does not exceed the height of the mask,

c)变换加载工艺,采用横向生长的能力较强工艺,要保证GaN的侧向外延生长不完全覆盖SiO2掩膜,即顶部留有间隙, c) Change the loading process, adopt a process with strong lateral growth ability, and ensure that the lateral epitaxial growth of GaN does not completely cover the SiO2 mask, that is, there is a gap at the top,

d)待GaN外延生长完毕之后取出样片,放入1:10浓度HF酸水溶液中,HF酸从顶部间隙渗入SiO2掩膜层,最终去除GaN外延层中的SiO2,获得多孔结构。 d) After the GaN epitaxial growth is completed, take out the sample and put it into a 1:10 concentration of HF acid aqueous solution. The HF acid penetrates into the SiO2 mask layer from the top gap, and finally removes the SiO2 in the GaN epitaxial layer to obtain a porous structure.

本发明的技术效果是,制作的多孔GaN层均匀,可实现辅助GaN自剥离,制作方法简单、可控。 The technical effect of the invention is that the prepared porous GaN layer is uniform, can realize auxiliary GaN self-stripping, and the manufacturing method is simple and controllable.

附图说明 Description of drawings

图1是本发明的工艺流程图。 Fig. 1 is a process flow diagram of the present invention.

具体实施方式 detailed description

一种掩膜辅助制备多孔GaN层的方法,工艺步骤为, A method for mask-assisted preparation of a porous GaN layer, the process steps are:

(1)在GaN基片上制备SiO2条形掩膜 (1) Preparation of SiO2 stripe mask on GaN substrate

a)利用HVPE设备,在2inchc面蓝宝石上生长一层约5μm厚的GaN薄膜,作为基片, a) Using HVPE equipment, grow a layer of GaN film with a thickness of about 5 μm on the 2inchc surface sapphire as the substrate,

b)光刻条形掩膜,利用匀胶机在GaN基片上均匀涂覆一层光刻胶,然后在加热平台约70°C下烘胶10min,接着采用条形掩膜版在光刻机上曝光,曝光时间25s,曝光结束之后,利用比例为1:50的KOH水溶液或其他显影液进行显影,显影时间控制在1min左右,最后在70°C下烘干固胶,即可获得条形光刻掩膜, b) Photolithographic strip mask, uniformly coat a layer of photoresist on the GaN substrate with a coating machine, then bake the glue on a heating platform at about 70°C for 10 minutes, and then use a strip mask plate on the photolithography machine Exposure, the exposure time is 25s. After the exposure is over, use KOH aqueous solution or other developer with a ratio of 1:50 to develop. The development time is controlled at about 1min. Finally, dry the glue at 70°C to obtain strip light engraved mask,

c)打开磁控溅射仪,在具有掩膜图案的GaN基片上通过调节溅射功率和溅射时间来镀制厚度为200nm的SiO2薄膜, c) open the magnetron sputtering apparatus, on the GaN substrate with mask pattern by adjusting the sputtering power and sputtering time to plate a SiO2 film with a thickness of 200nm,

d)取出镀膜片,然后在丙酮浸泡下超声清洗,去除光刻胶以及胶上SiO2,再经去离子水漂洗,即在GaN基片上获得SiO2条形掩膜, d) Take out the coated film, and then ultrasonically clean it in acetone to remove the photoresist and SiO2 on the glue, and then rinse it with deionized water to obtain a SiO2 strip mask on the GaN substrate.

(2)利用具有掩膜图案GaN基片制备多孔GaN层 (2) Prepare a porous GaN layer by using a GaN substrate with a mask pattern

a)将(1)中制备好的GaN掩膜基片放入HVPE设备,升温到1020°C, a) Put the GaN mask substrate prepared in (1) into the HVPE equipment, and heat up to 1020°C,

b)在N2做载气条件下,首先采用纵向生长能力较强的工艺,通过控制生长时间,达到使得GaN生长高度不超过掩膜高度, b) Under the condition of N2 as the carrier gas, first adopt a process with strong vertical growth capability, and control the growth time so that the growth height of GaN does not exceed the height of the mask,

c)变换加载工艺,采用横向生长的能力较强工艺,要保证GaN的侧向外延生长不完全覆盖SiO2掩膜,即顶部留有间隙, c) Change the loading process, adopt a process with a strong lateral growth capability, and ensure that the lateral epitaxial growth of GaN does not completely cover the SiO2 mask, that is, there is a gap at the top,

d)待GaN外延生长完毕之后取出样片,放入1:10浓度HF酸水溶液中,HF酸从顶部间隙渗入SiO2掩膜层,最终去除GaN外延层中的SiO2,获得多孔结构。 d) After the GaN epitaxial growth is completed, take out the sample and put it into a 1:10 concentration of HF acid aqueous solution. The HF acid penetrates into the SiO2 mask layer from the top gap, and finally removes the SiO2 in the GaN epitaxial layer to obtain a porous structure.

将制作完成的多孔GaN样片放入HVPE设备中,继续进行之后的GaN厚膜外延生长,以多孔层作为薄弱层辅助GaN自剥离。 Put the finished porous GaN sample into the HVPE equipment, and continue the subsequent GaN thick film epitaxial growth, using the porous layer as a weak layer to assist GaN self-stripping.

Claims (1)

1.一种掩膜辅助制备多孔GaN层的方法,其特征在于:工艺步骤为, 1. A mask-assisted method for preparing a porous GaN layer, characterized in that: the process steps are, (1)在GaN基片上制备SiO2条形掩膜 (1) Preparation of SiO2 stripe mask on GaN substrate a)利用HVPE设备,在2inchc面蓝宝石上生长一层约5μm厚的GaN薄膜,作为基片, a) Using HVPE equipment, grow a layer of GaN film with a thickness of about 5 μm on the 2inchc surface sapphire as the substrate, b)光刻条形掩膜,利用匀胶机在GaN基片上均匀涂覆一层光刻胶,然后在加热平台约70°C下烘胶10min,接着采用条形掩膜版在光刻机上曝光,曝光时间在20~30s之间,曝光结束之后,利用比例为1:50的KOH水溶液或其他显影液进行显影,显影时间控制在1min左右,最后在70°C下烘干固胶,即可获得条形光刻掩膜, b) Photolithographic strip mask, uniformly coat a layer of photoresist on the GaN substrate with a coating machine, then bake the glue on a heating platform at about 70°C for 10 minutes, and then use a strip mask plate on the photolithography machine Exposure, the exposure time is between 20 and 30s. After the exposure is over, use KOH aqueous solution or other developer with a ratio of 1:50 to develop. The development time is controlled at about 1min. Finally, dry the glue at 70°C, that is Strip photolithography masks are available, c)打开磁控溅射仪,在具有掩膜图案的GaN基片上通过调节溅射功率和溅射时间来镀制厚度为100~200nm的SiO2薄膜, c) Turn on the magnetron sputtering apparatus, and plate a SiO2 film with a thickness of 100-200 nm on the GaN substrate with a mask pattern by adjusting the sputtering power and sputtering time, d)取出镀膜片,然后在丙酮浸泡下超声清洗,去除光刻胶以及胶上SiO2,再经去离子水漂洗,即在GaN基片上获得SiO2条形掩膜, d) Take out the coated film, and then ultrasonically clean it in acetone to remove the photoresist and SiO2 on the glue, and then rinse it with deionized water to obtain a SiO2 strip mask on the GaN substrate. (2)利用具有掩膜图案GaN基片制备多孔GaN层 (2) Prepare a porous GaN layer by using a GaN substrate with a mask pattern a)将(1)中制备好的GaN掩膜基片放入HVPE设备,升温到1020°C, a) Put the GaN mask substrate prepared in (1) into the HVPE equipment, and heat up to 1020°C, b)在N2做载气条件下,首先采用纵向生长能力较强的工艺,通过控制生长时间,达到使得GaN生长高度不超过掩膜高度, b) Under the condition of N2 as the carrier gas, first adopt a process with strong vertical growth capability, and control the growth time so that the growth height of GaN does not exceed the height of the mask, c)变换加载工艺,采用横向生长的能力较强工艺,要保证GaN的侧向外延生长不完全覆盖SiO2掩膜,即顶部留有间隙, c) Change the loading process, adopt a process with a strong lateral growth capability, and ensure that the lateral epitaxial growth of GaN does not completely cover the SiO2 mask, that is, there is a gap at the top, d)待GaN外延生长完毕之后取出样片,放入1:10浓度HF酸水溶液中,HF酸从顶部间隙渗入SiO2掩膜层,最终去除GaN外延层中的SiO2,获得多孔结构。 d) After the GaN epitaxial growth is completed, take out the sample and put it into a 1:10 concentration of HF acid aqueous solution. The HF acid penetrates into the SiO2 mask layer from the top gap, and finally removes the SiO2 in the GaN epitaxial layer to obtain a porous structure.
CN201510675079.2A 2015-10-19 2015-10-19 Mask-assisted method for preparing porous GaN layer Pending CN105244316A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107123589A (en) * 2017-06-26 2017-09-01 镓特半导体科技(上海)有限公司 Semiconductor structure, self-standing gan layer and preparation method thereof
CN107130293A (en) * 2016-02-29 2017-09-05 信越化学工业株式会社 The manufacture method of cvd diamond substrate
CN115148579A (en) * 2022-06-24 2022-10-04 东莞市中镓半导体科技有限公司 Preparation method of single crystal substrate
CN120555974A (en) * 2025-07-31 2025-08-29 山东大学 Patterned substrate and preparation method and application thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1441982A (en) * 2000-06-19 2003-09-10 日亚化学工业株式会社 Nitride semiconductor substrate and method for manufacturing same, and nitride semiconductor device using said substrate
US20070096147A1 (en) * 2005-11-02 2007-05-03 Hitachi Cable, Ltd. Nitride-based semiconductor substrate and method of making the same
CN104094421A (en) * 2012-02-06 2014-10-08 首尔伟傲世有限公司 Semiconductor element separation method using nanoporous structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1441982A (en) * 2000-06-19 2003-09-10 日亚化学工业株式会社 Nitride semiconductor substrate and method for manufacturing same, and nitride semiconductor device using said substrate
US20070096147A1 (en) * 2005-11-02 2007-05-03 Hitachi Cable, Ltd. Nitride-based semiconductor substrate and method of making the same
CN104094421A (en) * 2012-02-06 2014-10-08 首尔伟傲世有限公司 Semiconductor element separation method using nanoporous structure

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107130293A (en) * 2016-02-29 2017-09-05 信越化学工业株式会社 The manufacture method of cvd diamond substrate
CN107123589A (en) * 2017-06-26 2017-09-01 镓特半导体科技(上海)有限公司 Semiconductor structure, self-standing gan layer and preparation method thereof
CN107123589B (en) * 2017-06-26 2020-01-07 镓特半导体科技(上海)有限公司 Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
CN115148579A (en) * 2022-06-24 2022-10-04 东莞市中镓半导体科技有限公司 Preparation method of single crystal substrate
CN120555974A (en) * 2025-07-31 2025-08-29 山东大学 Patterned substrate and preparation method and application thereof

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