CN105245091B - The gate driving circuit of power MOS pipe in a kind of power inverter - Google Patents

Abstract

A gate drive circuit for a power MOS transistor in a power converter, comprising a DC voltage source V, a MOS transistor _Q1 , an energy storage capacitor C, an energy storage inductance L, a MOS transistor _Q2 , and a MOS transistor _Q3 , and a DC voltage source V The anode of the MOS transistor _Q1 is connected to the drain of the MOS transistor _Q1 , the gate of the MOS transistor Q1 is connected to the external control signal I, the source of the MOS transistor _Q1 is connected to one end of the energy storage capacitor C and one end of the energy storage inductor L, and the energy storage capacitor C The other end of the energy storage inductor L is connected to the drain of the MOS transistor _Q2 and the source of the MOS transistor _Q3 , the gate of the MOS transistor _Q2 is connected to the external control signal II, and the source of the MOS transistor _Q2 is connected to The negative pole of the DC voltage source V is grounded, the gate of the MOS transistor _Q3 is connected to the external control signal III, and the drain of the MOS transistor _Q3 is connected to the gate of the power MOS transistor _Q4 in the power converter; the external control signal I, the external control signal Both the signal II and the external control signal III are provided by a waveform generator with an adjustable duty cycle.

Description

A gate drive circuit of a power MOS transistor in a power converter

technical field

The invention relates to a switch converter, in particular to a grid drive circuit of a power MOS transistor in a power converter.

Background technique

In recent years, in order to further reduce the volume of passive components and increase the power density of the power converter in the power converter, the switching frequency of the converter designed by people is getting higher and higher. Generally, as the switching frequency increases, the switching loss of the power MOS transistor in the converter and the loss of the gate drive circuit will increase accordingly, resulting in a decrease in the efficiency of the entire system. In this way, in high-frequency applications, even under light load conditions, the reliability of the system cannot be guaranteed due to the increase of switching loss and gate drive circuit loss. If these losses cannot be effectively reduced, it may lead to the failure of related components, reduce the reliability of the system, and even cause the entire system to fail to work normally.

Especially the power MOS tube in the converter, to ensure that the energy in the circuit is transferred from the input end to the output end, the reliability of the power MOS tube must be guaranteed. There are two main sources of loss for MOS tubes: switching loss and conduction loss. The conduction loss of the MOS tube is determined by the on-resistance of the MOS tube itself and the current flowing, because the on-resistance of the MOS tube is determined by the performance of the MOS tube itself, and is basically at the level of a few tenths of ohms. Therefore, under normal circumstances, the conduction loss of the MOS tube is acceptable. However, the switching loss of the MOS tube depends largely on the gate drive circuit of the MOS tube. If the design of the gate drive circuit of the MOS transistor is unreasonable, the resulting switching loss of the MOS transistor is very likely to cause the failure of the MOS transistor.

At present, for the design scheme of the traditional power MOS transistor gate drive circuit, most of them use a voltage source to connect a gate drive resistor in series, and then charge and discharge the gate of the power MOS transistor. Although the design of this drive circuit is simple and easy to implement, the drive current also flows through the gate drive resistor while charging and discharging the gate of the MOS transistor, which will inevitably increase the gate drive circuit. loss. Moreover, in the design of the traditional MOS tube gate drive circuit, when the MOS tube needs to be turned off, the drive circuit discharges the charge on the MOS tube gate through the ground wire, which obviously increases the loss of the gate drive circuit, which is not conducive to Improvement of the overall efficiency of the power converter.

In addition, to reduce the loss of the gate drive circuit, some people also proposed to adjust the switching frequency of the power MOS tube according to the different load output conditions. Although this will help reduce the loss of the drive circuit from the perspective of a cycle as a whole, but This solution not only complicates the implementation of the circuit, but also causes relatively large ripples in the output voltage and relatively serious EMI. Therefore, it is a big problem to be solved to design a simple structure and high efficiency MOS transistor gate drive circuit.

Contents of the invention

The purpose of the present invention is to provide a gate drive circuit of a power MOS transistor in a power converter to reduce the loss of the MOS transistor, especially to reduce the switching loss of the MOS transistor, further improve the efficiency of the converter, and increase the reliability of the system.

In order to achieve the above object, the present invention adopts the following technical scheme: a gate drive circuit of a power MOS transistor in a power converter, which is characterized in that it includes a DC voltage source V, a MOS transistor Q ₁ , an energy storage capacitor C, and an energy storage inductance L, MOS transistor _Q2 and MOS transistor _Q3 , the anode of the DC voltage source V is connected to the drain of the MOS transistor _Q1 , the gate of the MOS transistor _Q1 is connected to the external control signal I, and the source of the MOS transistor _Q1 is connected to the energy storage One end of the capacitor C and one end of the energy storage inductance L, the other end of the energy storage capacitor C is grounded, the other end of the energy storage inductance L is connected to the drain of the MOS transistor _Q2 and the source of the MOS transistor _Q3 , and the MOS transistor _Q2 The gate is connected to the external control signal II, the source of the MOS transistor _Q2 is connected to the negative pole of the DC voltage source V and grounded, the gate of the MOS transistor _Q3 is connected to the external control signal III, and the drain of the MOS transistor _Q3 is used as the output of the drive circuit , connected to the gate of the power MOS transistor _Q4 in the power converter; the external control signal I, the external control signal II and the external control signal III are all provided by a waveform generator with an adjustable duty cycle;

In the switching cycle of the power MOS transistor _Q4 in the switching power supply, the MOS transistor _Q1 only switches once in the above driving circuit. During the turn-on process of the power MOS transistor _Q4 , the energy in the energy storage capacitor C passes through the energy storage capacitor C, The equivalent Boost circuit composed _of energy storage inductance L, MOS transistor _{Q2 and} MOS transistor _Q3 is transmitted to the gate of power MOS transistor _Q4 . The energy of the energy is returned to the energy storage capacitor C through the equivalent Buck circuit composed of the MOS transistor Q ₃ , the MOS transistor Q ₂ , the energy storage inductor L and the energy storage capacitor C.

The DC voltage source V is a constant voltage source that outputs 0.7V, and its function is equivalent to a charge pump.

The MOS transistor Q ₁ , MOS transistor Q ₂ and MOS transistor Q ₃ are all N-channel MOSFETs, the model is IRF120, the MOS transistor Q ₄ is an N-channel MOSFET, the model is SPW20N60S5, and the energy storage capacitor C is 10 μF. The energy storage inductance L is 1μH.

The present invention has the following advantages:

1. When the drive circuit turns off the power MOS transistor _Q4 , the traditional driving scheme often completely discharges the gate charge of the MOS transistor _Q4 through the ground, or the gate-source discharge resistor and the gate-source parasitic of the MOS transistor _Q4 The resistance is consumed, which not only increases the loss of the driving circuit, but also reduces the reliability of the power MOS transistor _Q4 . The driving scheme adopted in the present invention is to feed back the charge on the gate of the power MOS transistor _Q4 to the energy storage capacitor of the driving circuit when the MOS transistor _Q4 is turned off. It is used to drive the turn-on of the MOS transistor _Q4 in the next cycle, which greatly reduces the loss of the driving circuit.

2. When the drive circuit makes the power MOS transistor _Q4 open, compared with the traditional drive scheme, the present invention does not have the loss on the gate drive resistor because of the omission of the gate drive resistor, thus reducing the cost of the drive circuit. loss, improving the efficiency of the system.

3. In the drive scheme proposed by the present invention, when the drive current flows through the inductor and requires freewheeling, the method of synchronous rectification is used to replace the traditional “freewheeling diode” to further reduce the loss of the driving circuit.

4. The driving scheme proposed by the present invention is derived from the topological deformation of the basic Buck and Boost circuits, and only two passive devices, the energy storage inductance L and the energy storage capacitor C, which play the role of energy storage are added, and the structure and control method are simple ,easy to accomplish.

Description of drawings

Fig. 1 is a circuit schematic diagram of the present invention;

Fig. 2 is a schematic diagram of key nodes in Fig. 1;

Fig. 3 is the schematic diagram of Fig. 1 embodiment;

Fig. 4 is a waveform diagram of relevant control signals and key nodes in Fig. 2;

Fig. 5 is a comparison diagram of the efficiency of the present invention and the traditional serial gate drive resistor scheme at different switching frequencies;

Detailed ways

The technology of the invention will be described in detail below in conjunction with the accompanying drawings.

As shown in Fig. 1, it is a specific principle diagram proposed by the present invention. The DC voltage source V is a constant voltage source capable of outputting 0.7V, and its function is equivalent to a charge pump.

The MOS transistor _Q1 is an N-channel MOSFET, and the gate is externally connected with a control signal I to control the MOS transistor _Q1 to be turned on and off at an appropriate time. The control signal I is provided by a waveform generator with adjustable duty cycle.

The energy storage capacitor C stores the energy from the DC voltage source V before the driven MOS transistor _Q4 is turned on.

The energy storage inductor L stores the energy from the energy storage capacitor C before the driven MOS transistor _Q4 is turned on, preparing for the opening of the Boost circuit.

The MOS transistor _Q2 is an N-channel MOSFET, and the gate is externally connected with a control signal II to control the MOS transistor _Q2 to be turned on and off at an appropriate time. The source of the control signal II is similar to that of the control signal I, and is also provided by a waveform generator with an adjustable duty cycle. During the turn-on process of the power MOS transistor _Q4 , the MOS transistor _Q2 is equivalent to the switching tube in the basic Boost circuit. The energy storage inductor L is charged through the MOS transistor _Q2 , and the energy in the energy storage capacitor C is transferred to the energy storage inductor. , to prepare for the opening of the Boost boost circuit.

The MOS transistor _Q3 is an N-channel MOSFET, and the gate is externally connected with a control signal III to control the MOS transistor _Q3 to be turned on and off at an appropriate time. Control signal III is also provided by a waveform generator with adjustable duty cycle. During the turn-on process of the power MOS transistor _Q4 , the function of the MOS transistor _Q3 is equivalent to the "freewheeling diode" in the basic Boost circuit, and the energy storage inductor L is freewheeled through the MOS transistor _Q3 to realize the function of the Boost converter. During the turn-off process of the power MOS transistor _{Q4 ,} the functions of the MOS transistor _Q2 and the MOS transistor _Q3 are just interchanged _. Its role is equivalent to the "freewheeling diode" in the basic Buck circuit, which is the freewheeling current for the energy storage inductor L, thereby realizing the function of the Buck converter.

The power MOS transistor _Q4 is an N-channel power MOSFET, representing a MOSFET to be driven in the switching converter.

As shown in Figure 2, it is the key nodes A, B, and C in the schematic diagram shown in Figure 1. The signal waveforms at these three points can reflect whether the circuit can work normally.

As shown in Fig. 3, it is the schematic diagram of the circuit of the embodiment. Component parameters and device models of the present invention are shown in FIG. 3 during the specific implementation process.

As shown in Figure 4, it is a timing waveform diagram when the drive circuit proposed by the present invention works normally, and finally at the key node C shown in Figure 2, a switching signal of high and low levels is obtained alternately to achieve the purpose of driving the power MOS transistor _Q4 .

As shown in FIG. 5 , it is a comparative diagram of driving circuit efficiency under different switching frequencies by adopting the traditional series gate driving resistor scheme and adopting the driving scheme proposed by the present invention. It can be seen from Figure 5 that with the increase of the switching frequency, the efficiency of the drive circuit decreases. However, with the driving scheme proposed by the present invention, at a relatively high switching frequency, the efficiency is higher than that of the traditional scheme of driving resistors connected in series to the grid.

The DC voltage source V is connected in series with the drain of the MOS transistor _Q1 , the gate of the MOS transistor _Q1 is externally connected with the control signal I, and the source of the MOS transistor _Q1 is respectively connected to one end of the energy storage capacitor C and the energy storage inductor L. The other end of the energy storage capacitor C is grounded, the other end of the energy storage inductance L is connected in series with the source of the MOS transistor _Q3 , the gate of the MOS transistor _Q3 is externally connected with the control signal III, and the drain of the MOS transistor _Q2 is connected to the power MOS of the converter. The gate of the transistor _Q4 is connected, the source of the power MOS transistor _Q4 is grounded, the common terminal of the energy storage inductor and the MOS transistor _Q2 is connected to the drain of the MOS transistor _Q2 , and the gate of the MOS transistor _Q2 is externally connected with a control signal II, the source of the MOS transistor _Q2 is grounded.

In the present invention, when the MOS transistor _Q4 is turned on, the circuit can be equivalent to a basic Boost circuit. At this time, the MOS transistor _Q2 is equivalent to the "freewheeling diode" in the Boost circuit; when the MOS transistor _Q4 is turned off, the circuit can wait for The effect becomes the basic Buck circuit. At this time, the MOS transistor _Q2 is equivalent to the "freewheeling diode" in the Buck circuit. Moreover, when the MOS transistor _Q4 is turned off, the gate charge of the MOS transistor _Q4 is not consumed through the external gate-source discharge resistor or the internal parasitic gate-source resistance of the MOS transistor, but fed back to the storage through the equivalent Buck circuit. Energy inductance, and finally returned to the energy storage capacitor, reducing the switching loss of Q ₄ of the MOS tube, and also reducing the gate drive circuit loss of the MOS tube, which helps to improve the efficiency and reliability of the system.

The working process of the present invention is as follows:

As shown in Figure 4, the moment the system is powered on, the control signal I is given to make the control signal I change to a high level, the MOS transistor _Q1 is turned on, and the DC voltage source starts to charge the energy storage capacitor. After a _period of time from 0 to t1, the control signal I changes to a low level, turning off the MOS transistor _Q1 . At this time, energy is obtained in the energy storage capacitor.

After t ₁ ~ t ₂ time, the control signal II is given, so that the control signal II becomes high level, the MOS transistor Q ₂ is turned on, and the current starts to flow through the energy storage inductor, and the energy storage inductor starts to store energy, and the energy storage capacitor The medium energy begins to transfer to the energy storage inductor.

After the time t ₂ -t ₃ passes, the control signal II becomes low level, and the MOS transistor Q ₂ is turned off. Since the inductor current cannot change abruptly, a rising voltage will be generated at the drain of the MOS transistor _Q2 . Then, after the dead time from _t3 to _t4 , at time _t4 , the control signal III is given, the control signal III becomes high level, and the MOS transistor _Q3 is turned on. At this time, the circuit is equivalent to a basic Boost circuit. The energy in the inductor starts to charge the gate-source capacitance of the MOS transistor _Q4 , and the MOS transistor _Q4 starts to conduct. After _t4 ～ _t5 , the control signal III becomes Low level, MOS transistor _Q2 is turned off, and then the gate-source voltage of MOS transistor _Q4 is stabilized at 14.2V, and MOS transistor _Q4 is turned on. At this time, MOS transistor Q ₁ , MOS transistor Q ₂ , and MOS transistor Q ₃ are all in the off state, and because the MOS transistor Q ₃ is connected to the circuit, the drain is connected to the gate of the driven power MOS transistor Q ₄ Pole, to avoid turning off the device in MOS transistor _Q3 , the charge on the gate-source capacitance of power MOS transistor _Q4 is discharged through the body diode of MOS transistor _Q3 , so that it can ensure that power MOS transistor _Q4 is in _t5 ～t ₆ during reliable conduction.

At time _t6 , the control signal III is given, so that the control signal III becomes high level, and the MOS transistor _Q3 is turned on. At this time, since the MOS transistor _Q2 is in the off state, the charge on the gate-source capacitance of the power MOS transistor _Q4 is fed back to the energy storage capacitor through the energy storage inductance, and the voltage on the capacitor will rise slightly during this period. , the circuit is now equivalent to a basic Buck circuit. After t ₆ -t ₇ , the control signal III becomes low level, turning off the MOS transistor Q ₃ . At this time, the gate-source voltage of the MOS transistor _Q4 has been stabilized at about 0.7V, so that the MOS transistor _Q4 is reliably cut off.

After the dead time from _t7 to _t3 , the control signal II is given at time _t8 , so that the control signal II becomes high level, and the MOS transistor _Q2 is turned on, which is equivalent to the "freewheeling diode" in the basic Buck circuit , thus freewheeling for the energy storage inductor. After the time t ₈ ~ t ₉ , the control signal II becomes low level, and the MOS transistor Q ₂ is turned off, and until the time T, the working state of one cycle of the circuit ends. Next, the circuit works periodically according to the above sequence. At point C shown in FIG. 2 , an alternating high and low switching signal is generated, so that the power MOS transistor _Q4 is periodically turned on and off, so as to realize the purpose of driving the power MOS transistor _Q4 in the switching converter. Moreover, when the power MOS transistor _Q4 is turned off, the energy in its gate-source capacitance can be fed back to the energy storage capacitor, reducing the switching loss of the MOS transistor _Q4 , and further improving the efficiency of the entire switching converter.

Claims (3)

1. A kind of 1. gate driving circuit of power MOS pipe in power inverter, it is characterised in that：Including direct voltage source V, MOS Pipe Q₁, storage capacitor C, energy storage inductor L, metal-oxide-semiconductor Q₂With metal-oxide-semiconductor Q₃, direct voltage source V positive pole connection metal-oxide-semiconductor Q₁Drain electrode, Metal-oxide-semiconductor Q₁Grid connect external control signal I, metal-oxide-semiconductor Q₁Source electrode connection storage capacitor C one end and energy storage inductor L one End, storage capacitor C other end ground connection, energy storage inductor L other end connection metal-oxide-semiconductor Q₂Drain electrode and metal-oxide-semiconductor Q₃Source electrode, MOS Pipe Q₂Grid connect external control signal II, metal-oxide-semiconductor Q₂Source electrode connection direct voltage source V negative pole and ground connection, metal-oxide-semiconductor Q₃ Grid connect external control signal III, metal-oxide-semiconductor Q₃Output of the drain electrode as drive circuit, work(in connection power inverter Rate metal-oxide-semiconductor Q₄Grid；External control signal I, external control signal II and external control signal III are adjustable by dutycycle Waveform generator provided；

   Above-mentioned drive circuit power MOS pipe Q in Switching Power Supply₄A switch periods in, metal-oxide-semiconductor Q₁Only switch once, in work( Rate metal-oxide-semiconductor Q₄In opening process, the energy in storage capacitor C passes through by storage capacitor C, energy storage inductor L, metal-oxide-semiconductor Q₂And metal-oxide-semiconductor Q₃The equivalent Boost circuit of composition is delivered to power MOS pipe Q₄Grid, in power MOS pipe Q₄In turn off process, power MOS pipe Q₄Energy on grid passes through by metal-oxide-semiconductor Q₃, metal-oxide-semiconductor Q₂, energy storage inductor L and storage capacitor C composition equivalent Buck circuits return Into storage capacitor C.
2. 2. the gate driving circuit of power MOS pipe in power inverter according to claim 1, it is characterised in that：It is described Direct voltage source V is output 0.7V constant pressure source, and it functions as a charge pump.
3. 3. the gate driving circuit of power MOS pipe in power inverter according to claim 1 or 2, it is characterised in that：Institute State metal-oxide-semiconductor Q₁, metal-oxide-semiconductor Q₂With metal-oxide-semiconductor Q₃It is N-channel type MOSFET, model uses IRF120, metal-oxide-semiconductor Q₄For N-channel type MOSFET, it is 10 μ F that model, which uses SPW20N60S5, storage capacitor C, and energy storage inductor L is 1 μ H.