CN105467291B - Semiconductor laser chip test fixing device and method thereof - Google Patents

Abstract

The invention provides a novel semiconductor laser chip test fixing device and a method thereof, which can avoid the influence on the output characteristic of a chip and improve the heat dissipation effect of the chip. In the semiconductor laser chip testing and fixing device, a plurality of metal films are arranged on the upper surface of a chip carrier platform made of insulating heat-conducting materials at intervals, and the length direction of each metal film is parallel to the length direction of a light-emitting unit cavity of a chip to be tested; each metal film is used as an independent P-surface power supply electrode, and an independent power supply contact is correspondingly fixed on each metal film; strip-shaped vacuum adsorption holes are parallelly formed between the adjacent P-side power supply electrodes, the vacuum adsorption holes penetrate through the upper surface and the lower surface of the chip carrier platform, and all the vacuum adsorption holes are communicated with an inner air channel of the vacuum adsorption device; the N-side power supply electrode is an integral electrode, and the lower surface of the N-side power supply electrode is flat and smooth, so that the N-side power supply electrode can be completely attached to the N-side electrode of the chip to be tested.

Description

A semiconductor laser chip test fixture and method thereof

technical field

The invention relates to a semiconductor laser chip test fixture and a method thereof.

Background technique

Semiconductor laser devices have the advantages of small size, light weight, and high electro-optical conversion efficiency. They are widely used as light sources and pump light sources in medical, military, and communication fields. Semiconductor laser chips usually need to be packaged to form devices before leaving the factory for use. Before semiconductor laser chip packaging, in order to improve the yield of packaging, it is necessary to conduct relevant performance tests on semiconductor laser chips, select qualified semiconductor laser chips, and eliminate unqualified chips. . In the high-power application field of semiconductor lasers, semiconductor laser chips often exist in the form of bars, and there are usually multiple light-emitting units in the bars. Whether the output characteristics of the light-emitting units are qualified determines whether the bars are qualified.

During the semiconductor laser bar test process, due to the many performances tested and the long test time, the contact area between the chip and the chip fixture is too small, which will cause excessive heat collection in the chip and burn the chip, and is not conducive to the consistency of chip test data The laser test device needs to have the following three points: first, a reasonable temperature control device is required to ensure that the heat dissipation and heating of all light-emitting units are consistent; second, a reasonable way is required to fix the chip , increase the heat dissipation of the chip; third, it is necessary to maintain the consistency of the force on the chip, reduce the stress of the chip and cause damage to the chip, thereby reducing the adverse effects of the fixing device on the chip.

At present, many institutions at home and abroad have conducted research on semiconductor laser test systems. Foreign companies such as ILX, Yel, Corning and other companies have many years of experience in semiconductor laser test systems. An article reported by Corning (JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL.23, NO.2, FEBRUARY 2005) discloses a fixture for semiconductor laser chip testing, as shown in Figure 2 and Figure 3, which is mainly suitable for testing Single pipe and bar. The scheme is: the P-side power supply electrode is located above the chip, and is in contact with the P-side electrode of the chip in the form of a probe (column structure) to inject current, and the N-side electrode of the chip is absorbed by the vacuum gap on the chip carrier platform, and the gap is parallel On the surface of the cavity, the conductive chip carrier platform and the N-side electrode of the chip are naturally electrically connected. In this fixed installation structure, the contact area of the P surface of the chip is uneven, which makes the force on the P surface and the heat conduction of the probe to the P surface uneven; moreover, the vacuum adsorption gap is parallel to the chip cavity surface, and it is easy to cause the chip to resonate along the surface. Uneven stress in the direction of the cavity; these factors will lead to damage to the chip and a decrease in the output characteristics of the chip.

Domestic companies such as Xi’an Focuslight Technology Co., Ltd. have applied for several patents on the test system (CN102519709A, CN102520336A, etc.). The method of pressing the laser is mostly rubber and spring screws. The contact between the spring screw and the laser is point contact. Both stress and heat dissipation cannot meet the requirements of consistency. The Suzhou Institute of Biomedical Engineering Technology, Chinese Academy of Sciences (CN 203643563 U) applied for a patent for testing the chip. The contact device used not only contains pogo pins, but also includes an air bag. The mechanical structure of the test device is complicated, which is not conducive to production, and also has the problems of uneven force and heat dissipation.

Contents of the invention

The invention proposes a new semiconductor laser chip test fixture and method thereof, which can avoid the influence on the output characteristics of the chip and improve the cooling effect of the chip.

Technical scheme of the present invention is as follows:

A semiconductor laser chip test fixture, including a chip carrier platform, a vacuum adsorption device, a temperature control device, a P-side power supply electrode and an N-side power supply electrode, the lower surface of the chip carrier platform is bonded to the vacuum adsorption device, and the temperature control device The chip carrier platform conducts heat dissipation through the vacuum adsorption device; the chip carrier platform or the vacuum adsorption device is also provided with a temperature detection hole; what is different from the prior art is that the chip carrier platform is made of insulating and heat-conducting material, and is set on the upper surface of the chip carrier platform. There are a plurality of metal films arranged at intervals, and the length direction of the metal film is parallel to the length direction of the light-emitting unit cavity of the chip to be tested; each metal film is used as an independent P-side power supply electrode for connecting with the P of a single light-emitting unit of the chip to be tested. The surface electrodes are completely attached, and each metal film is correspondingly fixed with a separate power supply contact head; strip-shaped vacuum adsorption holes are opened in parallel between the adjacent P surface power supply electrodes, and the vacuum adsorption holes penetrate the upper and lower surfaces of the chip carrier platform. , all the vacuum adsorption holes are connected with the inner air channel of the vacuum adsorption device; the N surface power supply electrode is an integral electrode, located above the P surface power supply electrode, and avoiding the position of the corresponding power supply contact head, the N surface The lower surface of the power supply electrode is flat and smooth, so that it can be completely attached to the N-side electrode of the chip to be tested.

On the basis of the above scheme, the present invention has further optimized as follows:

In order to better realize the bonding of the P-side power supply electrode and the P-side electrode of the chip, there are two structural designs of the chip carrier platform as follows:

1. The upper surface of the chip carrier platform is flat and smooth, and the plurality of metal films are plated on the upper surface of the chip carrier platform.

2. The upper surface of the chip carrier platform is provided with shallow grooves corresponding to the positions of the plurality of metal films, and the metal films are filled into the corresponding shallow grooves to make the upper surface of the chip carrier platform smooth.

The width of the above-mentioned P-surface power supply electrode is greater than the width of the P-surface electrode of a single light-emitting unit of the chip to be tested, and the length is greater than the cavity length of the light-emitting unit of the chip to be tested.

The width and spacing of the above-mentioned plurality of metal films meet: the center symmetry line of each light-emitting unit of the chip to be tested along the cavity length direction coincides with the center symmetry line of the corresponding P-surface power supply electrode, and the vacuum adsorption holes correspond to the adjacent holes of the chip to be tested. In the region between the electrodes on the P surface, the distance between adjacent vacuum adsorption holes is smaller than the width of the light emitting unit.

The effective length of the power supply electrode on the P surface is greater than the length of the vacuum suction hole, and the corresponding power supply contacts are beyond the corresponding area of the vacuum suction hole in the length direction.

The above-mentioned N-surface power supply electrodes cover all the P-plane power supply electrodes arranged on the chip carrier platform in the length direction, and the width of the N-surface power supply electrodes is smaller than the length of the vacuum adsorption holes.

The length direction of the N-plane power supply electrode and the length direction of the P-plane power supply electrode are perpendicular to each other.

The main body of the above-mentioned vacuum adsorption device is a heat conduction block, and the inner air channel is a strip-shaped groove opened on the upper surface of the heat conduction block. The strip-shaped groove and the strip-shaped vacuum adsorption hole are located under the chip carrier platform. The projections of the surfaces are perpendicular to each other.

The above-mentioned temperature detection hole is opened on the side of the vacuum adsorption device, and the side is parallel to the length direction of the vacuum adsorption hole.

The operation method of applying the above-mentioned semiconductor laser chip test fixture includes the following steps:

(1) Place the chip to be tested on the upper surface of the chip carrier platform, so that the P-face electrodes of each light-emitting unit of the chip to be tested are completely attached to the corresponding P-side power supply electrodes, and the central symmetry line of the light-emitting unit along the cavity length direction The central symmetry lines of the power supply electrodes on the P surface coincide;

(2) The vacuum adsorption device works to reduce the air pressure in the vacuum adsorption hole, so that the chip to be tested is adsorbed on the surface of the chip carrier platform;

(3) Move the N-side power supply electrode downward, so that the N-side power supply electrode is completely attached to the N-side electrode of the chip to be tested;

(4) The temperature control device is working, and the temperature is automatically adjusted by measuring and feeding back the temperature through the temperature detection hole, so that the temperature of the lower surface of the chip carrier platform reaches the set temperature;

(5) Inject current into the power supply contacts of the power supply electrodes on the P surface respectively, and test the output characteristics of each light-emitting unit of the chip to be tested;

(6) After the test of the chip to be tested is completed, move the N-side power supply electrode upwards, the vacuum adsorption device stops working, and remove the chip to be tested.

Compared with prior art, the beneficial effect of the present invention:

1. Improve the uniformity of the force on the chip, reduce the damage to the chip caused by the chip testing process (avoid the impact on the structure of the resonant cavity), and improve the uniformity of the chip's light emission.

2. The contact surface area between the chip and the fixing device is increased, and the heat dissipation of the chip is improved.

3. The temperature uniformity of the active area is improved.

Description of drawings

FIG. 1 is a schematic structural diagram of a single light emitting unit of a semiconductor laser chip.

Fig. 2 is a schematic diagram of Corning's solution (the structure below the chip carrier platform is omitted).

FIG. 3 is a schematic structural diagram of the chip carrier platform in FIG. 2 .

Fig. 4 is a schematic diagram of the solution of the present invention.

FIG. 5 is a schematic structural diagram of the vacuum adsorption device in FIG. 4 .

FIG. 6 is a schematic structural diagram of the chip carrier platform in FIG. 4 .

Fig. 7 is a temperature distribution diagram of the device of the present invention, wherein (a) is the temperature distribution of the front cavity surface of the chip and the front surface of the device, and (b) is the temperature distribution of the confinement layer.

FIG. 8 is a temperature distribution diagram of the prior art (shown in FIG. 2 ) device, wherein (a) is the temperature distribution of the front cavity surface of the chip and the front surface of the device, and (b) is the temperature distribution of the confinement layer.

Explanation of reference numbers:

1-N surface power supply electrode, 2-chip to be tested, 3-chip carrier platform, 4-P surface power supply electrode, 5-P surface power supply electrode connector, 6-vacuum adsorption hole, 7-vacuum adsorption device, 8-temperature detection Hole, 9-external gas path hole, 10-inner gas path hole, 11-temperature control device (TEC);

201-P surface electrode; 202-P cladding layer; 203-limitation layer; 204N cladding layer; 205-substrate; 206-N surface electrode.

Detailed ways

As shown in FIG. 4 , the semiconductor laser chip testing and fixing device of the present invention includes a chip carrier platform, a vacuum adsorption device and a temperature control device (TEC), and adopts an adsorption method to fix the chip. The upper surface of the chip carrier platform is provided with discrete P-side power supply electrodes and electrode connectors, and the vacuum adsorption device is connected with a vacuum pump. The difference between the present invention and the prior art mainly lies in:

1. The adsorption methods are different. The vacuum adsorption hole of the present invention is parallel to the resonant cavity and perpendicular to the cavity surface.

2. Different ways of contact. In the present invention, the electrode on the P surface of the chip is in complete contact with the power supply electrode on the P surface, and the force on the P surface is uniform and the heat conduction is uniform. The N-side electrode is completely in contact with the power supply electrode on the N-side, and the force and heat conduction on the N-side are uniform

3. Different adsorption sites. The adsorption site of the present invention is located between the light-emitting units of the bars, and the vacuum adsorption holes are staggered from the electrodes on the surface of the chip P coating layer.

The chip carrier platform of the present invention is an insulating and heat-conducting platform, and the material can be selected from ceramic AlN, diamond and the like. The chip carrier platform has a smooth surface and is plated with metal to form multiple rows of P-side power supply electrodes. The P-side power supply electrodes are discrete electrodes that are not connected to each other. Each electrode is equipped with its own contact head, which is used to connect to an external power supply. The vacuum adsorption holes are located on both sides of the power supply electrode on the P surface, and all the vacuum adsorption holes are finally connected to the vacuum adsorption device. The N-side power supply electrode is a whole electrode, and the size of the electrode is larger than that of the chip.

The P-side power supply electrode is preferably metal material gold, but not limited to gold. The width of the power supply electrode on the P surface is greater than that of the electrode on the surface of the P cladding layer, the length is greater than the cavity length of the chip, and the thickness is several nm.

The present invention is not only applicable to bar chips with multiple light-emitting units with independent electrodes, but also to bar chips with independent electrodes and light-emitting performance but not made into a single tube, and of course also suitable for single-tube chips.

The heat distribution of the chip of the present invention and the prior art (structure shown in Fig. 2) is shown in Fig. 7 and Fig. 8 respectively, can find out by comparing the temperature distribution of two figures, after adopting the device test of the present invention, the heat generation area of the chip The temperature is lower than the temperature of the active area tested in the prior art, and the temperature in the middle of the chip is lower than the temperature at both ends, which is beneficial to reduce the damage of the temperature to the cavity surface, and the present invention eliminates the problem that the temperature of the corresponding position of the adsorption hole on the carrier platform is too high This phenomenon shows that the temperature distribution in the active area of the device of the present invention is more uniform, which is beneficial to improving the stability of the temperature on the output performance of the laser. It shows that the device of the present invention is beneficial to heat dissipation of the chip, is beneficial to improving the temperature uniformity of the active area of the chip, and is beneficial to improving the output characteristics of the bare chip.

In order to further illustrate the remarkable effect of the present invention compared with the existing structure, the applicant calculated the two respectively by means of finite element analysis. In order to simplify the calculation, on the basis of ensuring that the test principles of the two are unchanged, the device structure below the chip carrier platform is ignored, and the structures of the two are simplified respectively. Since the thickness of the P-side power supply electrode of the present invention is only a few nanometers, Moreover, the thermal conductivity is also excellent, and the influence of the power supply electrode on the P surface on the chip temperature can be ignored in the calculation process.

In terms of device parameter settings, keep the two as consistent as possible: the size of the chip carrier platform is the same, the structure of the chip is the same, and the heat generated by the chip is the same. Since the chip carrier platform of the present invention is an insulating and heat-conducting material, the thermal conductivity of the ceramic AlN used is also lower than that of the material (Cu) used in the existing device, and the total area of the chip adsorption holes is greater than that of the existing device. Chip heat dissipation. However, the final calculation results show that the heat dissipation of the present invention is better than that of the prior art. Therefore, it can be expected that if a material with better thermal conductivity such as diamond is used as the chip carrier platform, the effect of the present invention will be further significantly improved.

The specific parameters are as follows:

The heat production in the heat generating area is set to be 5e12W*m-3, the temperature on the lower surface of the chip carrier platform is 293K, the temperature on the upper surface of the N-side electrode of the present invention is 293K, and the temperature on the upper surface of the probe (P-side power supply electrode) of the prior art for 293K.

Table 1 Structural parameters of the present invention

In addition, in the present invention, the shortest distance between two adjacent vacuum adsorption holes is 0.4mm, and the distance between the short side of the vacuum adsorption hole and the edge of the carrier is 0.4mm.

Table 2 Existing structural parameters

Table 3 Parameters of the chip to be tested

Utilize the device of the present invention to carry out the operating steps of chip test as follows:

1. Place the chip to be tested on the surface of the power supply electrode 4 on the P surface, and the center symmetry line of the chip along the cavity length should coincide with the center symmetry line of the P surface power supply electrode.

2. Open the air passage hole 7, reduce the air pressure in the vacuum adsorption hole, and make the chip to be tested be adsorbed on the surface of the chip carrier platform.

3. Move the N-face power supply electrode 5 downwards so that the N-face power supply electrode 5 and the N-face electrode are just completely in contact.

4. Adjust the TEC temperature, and automatically adjust the temperature through the feedback temperature of the temperature tester placed in the temperature test hole, so that the temperature of the lower surface of the chip carrier platform reaches the set temperature.

5. Inject currents from the P-side electrode connectors 8 to test the output characteristics of each light-emitting unit of the chip to be tested.

6. After the test of the chip to be tested is completed, move the N-side power supply electrode upward, close the air hole, and remove the chip.

Claims (10)

1. a semiconductor laser chip test fixture, comprising a chip carrier platform, a vacuum adsorption device, a temperature control device, a P-side power supply electrode and an N-side power supply electrode, the lower surface of the chip carrier platform is bonded to the vacuum adsorption device, and the temperature The control device conducts heat dissipation to the chip carrier platform through the vacuum adsorption device; the chip carrier platform or the vacuum adsorption device is also provided with a temperature detection hole; it is characterized in that: The chip carrier platform is an insulating and heat-conducting material, and a plurality of metal films arranged at intervals are arranged on the upper surface of the chip carrier platform, and the length direction of the metal film is parallel to the length direction of the light-emitting unit cavity of the chip to be tested; each metal film serves as a The independent P-side power supply electrode is used to completely fit the P-side electrode of a single light-emitting unit of the chip under test, and each metal film is correspondingly fixed with a separate power supply contact; between adjacent P-side power supply electrodes There are strip-shaped vacuum adsorption holes, the vacuum adsorption holes penetrate the upper and lower surfaces of the chip carrier platform, and all the vacuum adsorption holes are connected with the inner gas channel of the vacuum adsorption device; the N-side power supply electrode is an integral electrode, located on the P-side Above the power supply electrodes, and avoiding the location of the corresponding power supply contacts, the lower surface of the N-side power supply electrodes is flat and smooth, so that it can be completely attached to the N-side electrodes of the chip to be tested. 2. semiconductor laser chip test fixture according to claim 1, is characterized in that: The upper surface of the chip carrier platform is flat and smooth, and the plurality of metal films are plated on the upper surface of the chip carrier platform; Alternatively, the upper surface of the chip carrier platform is provided with shallow grooves corresponding to the positions of the plurality of metal films, and the metal films are filled into the corresponding shallow grooves to make the upper surface of the chip carrier platform smooth. 3. semiconductor laser chip test fixture according to claim 1, is characterized in that: the width of described P face power supply electrode is greater than the width of the P face electrode of the single light-emitting unit of chip to be tested, and length is greater than that of the light-emitting unit of chip to be tested. Cavity length. 4. semiconductor laser chip test fixture according to claim 3, is characterized in that: the width and spacing of described multiple metal films meet: each light-emitting unit of chip to be tested is along the center line of symmetry of cavity length direction and corresponding The central symmetry lines of the power supply electrodes on the P surface coincide, the vacuum adsorption hole corresponds to the area between the adjacent P surface electrodes of the chip to be tested, and the distance between the adjacent vacuum adsorption holes is smaller than the width of the light emitting unit. 5. semiconductor laser chip test fixture according to claim 1, is characterized in that: the effective length of described P face power supply electrode is greater than the length of vacuum suction hole, and corresponding power supply contact head all exceeds vacuum suction hole in length direction the corresponding area. 6. semiconductor laser chip test fixture according to claim 1 is characterized in that: described N face power supply electrode covers all P face power supply electrodes arranged on the chip carrier platform in length direction, the width of N face power supply electrode less than the length of the vacuum adsorption hole. 7 . The device for testing and fixing a semiconductor laser chip according to claim 6 , wherein the length direction of the N-plane power supply electrode is perpendicular to the length direction of the P-plane power supply electrode. 8 . 8. The semiconductor laser chip testing and fixing device according to claim 1, characterized in that: the main body of the vacuum adsorption device is a heat conduction block, and the inner air channel is a bar-shaped opening on the upper surface of the heat conduction block. The groove, the strip-shaped groove and the projection of the strip-shaped vacuum adsorption holes on the lower surface of the chip carrier platform are perpendicular to each other. 9. The device for testing and fixing a semiconductor laser chip according to claim 1, wherein the temperature detection hole is opened on a side of the vacuum adsorption device, and the side is parallel to the length direction of the vacuum adsorption hole. 10. apply the operation method of semiconductor laser chip test fixture described in claim 1, comprise the following steps: (1) Place the chip to be tested on the upper surface of the chip carrier platform, so that the P-face electrodes of each light-emitting unit of the chip to be tested are completely attached to the corresponding P-side power supply electrodes, and the central symmetry line of the light-emitting unit along the cavity length direction The central symmetry lines of the power supply electrodes on the P surface coincide; (2) The vacuum adsorption device works to reduce the air pressure in the vacuum adsorption hole, so that the chip to be tested is adsorbed on the surface of the chip carrier platform; (3) Move the N-side power supply electrode downward, so that the N-side power supply electrode is completely attached to the N-side electrode of the chip to be tested; (4) The temperature control device is working, and the temperature is automatically adjusted by measuring and feeding back the temperature through the temperature detection hole, so that the temperature of the lower surface of the chip carrier platform reaches the set temperature; (5) Inject current into the power supply contacts of the power supply electrodes on the P surface respectively, and test the output characteristics of each light-emitting unit of the chip to be tested; (6) After the test of the chip to be tested is completed, move the N-side power supply electrode upwards, the vacuum adsorption device stops working, and remove the chip to be tested.