A kind of level compatibility processing circuit of input signal
Technical field
The invention belongs to fields of numeric control technique, more particularly to the level compatibility processing circuit of a kind of input signal.
Background technology
Currently, machine tool numerical control system will also carry out machine logic control other than controlling each axis servomotor and carry out interpolation
(i.e. PLC).When carrying out PLC controls, acquired into NC after the input signal of each 24V is handled into line level compatibility,
Result output is gone to control each switch after logical operation.
Now, 24V level is processed into the signal of 5V, generally uses optical coupling isolation circuit.Because of general each NC hosts
64 input points (24V) and 48 output points (at least 24V) will be handled, therefore light-coupled isolation processing circuit will generally occupy
Larger physical space, this is difficult to realize in the limited NC mainframe boxes in space.
Therefore, it in view of said program in actual fabrication and in place of implementing using upper missing, and corrected, improved, together
When in line with the spirit and theory asked, and by the knowledge of profession, the auxiliary of experience, and after multi-party clever thought, experiment, just found
Go out the present invention, spy provides a kind of level compatibility processing circuit of input signal again, can be with minimum space and minimum first device
Part effectively completes the level conversion of input signal, while inhibiting the interference signal coupled in input signal, realizes height
Isolation between level.
Invention content
The present invention proposes a kind of level compatibility processing circuit of input signal, solves level conversion electricity in the prior art
Road is complicated, in input signal the problem of easy coupled flutter.
The technical proposal of the invention is realized in this way:A kind of level compatibility processing circuit of input signal, including electricity
Comparison circuit, the input terminal of the voltage comparator circuit is pressed to be separately connected partial pressure current-limiting circuit and circuit for generating constant voltage, electricity
The output end of pressure comparison circuit is connected with caching driving circuit, and the output end for caching driving circuit connects the first level conversion electricity
The output end on road, the first level shifting circuit is connected with logic coding circuit, and the output end of logic coding circuit is connected with second
Level shifting circuit.
As a preferred embodiment, the second electrical level conversion circuit is exported by communication bus.
As a preferred embodiment, the partial pressure current-limiting circuit includes concatenated 3rd 53 resistance and the three or five
Four resistance, the cathode of second end the 3rd 26 diode of connection of third the May 4th resistance, the plus earth of the 3rd 26 diode,
For the second end of third the May 4th resistance also by the 3rd 55 resistance eutral grounding, the second end of the 3rd 55 resistance also passes through concatenated
356 resistance and the 3rd 14 capacity earth.
As a preferred embodiment, the circuit for generating constant voltage includes the 3rd 257 resistance, described the
The first ends of 3257 resistance connects supply voltage, the second end of the 3rd 257 resistance by the 3rd 65 capacity earth,
The cathode of second end the 3rd 129 diode of connection of 3rd 257 resistance, the plus earth of the 3rd 129 diode,
The second end of 3rd 257 resistance is by concatenated 3rd 258 resistance and the 3rd 259 resistance eutral grounding, and the 3rd 259
The both ends of resistance are parallel with the 3rd 66 capacitance, and the second end of the 3rd 257 resistance is connected with the 3rd 26 zero resistance, third
The other end of two or six zero resistances passes through the 3rd 261 resistance and the 3rd 67 capacity earth respectively.
As a preferred embodiment, the voltage comparator circuit includes a voltage comparator.
As a preferred embodiment, the input voltage of the caching driving circuit is equal to the defeated of caching driving circuit
Go out voltage.
After using above-mentioned technical proposal, the beneficial effects of the invention are as follows:Input voltage is realized by dividing current-limiting circuit
Control, and coordinate current-limiting resistance ensure input current will not be excessive, constant ginseng may be implemented by circuit for generating constant voltage
The input for examining voltage excludes voltage disturbance signal, then by comparing rear output, and by caching and converts and is encoded
Processing exports signal by intrinsic communication protocol after further converting, and has with minimum space and minimum component
The level conversion of input signal is completed on effect ground, while inhibiting the interference signal coupled in input signal, realizes low and high level
Between isolation.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention without having to pay creative labor, may be used also for those of ordinary skill in the art
With obtain other attached drawings according to these attached drawings.
Fig. 1 is the block diagram of the present invention;
Fig. 2 is the physical circuit figure that current-limiting circuit is divided in Fig. 1;
Fig. 3 is the physical circuit figure of circuit for generating constant voltage in Fig. 1;
Fig. 4 is the circuit diagram that voltage compares processing.
In figure, the 3rd 53 resistance of R353-;R354- third the May 4th resistance;The 3rd 56 resistance of R356-;R355-
3rd 55 resistance;The 3rd 26 diodes of D326-;The 3rd 14 capacitances of C314-;The 3rd 257 resistance of R3257-;
The 3rd 259 resistance of R3259-;The 3rd 26 zero resistances of R3260-;The 3rd 261 resistance of R3261-;C367- thirds
Six or seven capacitances;The 3rd 66 capacitances of C366-;The 3rd 129 diodes of D3129-;The 3rd 65 capacitances of C365-.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment shall fall within the protection scope of the present invention.
As shown in Figure 1-Figure 3, the level compatibility processing circuit of input signal, including voltage comparator circuit, the voltage
The input terminal of comparison circuit is separately connected partial pressure current-limiting circuit and circuit for generating constant voltage, and the output end of voltage comparator circuit connects
It is connected to caching driving circuit, the output end for caching driving circuit connects the first level shifting circuit, the first level shifting circuit
Output end is connected with logic coding circuit, and the output end of logic coding circuit is connected with second electrical level conversion circuit.Described second
Level shifting circuit is exported by communication bus.The partial pressure current-limiting circuit includes concatenated 3rd 53 resistance R353 and third
The May 4th R354 resistance, the cathode of the 3rd 26 diode D326 of second end connection of third the May 4th R354 resistance, the 3rd 262
The second end of the plus earth of pole pipe D326, third the May 4th resistance R354 is also grounded by the 3rd 55 resistance R355, and the three or five
The second end of five resistance R355 also passes through concatenated 3rd 56 resistance R356 and the 3rd 14 capacitance C314 ground connection.It is described constant
Voltage generation circuit includes the 3rd 257 resistance R3257, the first end connection power supply electricity of the 3rd 257 resistance R3257
The second end of pressure, the 3rd 257 resistance R3257 is grounded by the 3rd 65 capacitance C365, the 3rd 257 resistance R3257's
The cathode of the 3rd 129 diode D3129 of second end connection, the plus earth of the 3rd 129 diode D3129, the three or two
The second end of five or seven resistance D3257 is grounded by concatenated 3rd 258 resistance R3258 and the 3rd 259 resistance R3259,
The both ends of 3rd 259 resistance R3259 are parallel with the 3rd 66 capacitance C366, and the second end of the 3rd 257 resistance R3257 connects
It is connected to the 3rd 26 zero resistance R3269, the other end of the 3rd 26 zero resistance R3260 passes through the 3rd 261 resistance respectively
The electricity of R3261 and the 3rd 67 C367 holds ground connection.The voltage comparator circuit includes a voltage comparator.The caching driving circuit
Input voltage be equal to caching driving circuit output voltage.
Carry out the details of each processing circuit under piecemeal is introduced referring again to Fig. 4:
One external 24V input signal is by dividing, comparing, level conversion is ultimately delivered to FPGA into row decoding, then with
Intrinsic communication protocol is sent into information in system board CPU by bus communication.
Divide current-limiting circuit:For inputting 24V voltages, by electric resistance partial pressure, the voltage of a 2.14V is generated, is passed through
The voltage that current-limiting resistance (playing metering function herein) introduces LM2901 chips compares port.
According to the voltage CL Compare Logic of LM2901, we must set a constant reference voltage, by interference signal
Ranging assessments, we set the reference voltage of a 1.45V, in this way at input signal end, we can exclude 16V with
Under voltage disturbance signal.On the basis of 5V voltage signal sources, we design following bleeder circuit, as shown below, we
By INPUTBJ, that voltage put introduces the reference comparison voltages port of voltage comparator.
5V level models are sent to by LM2901 voltage comparators after being compared to input voltage and constant comparison voltage
It is sent in caching driving chip 74ABT162244, due to fpga chip used by us, is merely able to receive 3.3VTTL level
The signal of standard, so having to pass through electrical level transferring chip 74ALVC164245, by 5V level conversions at 3.3V level signals,
Signal can be sent into FPGA central processing elements, carry out coding and decoding, then turn the level conversion of 5V by 3.3V, then with solid
Some communication protocol is sent into the CPU of mainboard by bus communication.Here it is an input signals by I/O input modules, is sent to master
The complete procedure of plate CPU.
The operation principle of the level compatibility processing circuit of the input signal is:Input electricity is realized by dividing current-limiting circuit
The control of pressure, and current-limiting resistance is coordinated to ensure that input current will not be excessive, it may be implemented by circuit for generating constant voltage constant
The input of reference voltage excludes voltage disturbance signal, then by comparing rear output, and by caching and converts and is compiled
Code processing exports signal by intrinsic communication protocol after further converting, with minimum space and minimum component
The level conversion of input signal is effectively completed, while inhibiting the interference signal coupled in input signal, realizes height electricity
Isolation between flat.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
With within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention god.