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CN105677598B - The module and method of multiple MEMS sensor data are quickly read based on I2C interface - Google Patents

The module and method of multiple MEMS sensor data are quickly read based on I2C interface Download PDF

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Publication number
CN105677598B
CN105677598B CN201610003029.4A CN201610003029A CN105677598B CN 105677598 B CN105677598 B CN 105677598B CN 201610003029 A CN201610003029 A CN 201610003029A CN 105677598 B CN105677598 B CN 105677598B
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data
control units
cell fifo
address
dma
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CN105677598A (en
Inventor
黄璐
何文涛
冯华星
蔺晓龙
翟昆朋
王浩
殷明
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HANGZHOU ZHONGKE MICROELECTRONICS CO Ltd
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JIAXING MICROELECTRONICS AND SYSTEMS ENGINEERING CENTER CHINESE ACADEMY OF SCIENCES
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

The invention discloses a kind of module that multiple MEMS sensor data are quickly read based on I2C interface, belong to sensing data communication field, including DMA control units, send data cell fifo, reception data cell fifo and I2C bus timing control units, the DMA control units are configured as out giving digital independent to I2C main frames successively from internal storage unit when the I2C bus timings control unit gives request signal, while the data that I2C main frames are received are sequentially stored into internal storage unit;The transmission data cell fifo, is configured as the temporary data for needing to send, waits I2C main frames to read;The reception data cell fifo, is configured as the temporary data received, waits the DMA control units to read;The I2C bus timings control module is configured as producing control and data-signal, and the data that receive of storage according to the data that DMA control units transmission comes.

Description

The module and method of multiple MEMS sensor data are quickly read based on I2C interface
Technical field
The present invention relates to data communication technology field, more particularly to one kind quickly to read multiple MEMS based on I2C interface and pass The module and method of sensor data, applied to the extensive serial data communication in triones navigation system.
Background technology
I2C buses are the buses of main frame more than one, using serial data line (SDA) and serial time clock line (SCL) in bus Upper transmission information.Each device has a unique identification address, and can serve as a transmitter or receiver.When The multiple main frames device being connected in I2C buses, during simultaneous transmission data, avoided confusion by arbitrating.SDA and SCL are Bidirectional line, supply voltage is connected to by a current source or pull-up resistor.Device output stage must be open-drain or collection Electrode is opened a way, and when bus free, two lines road be in high level, execution line and function.The speed that I2C buses are supported has two Kind:Maximum 100kbit/s mode standard, maximum 400kbit/s quick mode.The number of devices of bus is connected to only by total Line capacitance is 400pF limit decision.
3 control protocols are followed in I2C standard time sequence:
START:When SCL lines keep high level, SDA line is pulled to low level from high level, and the transmission for representing data starts.
STOP:When SCL lines keep high level, SDA line is pulled to high level from low level, represents the end of transmission of data.
ACK:When recipient receives a BYTE valid data, it is necessary to drag down SDA line sender's release simultaneously to SDA The control of line, represent the response that recipient receives data.
One traditional I2C HPI reads the workflow of data referring to Fig. 1.
Step 100 write-in START produces control, and START signal is produced in bus.
Step 200 write-in transmission data (be usually address of devices), by bus by data and clock control be sent to from Machine.
Step 210 waits the ACK of slave.If receiving ACK enters step 300, otherwise terminate flow.
Step 300 continues to write to transmission data (being usually register address), is sent out data and clock control by bus Give slave.
Step 310 waits the ACK of device.If receiving ACK enters step 400, otherwise terminate flow.
Step 400 writes START signal and slave address of devices again, and control slave enters read states.
Step 410 waits the ACK of device.If receiving ACK enters step 500, otherwise terminate flow.
Step 500 write-in dummy data produce clock in bus and read the data of slave transmission by bus simultaneously.
If step 510 reads data and completed, NACK signal is sent, into step 600.If also have data to continuously read Take, send ack signal, return to step 500.
Step 600 write-in STOP produces control, and STOP signals are produced in bus.
Step 700 terminates transfer process.
The advantages of above method, is that the step of all control signals and data transfer is all carried out separately, so when By controlling and the real-time change of back-signalling is judged, selection operates master/slave machine busy can in next step, but this is also Mean the beginning transmitted every time, respond, terminate to be required for the participation of master cpu, this is in this large-scale data of navigation system CPU operation can be frequently interrupted in the application of processing, wastes very much system resource.
Therefore, those skilled in the art is directed to exploitation one kind and based on I2C interface quickly reads multiple MEMS sensors The module and method of data, I2C host modules are improved for this problem, with the addition of DMA (direct memory access) Function, CPU can be skipped and carry out large batch of back-end data access.
The content of the invention
In view of the drawbacks described above of prior art, the technical problems to be solved by the invention are the beginnings transmitted every time, are returned Should, terminate to be required for the participation of master cpu, this can frequently be interrupted in the application of this large-scale data processing of navigation system CPU operation, waste very much system resource.
The present invention is that the implementation method of multiple MEMS sensor data is quickly read based on I2C interface.It can not interrupt The data of multiple slaves known to independently being read on the premise of CPU operation are simultaneously put into memory cell for CPU reading uses.
The present invention is a kind of I2C host modules that with the addition of DMA functions, and referring to Fig. 2, it includes structure:
DMA (direct memory access) control unit, all control signals are set by CPU, and request letter is given in I2C Number when from internal storage unit out give digital independent to I2C main frames successively, while the data that I2C main frames are received are successively It is stored in internal storage unit;
Data cell fifo is sent, it is necessary to which the data sent can be kept in herein, wait I2C main frames are read;
Data cell fifo is received, the data received can be kept in herein, wait DMA to read;
I2C bus timing control units, according to DMA transmission come data produce all control and data-signal, and will The data received are left.
Invention further provides the implementation method for quickly reading multiple sensing datas, its step are as follows:
S0) DMA control units are provided, send data cell fifo, receive data cell fifo, the control of I2C bus timings Unit and internal storage unit;
S1) according to access in need sensor component address, data amount check, get out corresponding data and be put into inside Storage;
S2 DMA control modules) are configured with CPU, ready data before the initial address of sendaisle data is pointed to, Destination address, which points to, sends data FIFO.The initial address of receiving channel data is pointed to and receives data FIFO, destination address refers to The storage inside idle to any one piece.And set the number for transmitting data altogether;
S3) when transmission data FIFO is available free, data write-in will be taken out from memory to DMA request data, DMA FIFO.Simultaneously once there is data in FIFO, I2C bus timings control module will take data away and be transmitted;
S4) when having data receiver to return in I2C buses, data will be stored in and receive by I2C bus timings control module FIFO, while receiving FIFO once has data to take data away to DMA request, DMA takes data write-in away from reception FIFO and deposited Reservoir;
S5) after the completion of all default DMA transfers, DMA control modules produce interrupt signal notice CPU, and now CPU can Data are taken away with the storage address from storage reception data and do corresponding processing.
Described one kind is quick to read sensing data method, and CPU intervention is only needed when beginning and end operates, is added The fifo module added can preferably handle the difference of message transmission rate between DMA and I2C, reduce DMA transfer and take bus Frequency.
Described one kind is quick to read sensing data method, by all control, responds and transmission data are put together Handle, the actual data information that START, STOP and 1BYTE will be included in the unit data that DMA is transmitted every time (is probably device Part address, register address, dummy data).
Design, concrete structure and the caused technique effect of the present invention are described further below with reference to accompanying drawing, with It is fully understood from the purpose of the present invention, feature and effect.
Brief description of the drawings
Fig. 1 is the I2C HPI reading data flow journeys of standard;
Fig. 2 is the I2C host module functional diagrams of a preferred embodiment of the present invention;
Fig. 3 is the flow chart that multiple MEMS sensor data are read in a preferred embodiment of the present invention;
Fig. 4 is the transmission data format of a preferred embodiment of the present invention;
Fig. 5 is the transmission signal schematic diagram in the I2C buses of a preferred embodiment of the present invention.
Embodiment
Connect BOSCH (Bosch) three kinds of MEMS sensor realities simultaneously below by the triones navigation system using the present invention Illustrated exemplified by existing.The three kinds of MEMS sensors used are respectively:BMA280 3-axis acceleration sensors, the axle tops of BMG160 tri- Spiral shell instrument and BMM150 three axle magnetometers, realize step referring to Fig. 3.
Step 100 is according to the address of devices of three MEMS sensors and to read data amount check and is ready to transmit data, Data format is shown in Fig. 4, and wherein BMA280 address of devices is 0x18, and reading register address is 0x02, and it is 6 to read number. BMG160 address of devices is 0x68, and it is 0x02 to read deposit address, and it is 6 to read number.BMM150 address of devices is 0x10, is read It is 0x42 to take register address, and it is 6 to read number;
Step 200 is put into storage inside because ready data are 10bit, by data in the way of 16bit is addressed Element address 0x10040000;
Step 300 configures DMA control modules with CPU, and the initial address of sendaisle data is pointed into 0x10040000, mesh Address point to and send data FIFO.The initial address of receiving channel data is pointed to and receives data FIFO, destination address points to 0x10048000.The number for setting sendaisle transmission data is 27, and receiving channel transmission data amount check is 18;
Step 400 sends FIFO request datas, and DMA takes out the deposit of 10bit data from 0x10040000 and sends FIFO successively Until sending FIFO expires;
Step 500 (1) I2C sequence generation modules include START information and BMA280 devices from FIFO taking-ups first are sent The data of part address, START signal is produced in bus and sends address of devices and chooses BMA280 to enter WriteMode.Then take out Second information for including register address, the register for choosing needs to read.Then take out the 3rd and include START signal Data choose BMA280 to enter reading mode, finally continuously transmit six dummy data and ack signal, read back six data successively It is put into and receives FIFO.Need to send out NACK signal and STOP signals, whole process while last dummy data is sent The signal transmitted in middle bus refers to Fig. 5.
Step 510 sends FIFO data once being walked by transmission, will continue to step 400 while step 500 is carried out Work.
For step 520 while step 500 is carried out, it is once effective to receive FIFO data, DMA will be asked to take number away According to 8bit is received after data are taken out and is sequentially stored into address 0x10048000 by DMA.Storage addresses according to 8bit.
After the operation to BMA280 terminates, the data taken out from transmission FIFO will continue to control I2C step 500 (2) Sequence generation module carries out digital independent to BMG160, and process is similar with step 500 (1), is not repeating;
After the operation to BMG160 terminates, the data taken out from transmission FIFO will continue to control I2C step 500 (3) Sequence generation module carries out digital independent to BMM150, and process is similar with step 500 (1), is not repeating;
After step 600DMA will receive all 18byte data and be stored in address 0x10048000, the production of DMA control modules Raw interrupt notification CPU processing datas;
After step 700CPU takes the data of needs away, DMA transfer can be reopened at the time of any need, directly Start to obtain new data into step 400, all DMA, which are set, can keep constant.
In summary, can quickly be read in the case where being controlled without using CPU as far as possible with the implementation method of the present invention The data of multiple known MEMS sensors are taken, accelerates the processing of data, optimizes the configuration of system resource.
Preferred embodiment of the invention described in detail above.It should be appreciated that the ordinary skill of this area is without wound The property made work can makes many modifications and variations according to the design of the present invention.Therefore, all technician in the art Pass through the available technology of logical analysis, reasoning, or a limited experiment on the basis of existing technology under this invention's idea Scheme, all should be in the protection domain being defined in the patent claims.

Claims (3)

  1. A kind of 1. method that multiple MEMS sensor data are quickly read based on I2C interface, it is characterised in that including following step Suddenly:
    S0) DMA control units are provided, send data cell fifo, receive data cell fifo, I2C bus timing control units And internal storage unit;
    S1) according to access in need sensor component address and data amount check, corresponding data are put into the inside and deposited Storage unit;
    S2 the DMA control units) are configured with CPU, the initial address of sendaisle data is pointed in step S1 and is placed on inside Data in memory cell, destination address, which points to, sends data cell fifo;The initial address of receiving channel data is pointed to and connect Data cell fifo is received, destination address points to any one piece of idle internal storage areas;And set and transmit data altogether Number;
    S3) when send data cell fifo it is available free when, will be to DMA control unit request datas, DMA control units are from inside Memory cell takes out data write-in and sends data cell fifo;Sending simultaneously in data cell fifo once has data, I2C buses Timing control unit will take data away and be transmitted;
    S4) when having data receiver to return in I2C bus timing control units, I2C bus timings control unit will be by data Deposit receives data cell fifo, while receiving data cell fifo once has data to ask to take away to DMA control units Data, DMA control units take data write-in internal storage unit away from data cell fifo is received;
    S5) after the completion of all default DMA transfers, DMA control units produce interrupt signal notice CPU, and now CPU can be from The storage address that storage receives the internal storage unit of data takes data away and does corresponding processing.
  2. 2. quickly reading the method for multiple MEMS sensor data based on I2C interface as claimed in claim 1, its feature exists In START, STOP and 1BYTE actual data information will be included in the unit data that DMA control units are transmitted every time.
  3. 3. quickly reading the method for multiple MEMS sensor data based on I2C interface as claimed in claim 2, its feature exists In described actual data information includes address of devices, register address and dummy data.
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CN106055511B (en) * 2016-06-16 2019-10-29 Tcl移动通信科技(宁波)有限公司 A kind of CPU of mobile terminal and data communications method, the system of sensor
CN110442543B (en) * 2019-08-09 2023-09-08 瓴盛科技有限公司 Communication device and communication method
CN111078606B (en) * 2019-11-18 2021-05-11 上海灵动微电子股份有限公司 Analog I2C slave computer, implementation method thereof, terminal device and storage medium
CN111382092A (en) * 2020-03-05 2020-07-07 上海龙旗科技股份有限公司 Sensor network, method and storage medium
CN114490469A (en) * 2020-10-28 2022-05-13 南京中兴软件有限责任公司 Data receiving method, data receiving apparatus, and storage medium
CN114676088B (en) * 2022-02-18 2024-06-04 珠海全志科技股份有限公司 Communication method, device and storage medium
CN117033293B (en) * 2023-10-09 2023-12-08 井芯微电子技术(天津)有限公司 Main mode I2C/SMBUS controller and control method thereof
CN120090699B (en) * 2025-04-30 2025-06-27 成都新易盛通信技术股份有限公司 Communication method and system between test board and optical module based on I3C protocol

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Address before: 314006 Building 2, No. 778, Asia Pacific Road, Jiaxing, Zhejiang Province (Jiaxing Technopole)

Patentee before: JIAXING MICROELECTRONICS AND SYSTEM ENGINEERING CENTER, CHINESE ACADEMY OF SCIENCES