CN105741778A - AMOLED display pixel current compensation circuit and driving method thereof - Google Patents

Abstract

The invention relates to the technical field of display, and more specifically, relates to an AMOLED display pixel current compensation circuit and a driving method thereof. The AMOLED display pixel current compensation circuit comprises a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a capacitor CS, and an OLED. An AMOLED pixel driving circuit provides an OLED driving current through a current compensation function. A better transistor and OLED characteristic offset compensation effect is achieved, and the linearity of input signals and output signals is improved.

Description

A kind of AMOLED display pixel current compensation circuit and its driving method

technical field

The present invention relates to the field of display technology, and more particularly, to an AMOLED display pixel current compensation circuit and a driving method thereof.

Background technique

In recent years, Active Matrix Organic Light Emitting Diode (ActiveMatrixOrganicLightEmittingDiode abbreviation: AMOLED) displays with its unique performance: high efficiency, high contrast, high brightness, high resolution, large viewing angle and fast response, which has attracted great attention from researchers. interest.

The simplest drive circuit for AMOLED display pixels consists of two transistors and a capacitor (referred to as "2T-1C" circuit, as shown in Figure 1). This circuit inputs a voltage signal during the data writing period, and due to The presence of the capacitor C _S keeps the gate voltage of the drive transistor as the input voltage signal, so that a continuous and constant OLED drive current can be obtained during the entire drive cycle. However, due to the inhomogeneity of device preparation and aging, the "2T-1C" circuit has a large transistor TFT and OLED characteristic shift problem. Therefore, a compensation circuit is needed to improve the performance of the AMOLED display pixel drive circuit.

At present, many scientists and engineers are working on proposing effective compensation driving circuits to solve the problem of transistor TFT and OLED characteristic shift. There are two main types of pixel drive circuit compensation technologies: voltage compensation and current compensation, and the effect of current compensation is better than that of voltage compensation. Li, ChesterC and Ikeda, K et al. proposed the phenomenon of channel length modulation effect of thin film transistor TFT in "Aphysicalpoly-siliconthinfilmtransistormodelforcircuitsimulations[J].IEDM'93.TechnicalDigest., International, 1993, pp.497-500." There is no solution to this phenomenon existing in the AMOLED display pixel driving circuit. NathanA and SakariyaK proposed a current compensation circuit based on a traditional current mirror in "Amorphous silicon TFT circuit integration for OLED display son glass and plastic. proceeding as the Custom Integrated Circuits Conference, 2003 Proceeding as the IEEE2003, F21-24 Sept. 2003, 2003 [C]." As shown in Figure 2, the pixel drive circuit is based on a traditional current mirror The current compensation function provides OLED driving current, but its current compensation circuit is affected by the channel length modulation effect.

Therefore, the AMOLED display pixel driving circuit in the prior art still has the following problems:

(1) The existing current compensation technology based on the traditional current mirror is affected by the channel length modulation effect of the transistor, and there is room for improvement in the compensation effect.

(2) The existing AMOLED display pixel drive circuit data input signal and output signal are not linear or have low linearity, which is not conducive to display brightness adjustment.

Contents of the invention

The purpose of the present invention is to overcome at least one deficiency of the prior art, to provide an AMOLED display pixel current compensation circuit and its driving method, compared with the current compensation circuit based on the traditional current mirror, the improved current compensation circuit proposed by the present invention , can realize better transistor characteristic offset compensation, OLED characteristic offset compensation and improve the linearity of input signal and output signal.

In order to achieve the above object, the technical scheme adopted in the present invention is:

Provide an AMOLED display pixel current compensation circuit, including transistor T1, transistor T2, transistor T3, transistor T4, transistor T5, transistor T6, capacitor _CS and OLED;

Wherein, the drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2 and then connected to the capacitor _CS , or the source of the transistor T3 is connected to the gate of the transistor T5 and the gate of the transistor T6 and then connected to the capacitor _CS ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The AMOLED pixel driving circuit provides OLED driving current through current compensation.

In the above solution, during the display data writing mode, the transistor T3 and the transistor T4 are turned on, and the AMOLED pixel driving circuit provides the self-adjusting driving voltage of the capacitor C _S through the input current signal and the improved current mirror effect, thereby obtaining the OLED driving current; During the display data holding mode, the transistor T3 and transistor T4 are cut off, the capacitor _CS has no discharge circuit, and its self-regulating driving voltage is maintained, the driving current of the OLED remains unchanged, and the brightness of the display pixel remains unchanged. The AMOLED display pixel current compensation circuit of the present invention can realize better transistor characteristic offset compensation, OLED characteristic offset compensation and improve the linearity of input signal and output signal.

Preferably, the transistor T1, transistor T2, transistor T3, transistor T4, transistor T5 and transistor T6 are all N-type transistors; the source of the transistor T1 and the source of the transistor T2 are connected to the power ground; the gate of the transistor T2 Connected to the drain; the positive pole of the OLED is connected to the power supply V _DD , the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the gate of the transistor T5 and the gate of the transistor T6, and then connected to one end of the capacitor C _S The other end of the capacitor _CS is connected to the power supply V _DD .

Preferably, the transistor T1, transistor T2, transistor T3, transistor T4, transistor T5 and transistor T6 are all N-type transistors; the source of the transistor T1 and the source of the transistor T2 are connected to the power ground; the gate of the transistor T6 Connected to the drain; the positive pole of the OLED is connected to the power supply V _DD , the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2, and then connected to one end of the capacitor C _S The other end of the capacitor _CS is connected to the power ground.

Preferably, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all N-type transistors; the source of the transistor T1 and the source of the transistor T2 are connected to the power ground; the positive pole of the OLED is connected to the power supply V _DD is connected, the cathode of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2, and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply connected to the ground; the gate of the transistor T6 is connected to the gate of the transistor T5 and then connected to the power supply V _BISE .

Preferably, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 and the source of the transistor T2 are all connected to the power supply V _DD ; the gate of the transistor T2 The pole is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power ground; the source of the transistor T3 is connected to the gate of the transistor T5 and the gate of the transistor T6, and then connected to one end of the capacitor C _S The other end of the capacitor _CS is connected to the power ground.

Preferably, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 and the source of the transistor T2 are all connected to the power supply V _DD ; the gate of the transistor T6 The pole is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power ground; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2, and then connected to one end of the capacitor C _S The other end of the capacitor _CS is connected to the power supply V _DD .

Preferably, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 and the source of the transistor T2 are connected to the power supply V _DD ; the positive pole of the OLED and The drain of the transistor T6 is connected, the negative pole of the OLED is connected to the power supply ground; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2, and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply V _DD is connected; the gate of the transistor T6 is connected to the gate of the transistor T5 and then connected to the power supply V _BISE .

Preferably, the ratio of the ratio of the channel width to the channel length of the transistor T1 to the ratio of the channel width to the channel length of the transistor T2 is a fixed value, and the fixed value is equal to the channel width and the channel length of the transistor T5 The ratio of the ratio to the ratio of the channel width to the channel length of transistor T6. Such setting can overcome the effect of transistor channel length modulation.

Preferably, the transistor T1 and the transistor T2 are current mirror structures, so that the current flowing through the transistor T1 and the transistor T2 has a linear relationship.

A driving method of an AMOLED display pixel current compensation circuit is provided. During the display data writing mode, the transistor T3 and the transistor T4 are turned on, and the AMOLED pixel driving circuit provides a self-regulating driving of the capacitance C _S through an input current signal and an improved current mirror effect. Voltage, so as to obtain the OLED drive current; during the display data hold mode, the transistor T3 and transistor T4 are cut off, the capacitor _CS has no discharge circuit, and its self-regulating drive voltage is maintained, the drive current of the OLED remains unchanged, and the brightness of the display pixel remains unchanged.

The above-mentioned driving circuit and driving method are also applicable to other active light-emitting displays, for example, an LED display pixel driving circuit is to replace the OLED in the above-mentioned AMOLED pixel driving circuit with an LED.

Compared with the prior art, the present invention mainly has the following beneficial effects: realizing more effective transistor characteristic offset compensation; realizing more effective OLED characteristic offset compensation; and improving the linearity of input signal and output signal.

Description of drawings

Figure 1 is the AMOLED pixel basic drive circuit, referred to as "2T-1C" circuit.

Figure 2 is the current compensation circuit proposed by NathanA and SakariyaK et al.

Figure 3 (a), (b) and (c) are three current compensation circuits based on N-type transistors proposed by the present invention.

FIG. 4 is a timing diagram of the N-type transistor current compensation circuit proposed by the present invention.

Figure 5(a), (b) and (c) are three current compensation circuits based on P-type transistors proposed by the present invention.

FIG. 6 is a timing diagram of the P-type transistor current compensation circuit proposed by the present invention.

detailed description

In order to make the patent of the present invention better understood by technical personnel, the present invention will be further described below in conjunction with the accompanying drawings.

Example 1

The current compensation circuit of this embodiment is based on N-type transistors, the first N-type transistor current compensation circuit, as shown in Figure 3 (a), the drive circuit includes transistor T1, transistor T2, transistor T3, transistor T4, transistor T5 , transistor T6, capacitor _CS and OLED; the transistor T1, transistor T2, transistor T3, transistor T4, transistor T5 and transistor T6 are all N-type transistors; the transistor T1 and transistor T2 are current mirror structures, so that The currents of transistor T1 and transistor T2 have a linear relationship;

Wherein, the drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply ground; the gate of the transistor T2 is connected to the drain; the positive pole of the OLED is connected to the power supply _VDD , and the negative pole of the OLED is connected to the drain of the transistor T6; the transistor T3 The source is connected to the gate of the transistor T5 and the gate of the transistor T6 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply _VDD .

The AMOLED pixel drive circuit provides OLED drive current through current compensation.

As shown in FIG. 4 , it is a timing diagram of the current compensation circuit based on the N-type transistor proposed by the present invention. The driving method based on the current compensation circuit is:

During the display data writing mode, transistor T3 and transistor T4 are turned on, and the purpose of the pulse current signal I _PULSE is to shorten the writing time of the input current signal I _DATA in a low current state, according to the transistor saturation current I _DS formula:

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; \&mu;C</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; x</span>}}\mathrm{<span\; class="notranslate">\; W</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; L</span>}}{<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; G</span>}\mathrm{<span\; class="notranslate">\; S</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&lambda;V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}}<span\; class="notranslate">\; )</span>$

Among them, W is the channel width, L is the channel length; V _GS is the voltage between the gate and source, V _TH is the threshold voltage, V _DS is the voltage between the drain and source, C _OX is the capacitance per unit area of the gate oxide layer , μ is the carrier mobility in the conduction channel, and λ is the channel length modulation coefficient.

When preparing the transistor, the ratio of the channel width W and the channel length L of the transistor T2 and the transistor T1 is selected as B, that is:

$\frac{{\mathrm{<span\; class="notranslate">\; W</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}<span\; class="notranslate">\; :</span>\frac{{\mathrm{<span\; class="notranslate">\; W</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; :</span>\mathrm{<span\; class="notranslate">\; B</span>}$

The source and gate of transistor T1 are respectively connected to the source and gate of transistor T2, that is, the voltage V _GS between the gate and source of transistor T1 and transistor T2 is equal, and the threshold voltage V _TH of transistor T1 and transistor T2 is equal, Therefore, under the same process, the ratio of the drain current of transistor T1 to the drain current of transistor T2 can be simplified as:

$\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&lambda;V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; )</span>}{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&lambda;V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; B</span>}}$

Among them, λ is the channel length modulation coefficient, I _{DS_T1} is the drain-source current of transistor T1, I _{DS_T2} is the drain-source current of transistor T2, V _{DS_T1} is the drain-source voltage of transistor T1, and V _{DS_T2} is the drain-source voltage of transistor T2.

It can be known from the above formula that when V _{DS_T1} and V _{DS_T2} are equal, the ratio of the drain current of transistor T2 to the drain current of transistor T1 is B. Add transistor T5 and transistor T6 to this circuit, when selecting the parameters of transistor T5 and transistor T6, make:

$\frac{{\mathrm{<span\; class="notranslate">\; W</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 5</span>}}}{{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 5</span>}}}<span\; class="notranslate">\; :</span>\frac{{\mathrm{<span\; class="notranslate">\; W</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 6</span>}}}{{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}\mathrm{<span\; class="notranslate">\; 6</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; :</span>\mathrm{<span\; class="notranslate">\; B</span>}$

Due to the current relationship in the circuit loop where the transistor T5 and the transistor T6 are located, that is, the voltage V _GS between the gate and source of the transistor T5 and the transistor T6 needs to be equal, the gate of the transistor T5 and the transistor T6 are connected, and the source of the transistor T5 is connected to the transistor T1 The drain, the source of transistor T6 is connected to the drain of transistor T2, so we get:

V _{DS_T1} = V _{DS_T2}

I _{DS_T2} = B·I _{DS_T1}

From the circuit loop relationship, we get:

I _OLED = B·I _DATA

Therefore, it can be seen that the OLED current I _OLED and the data input current I _DATA have a linear relationship and are not affected by the channel length modulation effect of the transistor.

The above analysis process shows that the drive circuit based on the improved current mirror has a more accurate current mirror relationship than the drive circuit based on the traditional current mirror (Figure 2), and overcomes the influence of the transistor channel length modulation effect. There is a linear relationship between the output current signal I _OLED and the input current I _DATA , which has nothing to do with the parameters of the device, so the current compensation circuit proposed by the present invention can achieve better transistor and OLED characteristic offset compensation effects, and improve the input signal and output signal. linearity.

Another explanation of the driving circuit is that the pixel driving circuit can be used as a constant current source structure. The output resistance R _OUT1 of the current compensation circuit based on the traditional current mirror (Figure 2) is:

R _OUT1 = r _ds2

Among them, _rds2 is the drain-source resistance of transistor T2.

The output resistance R _OUT2 of the current compensation circuit based on the improved current mirror is:

R _OUT2 = r _ds2 r _ds6 g _m6

Among them, _rds2 is the drain-source resistance of transistor T2, _rds6 is the drain-source resistance of transistor T6, and g _m6 is the transconductance of transistor T6.

The output resistance of the constant current source becomes larger and the anti-disturbance ability is enhanced, so the current compensation circuit based on the improved current mirror can achieve better transistor and OLED characteristic offset compensation effects than the current compensation circuit based on the traditional current mirror, and improve the input signal. linearity with the output signal.

During the display data holding mode, the transistor T3 and the transistor T4 are cut off, the capacitor _CS has no discharge circuit, and maintains its self-regulating driving voltage, the driving current I _{OLED of the OLED} remains unchanged, and the brightness of the display pixel remains unchanged.

From the above display pixel current compensation circuit and the principle of its driving method, it can be known that:

(1) The mirror image ratio B of the current mirror is a fixed value, the driving current I _OLED of the OLED is only affected by the data input current I _DATA , and the transistor characteristic shift (threshold voltage and carrier mobility) has a greater impact on the OLED driving current I _OLED small, so the drive circuit can compensate for transistor characteristic shifts.

(2) The mirror image ratio B of the current mirror is a fixed value, and the driving current I _OLED of the OLED is only affected by the data input current I _DATA , and the offset of the OLED characteristics has little influence on the OLED driving current I _OLED , so the driving circuit can compensate the characteristics of the OLED offset.

(3) The output current I _OLED of the pixel driving circuit of the AMOLED display and the data input current I _DATA have a linear relationship, and the linearity is B, so the linearity between the input signal and the output signal is better.

The driving method based on the current compensation circuit is as follows: during the display data writing mode, the transistor T3 and the transistor T4 are turned on, and the AMOLED pixel driving circuit provides a self-regulating driving voltage of the capacitor C _S through the input current signal and the improved current mirror effect, thereby Obtain the OLED drive current; during the display data hold mode, the transistor T3 and transistor T4 are cut off, the capacitor _CS has no discharge circuit, and its self-regulating drive voltage is maintained, the drive current of the OLED remains unchanged, and the brightness of the display pixel remains unchanged.

As shown in Figure 3 (b), it is the second N-type transistor current compensation circuit proposed by the present invention, and the specific current compensation circuit is:

The drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply ground; the gate of the transistor T6 is connected to the drain; the positive pole of the OLED is connected to the power supply V _DD , and the negative pole of the OLED is connected to the drain of the transistor T6; the transistor T3 The source is connected to the gate of the transistor T1 and the gate of the transistor T2 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power ground.

The timing diagram of the circuit is shown in Figure 4, and the driving principle and method based on the current compensation circuit are the same as those in Figure 3(a).

As shown in Figure 3 (c), it is the third N-type transistor current compensation circuit proposed by the present invention, and the specific current compensation circuit is:

The drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply ground; the positive pole of the OLED is connected to the power supply V _DD , and the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the gate of the transistor T1 and the transistor The gate of T2 is connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply ground; the gate of the transistor T6 is connected to the gate of the transistor T5 and then connected to the power supply V _BISE .

Wherein, the power supply V _BISE provides bias voltages for the transistor T5 and the transistor T6.

The timing diagram of the circuit is shown in Figure 4, and the driving principle and method based on the current compensation circuit are the same as those in Figure 3(a).

Example 2

The current compensation circuit of this embodiment is based on P-type transistors. The first type of P-type transistor current compensation circuit is shown in FIG. 5(a). The specific current compensation circuit is:

The drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply V _DD ; the gate of the transistor T2 is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; The source is connected to the gate of the transistor T5 and the gate of the transistor T6 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power ground.

The timing diagram of the circuit is shown in FIG. 6 , and the driving principle and method based on the current compensation circuit are the same as those in the first embodiment.

As shown in Figure 5(b), it is the second type of P-type transistor current compensation circuit, and the specific current compensation circuit is:

The drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply V _DD ; the gate of the transistor T6 is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; The source is connected to the gate of the transistor T1 and the gate of the transistor T2 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply _VDD .

The timing diagram of the circuit is shown in FIG. 6 , and the driving principle and method based on the current compensation circuit are the same as those in the first embodiment.

As shown in Figure 5(c), it is the third P-type transistor current compensation circuit proposed by the present invention, and the specific current compensation circuit is:

The drain of the transistor T1 is connected to the source of the transistor T5;

The gate of the transistor T1 is connected to the gate of the transistor T2;

The drain of the transistor T2 is connected to the source of the transistor T6;

The gate of the transistor T6 is connected to the gate of the transistor T5;

The drain of the transistor T6 is connected to the OLED;

The drain of the transistor T5 is connected to the source of the transistor T4;

The source of the transistor T4 is connected to the drain of the transistor T3;

The drain of the transistor T4 is connected to the input current signal I _DATA ;

The gate of the transistor T3 is connected to the gate of the transistor T4;

The gate of the transistor T4 is connected to the row selection control signal V _SEL ;

The source of the transistor T1 and the source of the transistor T2 are connected to the power supply V _DD ; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; the source of the transistor T3 is connected to the gate of the transistor T1 and the transistor The gate of T2 is connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply V _DD ; the gate of the transistor T6 is connected to the gate of the transistor T5 and then connected to the power supply V _BISE .

Wherein, the power supply V _BISE provides bias voltages for the transistor T5 and the transistor T6.

The timing diagram of the circuit is shown in FIG. 6 , and the driving principle and method based on the current compensation circuit are the same as those in the first embodiment.

The embodiments of the present invention are not limited by the foregoing, and any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be equivalent replacement methods, and are included in within the protection scope of the present invention.

Claims (10)

1. A kind of AMOLED display pixel current compensation circuit, it is characterized in that, this drive circuit comprises transistor T1, transistor T2, transistor T3, transistor T4, transistor T5, transistor T6, electric capacity _CS and OLED; Wherein, the drain of the transistor T1 is connected to the source of the transistor T5; The gate of the transistor T1 is connected to the gate of the transistor T2; The drain of the transistor T2 is connected to the source of the transistor T6; The gate of the transistor T6 is connected to the gate of the transistor T5; The drain of the transistor T6 is connected to the OLED; The drain of the transistor T5 is connected to the source of the transistor T4; The source of the transistor T4 is connected to the drain of the transistor T3; The drain of the transistor T4 is connected to the input current signal I _DATA ; The source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2 and then connected to the capacitor _CS , or the source of the transistor T3 is connected to the gate of the transistor T5 and the gate of the transistor T6 and then connected to the capacitor _CS ; The gate of the transistor T3 is connected to the gate of the transistor T4; The gate of the transistor T4 is connected to the row selection control signal V _SEL . 2. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all N-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power ground; the gate of the transistor T2 is connected to the drain; the positive pole of the OLED is connected to the power supply V _DD , the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the transistor T5 The gate of the transistor T6 is connected to the gate of the transistor T6 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply _VDD . 3. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all N-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power ground; the gate of the transistor T6 is connected to the drain; the positive pole of the OLED is connected to the power supply V _DD , and the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the transistor T1 The gate of the transistor T2 is connected to the gate of the transistor T2 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power ground. 4. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all N-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power supply ground; the positive pole of the OLED is connected to the power supply V _DD , the negative pole of the OLED is connected to the drain of the transistor T6; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2 Afterwards, it is connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power ground; the gate of the transistor T6 is connected to the gate of the transistor T5, and then connected to the power source V _BISE . 5. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power supply V _DD ; the gate of the transistor T2 is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; the source of the transistor T3 is connected to the transistor T5 The gate of the transistor T6 is connected to the gate of the transistor T6 and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power ground. 6. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power supply V _DD ; the gate of the transistor T6 is connected to the drain; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; the source of the transistor T3 is connected to the transistor T1 The gate of the transistor T2 is connected to the gate of the transistor T2, and then connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power supply V _DD . 7. The AMOLED display pixel current compensation circuit according to claim 1, wherein the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are all P-type transistors; the source of the transistor T1 The source of the transistor T2 is connected to the power supply V _DD ; the positive pole of the OLED is connected to the drain of the transistor T6, and the negative pole of the OLED is connected to the power supply ground; the source of the transistor T3 is connected to the gate of the transistor T1 and the gate of the transistor T2 Afterwards, it is connected to one end of the capacitor _CS , and the other end of the capacitor _CS is connected to the power source V _DD ; the gate of the transistor T6 is connected to the gate of the transistor T5, and then connected to the power source V _BISE . 8. The AMOLED display pixel current compensation circuit according to claim 1, wherein the ratio of the ratio of the channel width to the channel length of the transistor T1 to the ratio of the channel width to the channel length of the transistor T2 is a fixed value , and the fixed value is equal to the ratio of the ratio of the channel width to the channel length of the transistor T5 to the ratio of the channel width to the channel length of the transistor T6. 9. The AMOLED display pixel current compensation circuit according to any one of claims 1 to 8, wherein the transistor T1 and the transistor T2 are current mirror structures, so that the current flowing through the transistor T1 and the transistor T2 has a linear relationship . 10. A driving method of an AMOLED display pixel current compensation circuit, the driving method uses the AMOLED display pixel current compensation circuit according to claim 9, characterized in that: During the display data writing mode, the transistor T3 and the transistor T4 are turned on, and the AMOLED pixel driving circuit provides the self-regulating driving voltage of the capacitor C _S through the input current signal and the function of the improved current mirror, thereby obtaining the OLED driving current; During the display data holding mode, the transistor T3 and transistor T4 are cut off, the capacitor _CS has no discharge circuit, and its self-regulating driving voltage is maintained, the driving current of the OLED remains unchanged, and the brightness of the display pixel remains unchanged.