CN106294143B - Debugging method and device for chip register - Google Patents

Abstract

The invention provides a debugging method and device for a register of a chip. According to the embodiment of the invention, the operation instruction for debugging the chip to be debugged is received, the operation instruction comprises the register physical address of the chip to be debugged provided by a user, and then the specified equipment node of the driving layer in the operation system is called to obtain the register logic address of the chip to be debugged corresponding to the register physical address of the chip to be debugged, so that the register of the chip to be debugged can be operated according to the register logic address of the chip to be debugged.

Description

Debugging method and device for register of chip

【Technical field】

The invention relates to hardware debugging technology, in particular to a method and device for debugging a register of a chip.

【Background technique】

In the process of chip design, debugging and application, the most work is to debug the registers in various states, that is, to adjust the value of the registers. In the prior art, a specific debugging interface can be added to a certain chip, and when debugging, the specific debugging interface can be called to debug the registers of the chip.

Generally speaking, to adjust a terminal function, it is necessary to adjust the value of the registers of multiple chips related to the terminal function, which requires calling the specific debugging interface corresponding to each chip to debug each chip. In this way, This greatly increases the debugging workload and reduces the debugging efficiency.

[Content of the invention]

Various aspects of the present invention provide a method and device for debugging a register of a chip, so as to improve the debugging efficiency.

One aspect of the present invention provides a method for debugging a register of a chip, including:

Receive an operation instruction for debugging the chip to be debugged, where the operation instruction includes the physical address of the register of the chip to be debugged provided by the user;

Call the designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged;

The register of the chip to be debugged is operated according to the logical address of the register of the chip to be debugged.

The above aspects and any possible implementation manners further provide an implementation manner in which an operation instruction for receiving and debugging a chip to be debugged is received, and the operation instruction includes a user provided before the physical address of the register of the chip to be debugged. ,Also includes:

A debug interface is provided to the user, so that the user can provide the physical address of the register of the chip to be debugged based on the debug interface.

The above aspects and any possible implementation manners further provide an implementation manner, where the operating system includes a Linux operating system or an Android operating system.

According to the above aspect and any possible implementation manner, an implementation manner is further provided, wherein the specified device node is /dev/mem.

The above aspects and any possible implementation manners further provide an implementation manner in which the specified device node of the driver layer in the operating system is called to obtain the to-be-debugged chip corresponding to the physical address of the register of the chip to be debugged. Before debugging the logical address of the register of the chip, it also includes:

mapping the physical address of the register of the chip to be debugged to the designated device node;

Map the specified device node to user space.

Another aspect of the present invention provides a device for debugging a register of a chip, including:

a receiving unit, configured to receive an operation instruction for debugging the chip to be debugged, where the operation instruction includes the physical address of the register of the chip to be debugged provided by the user;

a calling unit, configured to call a designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged;

The operation unit is configured to operate the register of the chip to be debugged according to the logical address of the register of the chip to be debugged.

The above aspect and any possible implementation manner further provide an implementation manner, wherein the receiving unit is further configured to

A debug interface is provided to the user, so that the user can provide the physical address of the register of the chip to be debugged based on the debug interface.

The above aspects and any possible implementation manners further provide an implementation manner, where the operating system includes a Linux operating system or an Android operating system.

According to the above aspect and any possible implementation manner, an implementation manner is further provided, wherein the specified device node is /dev/mem.

In the above aspect and any possible implementation, an implementation is further provided, wherein the apparatus further includes a mapping unit for

mapping the physical address of the register of the chip to be debugged to the designated device node; and

Map the specified device node to user space.

It can be seen from the above technical solutions that in the embodiment of the present invention, by receiving an operation instruction for debugging the chip to be debugged, the operation instruction includes the physical address of the register of the chip to be debugged provided by the user, and then calls the designated device node of the driver layer in the operating system. , to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged, so that the register of the chip to be debugged can be operated according to the logical address of the register of the chip to be debugged. A specific debugging interface is added for a chip alone, but a unified debugging interface is added to all chips, so that the unified debugging interface is called to call the designated device node of the driver layer in the operating system to debug all the chips to be debugged, thereby Improved debugging efficiency.

In addition, by using the technical solution provided by the present invention, by mapping the designated device node of the driver layer in the operating system to the user space, the register addresses of all the chips to be debugged can be mapped to the user space, so that the obtained The user-visible register address of the chip to be debugged can effectively improve the operability of debugging.

In addition, with the technical solution provided by the present invention, it is not necessary to recompile the relevant programs of the registers of the chip to be debugged, but to map all the register addresses of the chip to be debugged to the user space, the operation is simple and very flexible, It can effectively further improve the debugging efficiency.

【Description of drawings】

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following will briefly introduce the accompanying drawings used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are of the present invention. In some embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

1 is a schematic flowchart of a method for debugging a register of a chip according to an embodiment of the present invention;

2 is a schematic structural diagram of a device for debugging a register of a chip provided by another embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a device for debugging a register of a chip according to another embodiment of the present invention.

【Detailed ways】

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

It should be noted that the terminals involved in the embodiments of the present invention may include but are not limited to mobile phones, personal digital assistants (Personal Digital Assistants, PDAs), wireless handheld devices, tablet computers (Tablet Computers), and personal computers (Personal Computers, PCs). ), MP3 players, MP4 players, wearable devices (eg, smart glasses, smart watches, smart bracelets, etc.), etc.

In addition, the term "and/or" in this article is only an association relationship to describe the associated objects, indicating that there can be three kinds of relationships, for example, A and/or B, it can mean that A exists alone, A and B exist at the same time, There are three cases of B alone. In addition, the character "/" in this document generally indicates that the related objects are an "or" relationship.

FIG. 1 is a schematic flowchart of a method for debugging a register of a chip according to an embodiment of the present invention, as shown in FIG. 1 .

101. Receive an operation instruction for debugging a chip to be debugged, where the operation instruction includes a physical address of a register of the chip to be debugged provided by a user.

102. Call the designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged.

The operating system may include, but is not limited to, a Linux operating system or an Android (Android) operating system, which is not particularly limited in this embodiment.

103. Operate the register of the chip to be debugged according to the logical address of the register of the chip to be debugged.

It should be noted that some or all of the execution bodies of 101 to 103 may be applications located in the local terminal, or may also be functions such as plug-ins or software development kits (Software Development Kit, SDK) set in the applications located in the local terminal. The unit may also be a processing engine located in a server on the network side, or may also be a distributed system located on the network side, which is not particularly limited in this embodiment.

It can be understood that the application may be a local program (nativeApp) installed on the terminal, or may also be a web page program (webApp) of a browser on the terminal, which is not particularly limited in this embodiment.

In this way, by receiving an operation instruction for debugging the chip to be debugged, the operation instruction includes the physical address of the register of the chip to be debugged provided by the user, and then the designated device node of the driver layer in the operating system is called to obtain the chip to be debugged. The logical address of the register of the chip to be debugged corresponding to the physical address of the register, so that the register of the chip to be debugged can be operated according to the logical address of the register of the chip to be debugged. The debugging interface is a unified debugging interface added to all chips, so that the unified debugging interface is called to call the designated device node of the driver layer in the operating system to debug all the chips to be debugged, thereby improving the debugging efficiency.

Optionally, in a possible implementation manner of this embodiment, in 101, the physical address of the register of the chip to be debugged provided by the user may be a physical address of a register, which is used to debug a register, or may also be used to debug a register. are multiple physical addresses of registers, which are used to debug multiple registers, which are not particularly limited in this embodiment.

Optionally, in a possible implementation manner of this embodiment, before step 101, a debugging interface may be further provided to the user, so that the user can provide the register of the chip to be debugged based on the debugging interface physical address.

In a specific implementation process, the user can query the technical manual to find the physical address of the register of the chip to be debugged, and input the physical address of the register of the chip to be debugged into the designated area of the debug interface to provide the information of the chip to be debugged. The physical address of the register, or the function control provided by the debugging interface can also be used to select a specified option provided by the debugging interface to provide the physical address of the register of the chip to be debugged, which is not particularly limited in this embodiment.

Optionally, in a possible implementation of this embodiment, the designated device node of the driver layer in the called operating system is used to store the physical address of the register of the chip to be debugged and the register of the chip to be debugged. Correspondence between logical addresses. The so-called register logical address refers to the register address used by the driver layer in the operating system.

Specifically, the designated device node may be a device node of /dev/mem. In operating systems such as Unix-like systems, access to devices is based on files. To access a hardware device is generally similar to accessing a common file. Therefore, device nodes under /dev exist as such a special kind of file.

Optionally, in a possible implementation manner of this embodiment, before step 102 , the physical address of the register of the chip to be debugged may be further mapped to the designated device node. In this way, the designated device node is made to store the correspondence between the physical address of the register of the chip to be debugged and the logical address of the register of the chip to be debugged. Then, the specified device node is further mapped to the user space.

Specifically, the mmap instruction can be used to map the register address of the chip to be debugged to the user space, so that the operation of the register can be completed in the user space, for example, read the value of the register, or write the value of the register, etc. Wait. In this way, operating the register address mapped to the user space is equivalent to operating the register address in the kernel space. For example, the values of all the registers that need to be viewed and written can be read in real time, or, for another example, can be read or written at one time Enter the values of multiple registers, and debug the registers dynamically in real time.

Existing debugging methods usually need to modify the code, add printing functions, compile and write executable image files into Flash, start the operating system, and connect the serial port to output the printed value. The debugging steps are very cumbersome, inefficient and inflexible. By adopting the technical solution provided by the present invention, it can run after the operating system is up. By mapping the register addresses of all the registers to be debugged to the user space, the values of the registers can be viewed and modified in real time, and the continuous register viewing and Modification, can track the effect of chip register modification on chip peripherals in real time, without modifying any code, compiling, programming, restarting and other steps. Compared with the traditional debugging method by printing the value of the register in the kernel state, this method greatly improves the debugging efficiency of the register of the chip.

In this embodiment, by receiving an operation instruction for debugging the chip to be debugged, the operation instruction includes the physical address of the register of the chip to be debugged provided by the user, and then calling the designated device node of the driver layer in the operating system to obtain the The logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged, so that the register of the chip to be debugged can be operated according to the logical address of the register of the chip to be debugged. Instead of adding a specific debugging interface, a unified debugging interface is added to all chips, so that the unified debugging interface is called to call the designated device node of the driver layer in the operating system to debug all the chips to be debugged, thereby improving the debugging efficiency.

In addition, by using the technical solution provided by the present invention, by mapping the designated device node of the driver layer in the operating system to the user space, the register addresses of all the chips to be debugged can be mapped to the user space, so that the obtained The user-visible register address of the chip to be debugged can effectively improve the operability of debugging.

In addition, with the technical solution provided by the present invention, it is not necessary to recompile the relevant programs of the registers of the chip to be debugged, but to map all the register addresses of the chip to be debugged to the user space, the operation is simple and very flexible, It can effectively further improve the debugging efficiency.

It should be noted that, for the sake of simple description, the foregoing method embodiments are all expressed as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the described action sequence. As in accordance with the present invention, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

In the above-mentioned embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

FIG. 2 is a schematic structural diagram of a device for debugging a register of a chip provided by another embodiment of the present invention, as shown in FIG. 2 . The device for debugging the registers of the chip in this embodiment may include a receiving unit 21 , a calling unit 22 and an operating unit 23 . Among them, the receiving unit 21 is used to receive an operation instruction for debugging the chip to be debugged, and the operation instruction includes the physical address of the register of the chip to be debugged provided by the user; the calling unit 22 is used to call the designation of the driver layer in the operating system. The device node is used to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged; the operation unit 23 is used to operate the chip to be debugged according to the logical address of the register of the chip to be debugged. register.

The operating system may include, but is not limited to, a Linux operating system or an Android (Android) operating system, which is not particularly limited in this embodiment.

It should be noted that part or all of the device for debugging the registers of the chip provided in this embodiment may be an application located in the local terminal, or may also be a plug-in or software development kit (Software Development Kit) set in the application located in the local terminal. Development Kit, SDK) and other functional units, or may also be a processing engine located in a server on the network side, or may also be a distributed system located on the network side, which is not particularly limited in this embodiment.

It can be understood that the application may be a local program (nativeApp) installed on the terminal, or may also be a web page program (webApp) of a browser on the terminal, which is not particularly limited in this embodiment.

Optionally, in a possible implementation of this embodiment, the receiving unit 21 may be further configured to provide the user with a debugging interface, so that the user can provide the to-be-to-be based on the debugging interface. The physical address of the register of the debug chip.

Optionally, in a possible implementation of this embodiment, the designated device node of the driver layer in the called operating system is used to store the physical address of the register of the chip to be debugged and the register of the chip to be debugged. Correspondence between logical addresses. The so-called register logical address refers to the register address used by the driver layer in the operating system.

Specifically, the designated device node may be a device node of /dev/mem. In operating systems such as Unix-like systems, access to devices is based on files. To access a hardware device is generally similar to accessing a common file. Therefore, device nodes under /dev exist as such a special kind of file.

Optionally, in a possible implementation manner of this embodiment, as shown in FIG. 3 , the device for debugging the registers of the chip provided by this embodiment may further include a mapping unit 31, which may be used to debug the to-be-debugged device. The physical address of the register of the chip is mapped to the designated device node; and the designated device node is mapped to the user space.

It should be noted that, the method in the embodiment corresponding to FIG. 1 may be implemented by the device for debugging the registers of the chip provided in this embodiment. For a detailed description, reference may be made to the relevant content in the embodiment corresponding to FIG. 1 , which will not be repeated here.

In this embodiment, an operation instruction for debugging the chip to be debugged is received by the receiving unit, the operation instruction includes the register physical address of the chip to be debugged provided by the user, and then the calling unit calls the designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged, so that the operating unit can operate the register of the chip to be debugged according to the logical address of the register of the chip to be debugged. Instead of adding a specific debugging interface for a single chip, a unified debugging interface is added to all chips, so that the unified debugging interface is called to call the designated device node of the driver layer in the operating system to debug all the chips to be debugged. , thereby improving the debugging efficiency.

In addition, by using the technical solution provided by the present invention, by mapping the designated device node of the driver layer in the operating system to the user space, the register addresses of all the chips to be debugged can be mapped to the user space, so that the obtained The user-visible register address of the chip to be debugged can effectively improve the operability of debugging.

In addition, with the technical solution provided by the present invention, it is not necessary to recompile the relevant programs of the registers of the chip to be debugged, but to map all the register addresses of the chip to be debugged to the user space, the operation is simple and very flexible, It can effectively further improve the debugging efficiency.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above may refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

In the several embodiments provided by the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined. Either it can be integrated into another system, or some features can be omitted, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units.

The above-mentioned integrated units implemented in the form of software functional units can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, and includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute the methods described in the various embodiments of the present invention. some steps. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program codes .

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that it can still be The technical solutions described in the foregoing embodiments are modified, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (6)

1. a debugging method of the register of a chip, is characterized in that, comprises: Receive an operation instruction for debugging the chip to be debugged, the operation instruction includes the register physical address of the to-be-debugged chip provided by the user, and the register physical address refers to the register address used by the driver layer in the operating system; Call the designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged; According to the logical address of the register of the chip to be debugged, operate the register of the chip to be debugged; wherein, Before the calling the designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged, the method further includes: mapping the physical address of the register of the chip to be debugged to the designated device node; Map the specified device node to user space; wherein, The receiving an operation instruction for debugging the chip to be debugged, before the operation instruction includes the physical address of the register of the chip to be debugged provided by the user, further includes: A debug interface is provided to the user, so that the user can provide the physical address of the register of the chip to be debugged based on the debug interface. 2. The method according to claim 1, wherein the operating system comprises a Linux operating system or an Android operating system. 3. The method according to claim 1, wherein the designated device node is /dev/mem. 4. A device for debugging a register of a chip, comprising: A receiving unit, configured to receive an operation instruction for debugging the chip to be debugged, the operation instruction includes the physical address of the register of the chip to be debugged provided by the user, and the physical address of the register refers to the register address used by the driver layer in the operating system ; a calling unit, configured to call a designated device node of the driver layer in the operating system to obtain the logical address of the register of the chip to be debugged corresponding to the physical address of the register of the chip to be debugged; an operation unit, configured to operate the register of the chip to be debugged according to the logical address of the register of the chip to be debugged; wherein, The apparatus also includes a mapping unit for mapping the physical address of the register of the chip to be debugged to the designated device node; and Map the specified device node to user space; wherein, The receiving unit is also used for A debug interface is provided to the user, so that the user can provide the physical address of the register of the chip to be debugged based on the debug interface. 5. The device according to claim 4, wherein the operating system comprises a Linux operating system or an Android operating system. 6. The apparatus according to claim 4, wherein the designated device node is /dev/mem.

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