CN106324476B - Sheet sand covered and diagnostic method, device and chip - Google Patents
Sheet sand covered and diagnostic method, device and chip Download PDFInfo
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- CN106324476B CN106324476B CN201510387089.6A CN201510387089A CN106324476B CN 106324476 B CN106324476 B CN 106324476B CN 201510387089 A CN201510387089 A CN 201510387089A CN 106324476 B CN106324476 B CN 106324476B
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Abstract
The present invention provides a kind of sheet sand covered and diagnostic method, device and chip.This method comprises: monitoring down trigger information, stops clock signal, freeze signal and down trigger mark according to the generation of down trigger information；According to clock signal is stopped, closing function clock freezes non-debugging module port status according to freeze signal；And after monitoring down trigger mark, internal trigger state and memory inside state are recorded；After the completion of record, restore functional clock.The sheet sand covered and diagnostic method, device and chip that the embodiment of the present invention proposes to can be automatically closed functional clock when chip runs and malfunctions, pause processor operation；While automatic trigger debugging and diagnostic function effectively improve the adjustable ability of chip, so that fault diagnosis is quicker, fault location is more accurate so as to fast and accurately obtain the internal state of chip.
Description
Technical field
The present invention relates to integrated circuit fields more particularly to a kind of sheet sand covereds and diagnostic method, device and chip.
Background technique
As the design scale of chip in contemporary integrated circuits field is increasing, complexity and integrated level are higher and higher,
But chip also requires more and more harsh from the timeliness for being designed into market, these factors make verifying work before the silicon of chip difficult
Sufficiently to carry out.Due to verifying before the silicon of chip, work is insufficient, and so as to lead to the chip after flow, there are failures.For
These failures are usually debugged and are diagnosed by the method for silicon post debugging.
Traditional silicon post debugging method is slightly different because of the difference of chip, and generalling use is in chip under functional mode
(i.e. normal operation function), the method for recording and analyzing the input and output situation of chip, by observe chip output situation with
Judge whether chip functions are correct.But as chip complexity is higher and higher, traditional debud mode is difficult in many cases
Orientation problem place, i.e. the adjustable inferior capabilities of chip.
In order to promote the adjustable ability of chip, researchers propose adjustable design (Design for
Debugablity, abbreviation DFD) method.According to the difference of debud mode, adjustable design can be divided into two classes: one kind is real
When the mode (Runtime-Trace type) tracked, another kind of is based on pause and the mode (Stop/Halt type) interrupted.Two kinds
The difference of mode is that, when observing chip status, Runtime-Trace type can run chip functions；And Stop/Halt
Type, the function logic (usually functional clock) due to being observed part are shielded, then are unable to simultaneously perform chip functions.
Stop/Halt type debugging structure specifically includes that triggering (Trigger) generation, clock control, state observation, breakpoint setup and list
Step etc..
Observable part range is smaller in the mode of real-time tracing, and continues to run when chip operation error, can not
Pause.And common Stop/Halt type debud mode, chip operation error when, equally continue to run, can not automatic pause,
And debugging and diagnostic function need to be opened by hand, while in this method chip observability and controllability it is also very low.
Summary of the invention
The embodiment of the present invention provides a kind of sheet sand covered and diagnostic method, device and chip, when solving chip debugging without
Method automatic pause and the low problem of efficiency of fault diagnosis.
On the one hand the embodiment of the present invention provides a kind of sheet sand covered and diagnostic method, comprising:
Down trigger information is monitored, stops clock signal, freeze signal and interrupt to touch according to down trigger information generation
Issue of bidding documents will；
Stop clock signal according to described, closing function clock freezes non-debugging module port shape according to the freeze signal
State；
And after monitoring the down trigger mark, internal trigger state and memory inside state are recorded；
After the completion of record, restore the functional clock；
The clock signal of stopping is for stopping the functional clock of chip, and the freeze signal is for freezing the chip interior
Non- debugging module port status, the down trigger mark indicates that the chip receives down trigger.
On the other hand the embodiment of the present invention provides a kind of sheet sand covered and diagnostic device, comprising:
Analysis and processing module is triggered, for monitoring down trigger information, stopping time clock is generated according to the down trigger information
Signal, freeze signal and down trigger mark；
Suspend module, for stopping clock signal according to, closing function clock freezes non-according to the freeze signal
Debugging module port status；
Logging modle records internal trigger state and memory inside after monitoring the down trigger mark
State；
Recovery module, for restoring the functional clock after the completion of record；
The clock signal of stopping is for stopping the functional clock of chip, and the freeze signal is for freezing the chip interior
Non- debugging module port status, the down trigger mark indicates that the chip receives down trigger.
On the other hand the embodiment of the present invention provides a kind of chip, comprising: sheet sand covered and diagnostic device as described above, and
Chip body.
The sheet sand covered and diagnostic method, device and chip that the embodiment of the present invention proposes pass through when carrying out practical debugging
Down trigger information is monitored, and clock signal, freeze signal and down trigger mark are stopped according to the generation of down trigger information, so that
It can be automatically closed functional clock, pause processor operation when chip runs and malfunctions；Automatic trigger debugging simultaneously and diagnosis function
Can, so as to fast and accurately obtain the internal state of chip, the adjustable ability of chip is effectively improved, so that fault diagnosis
More quickly, fault location is more accurate.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are some embodiments of the invention, for this
For the those of ordinary skill of field, without any creative labor, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of flow chart of sheet sand covered and diagnostic method provided in an embodiment of the present invention；
Fig. 2 is a kind of structural schematic diagram for triggering analysis and processing module provided in an embodiment of the present invention；
Fig. 3 is a kind of structural schematic diagram of jtag port provided in an embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram of sheet sand covered and diagnostic device provided in an embodiment of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
On the one hand the embodiment of the present invention provides a kind of sheet sand covered and diagnostic method, for debugging and diagnosing chip.Chip
Including sheet sand covered and diagnostic module and chip body module, chip body module includes adjustable module and non-debugging module.
As shown in Figure 1, this method comprises:
Step 101, monitoring down trigger information, according to down trigger information generation stop clock signal, freeze signal and in
Disconnected trigger flag.
Wherein, down trigger information is used for during chip operates normally when the error occurs, and triggering is interrupted.Work as core
Piece when the error occurs, can trigger interruption in normal operation by down trigger information, suspend the operation of chip processor, side
Just technical staff debugs and diagnoses for the running mistake of chip.Optionally, down trigger information can be according to listening to
The operation result and presupposed information of processor and generate, it is specifically, obtained when operation result and inconsistent presupposed information, i.e., first
Correct chip operation information is first obtained according to the design function and input data of chip, is then run and is believed according to correct chip
Corresponding presupposed information, the processor operation result of real-time sense chip, decision processor operation result and default letter is arranged in breath
Whether breath is consistent, if inconsistent, generates down trigger information.Optionally, down trigger information can also be by configuration
The configuration of bus and generate, technical staff can be as needed in the pre- breaking of specific position, so that chip runs to predetermined position
When generate down trigger information.
Sheet sand covered and diagnostic module include triggering analysis and processing module, triggering analysis and processing module monitoring down trigger letter
Breath, and clock signal, freeze signal and down trigger mark are stopped according to the generation of down trigger information.Illustratively, such as Fig. 2 institute
Show, triggering analysis and processing module stops clock signal, freeze signal and down trigger mark according to the generation of down trigger information.Triggering
Analysis and processing module includes stopping clock counter, DFD_ state machine and triggering generator, when triggering analysis and processing module monitors
Down trigger information is stopped clock counter and is started counting, with stopping the accumulative of clock counter, when being accumulated to default value,
DFD_ state machine generates corresponding state, and with persistently adding up for clock counter is stopped, DFD_ state machine carries out state switching, corresponding
Different states, triggering analysis and processing module, which is successively externally sent, stops clock signal, freeze signal and down trigger mark.Example
Property, when triggering analysis and processing module monitors down trigger information, stopping clock counter is started counting, at this time DFD_ state machine
For original state, optionally, when stopping clock counter and being accumulated to 10, DFD_ state machine is switched to first state, when stopping time clock
When counter continues to be accumulated to 20, DFD_ state machine is switched to the second state, when stopping clock counter and continuing to be accumulated to 30,
DFD_ state machine is switched to the third state, and in subsequent time, DFD_ state machine is switched to original state, stops the value of clock counter
Remain unchanged or be set to zero.When first state is effective status, clock signal will be stopped and be set to effectively, that is, to outgoing
It send and stops clock signal；When the second state is effective status, freeze signal is set to effectively, freezes letter that is, externally sending
Number；When the third state is effective status, down trigger mark is set to effectively, that is, externally sending down trigger mark
Know.
Optionally, stopping clock counter can be configured by configuring bus, can also be by triggering analysis and processing module
Scan chain configuration.When chip operates normally no down trigger information, the value for stopping clock counter remains unchanged (such as zero
Value).Illustratively, stopping the parameter in clock counter can artificially be preset by configuring bus, can also in chip reset,
It is uniformly automatically configured by configuring bus with other module parameters.It optionally, can also be in triggering analysis and processing module monitoring
To after down trigger information, the scan chain by triggering analysis and processing module is automatically configured.
Wherein, down trigger mark is for indicating that chip receives down trigger.
Step 102, basis stop clock signal, and closing function clock freezes non-debugging module port shape according to freeze signal
State.
Wherein, stop clock signal for stopping the functional clock of chip body module, freeze signal is for freezing chip master
Non- debugging module port status inside module.
The reception of chip body module stops clock signal and freeze signal, and functional clock is stopped and terminates the behavior of prefetching.?
In the normal operation and debugging process of chip, it is related to clock control, chip body module can be divided into according to region difference
Disparate modules: the module for only possessing single clock (functional clock) or only functional clock and external low-speed clock is determined
Justice is adjustable module or module to be debugged, and other parts are defined as can not debugging module or non-debugging module.For adjustable
Module, functional clock are turned on or off according to the clock signal progress clock that stops that triggering analysis module is spread out of, external low speed
Part (is stopped or is continued) by outside control.For can not debugging module, functional clock also responsive to triggering analysis module outflow
Stop clock signal, closing function clock, other clock parts continue to keep original state.
Step 103 and after monitoring down trigger mark records internal trigger state and memory inside state.
After sheet sand covered and diagnostic module monitor down trigger mark, start recording chip interior state.Specifically, packet
Include record internal trigger state and memory inside state.The internal trigger that technical staff passes through the chip to be measured of analysis record
Device state and memory inside state can carry out location of mistake and problem diagnosis, so that it is determined where problem.
Optionally, after sheet sand covered and diagnostic module monitor down trigger mark, sheet sand covered and diagnostic module configuration
Scan clock signal, scan chain start to carry out shifting function under the control of scan clock signal, and scan chain removes internal trigger
Device state and memory inside state and be recorded in register or other storage units in.
Optionally, internal trigger state includes: memory scans chain flip-flop states, non-memory scan chain trigger
State and all flip-flop states.
Step 104, after the completion of record, restore functional clock.
Optionally, before restoring functional clock, first by being shifted by the clock control scan chain of bus configuration, by above-mentioned note
The scanning chain information of record successively moves into scan chain from scan chain input port.Optionally, according to internal trigger configuration and
Corresponding configuration can be divided into memory scans chain trigger arrangement with recovery and swept with recovery, non-memory by the difference in recovery
It retouches chain trigger arrangement and recovery, all trigger arrangements and recovery and debugging control chain configures.Wherein, debugging control chain
Refer to all of the data acquisition module for being used to generate down trigger information in Fig. 2, anticipatory data module and configuration bus module
The scan chain that trigger independently forms.
Sheet sand covered and diagnostic method provided in an embodiment of the present invention are when carrying out practical debugging, by monitoring down trigger
Information, and clock signal, freeze signal and down trigger mark are stopped according to the generation of down trigger information, so that being run out in chip
It staggers the time and can be automatically closed functional clock, pause processor operation；Automatic trigger debugging simultaneously and diagnostic function, so as to fast
The fast internal state for accurately obtaining chip, effectively improves the adjustable ability of chip, so that fault diagnosis is quicker, failure
It is more accurate to position.
In order to enable those skilled in the art to be more clearly understood that technical solution provided in an embodiment of the present invention, lead to below
Specific embodiment is crossed, the sheet sand covered and diagnostic method provide the embodiment of the present invention is described in detail.
Before the monitoring down trigger information of step 101 in the above-described embodiments, further includes:
Monitoring triggering observation signal opens triggering observation mode according to triggering observation signal.
Wherein, triggering observation mode refers to the mode for observing down trigger mark.In such a mode, chip is run just
Then triggering information is sent to triggering analysis processing until monitoring internal generation down trigger information by normal function command
Module, triggering analysis and processing module to down trigger information carry out analyze and in real time generate stop clock signal, freeze signal and in
Disconnected trigger flag makes chip operating status be in pause, then according in by closing corresponding functional clock and access control
Disconnected trigger flag starts to debug and diagnose.When not needing to be debugged and diagnosed, then without observing down trigger mark, close
Close triggering observation mode.
Optionally, it powers for chip, after chip reset, first can configure normal functioning mode for chip, in operation one
After the section time, then triggering observation mode is switched to, directly can also configure triggering observation mode for chip.
Optionally, sheet sand covered and diagnostic method provided in an embodiment of the present invention are based on joint test working group (Joint
Test Action Group, abbreviation JTAG).
JTAG is a kind of international standard test protocol (IEEE 1149.1), tests and debugs for chip interior.
IEEE1149.1 standard provides that jtag port circuit includes the port an of TAP controller and the access of 5 TAP, is to survey respectively
It tries clock TCK, test data input TDI, test data output TDO, test pattern and selects TMS, test reset TRSTn.
Illustratively, as shown in figure 3, being a kind of debugging structural representation based on jtag port provided in an embodiment of the present invention
Figure.Wherein, SE indicates scan enable signal, and CLK indicates scan clock signal.In the present embodiment, firstly, power for chip, to
Chip sends reset signal, configures triggering observation mode for chip by the port TMS of JTAG.Optionally, it can also first pass through
Chip is configured functional mode by the port TMS of JTAG, after chip runs a period of time, then will by the port TMS of JTAG
Chip is configured to triggering observation mode.
Secondly, chip executes function, down trigger information is generated, triggering analysis and processing module is raw according to down trigger information
At clock signal, freeze signal and down trigger mark is stopped, down trigger mark is exported eventually by the TDO port of JTAG.Its
In, down trigger information can be configured by TDI port.The counter of triggering analysis and processing module can also be matched by TDI port
It sets.
Again, chip reception stops clock signal and freeze signal, and functional clock is stopped simultaneously basis according to clock signal is stopped
Freeze signal freezes the non-debugging module port status of chip interior, by the port TMS of JTAG by chip be configured to observation and
Logging mode, the internal trigger state and memory inside state of observation and memorization COMS clip.Specifically, passing through control JTAG's
Tck clock, control scan chain carry out shifting function, the internal trigger state of chip and memory inside state are passed through TDO
Port removes and is observed and records.
Again, it configures chip to by the port TMS of JTAG restore functional clock mode, be swept by tck clock control
Chain displacement is retouched, the scanning chain information of above-mentioned record is successively moved into scan chain from scan chain input port TDI, to carry out state
Restore, and restores the functional clock of chip.
Finally, configuring functional mode for chip once again by JTAG continues to run follow-up function, or the TMS for passing through JTAG
Port configures triggering observation mode for chip and continues to run follow-up function.In such cases, chip is not necessarily to reset, and again
Down trigger can be controlled by the clock interval of last time configuration, can be realized when clock interval is configured to unit clock interval
Single-step debug operation.
In the debugging process of said chip, the displacement of memory scans chain is carried out, it can be achieved that memory access by control TCK
Ask configuration (including address, data, read-write enabled etc. control signal)；The capture of memory scans chain is carried out by control TCK, it can be real
Existing reservoir read-write operation；The displacement of non-memory scan chain is carried out by control TCK, it can be achieved that non-memory sweep trigger is seen
It surveys, all clocks for observing the memory of module at this time stop；All trigger displacements are carried out, it can be achieved that institute by controlling TCK
There is trigger observation, all triggers and internal scannable memory for observing module at this time are switched to shift mode, shield
Memory is write enabled；The displacement of debugging control chain trigger is carried out by control TCK, it can be achieved that debugging control chain configures.
Optionally, also debugging control chain configuration mode can be configured by chip by JTAG, to carry out to debugging Quality Initiative
Configuration.
By utilizing the mutex relation between the different mode of JTAG, it then follows first configuration mode, then switch clock, to protect
It has demonstrate,proved clock and has switched steady impulse- free robustness.For example, the switching of scan chain shift clock to functional clock brings fluctuation in order to prevent, increase
Add and restores functional clock mode.Before clock switching, it is necessary to first pass through JTAG and be configured to restore functional clock mode, to make
During obtaining configuration mode, shift clock is first closed.After the completion of waiting configuration, it is then turned on functional clock.Meanwhile it using
JTAG, which debug the control of signal and observation, has the advantages such as succinct, flexible, low cost.
On the other hand the embodiment of the present invention provides a kind of sheet sand covered and diagnostic device, as shown in Figure 4, comprising:
Analysis and processing module 401 is triggered, for monitoring down trigger information, stopping time clock letter is generated according to down trigger information
Number, freeze signal and down trigger mark；
Suspend module 402, for according to clock signal is stopped, closing function clock to freeze non-debugging mould according to freeze signal
Block port status；
Logging modle 403 records internal trigger state and memory inside shape after monitoring down trigger mark
State；
Recovery module 404, for restoring functional clock after the completion of record；
Wherein, stop clock signal and be used to freeze the non-tune of chip interior for stopping the functional clock of chip, freeze signal
Die trial block port status, down trigger mark indicate that chip receives down trigger.
Optionally, the sheet sand covered and diagnostic device further include:
Bus module is configured, for configuring down trigger information；
Data acquisition module and anticipatory data module, for listening to the operation result of processor and storing presupposed information and root
Down trigger information is generated according to the operation result and presupposed information.
Optionally, further includes:
Triggering observation monitoring modular opens triggering observation mould according to triggering observation signal for monitoring triggering observation signal
Formula.
Optionally, logging modle further include:
Scan chain module, after monitoring down trigger mark, control scan clock signal realizes scan chain displacement behaviour
Make, the internal trigger state and memory inside state that writing scan chain removes.
Wherein, internal trigger state includes: memory scans chain flip-flop states, non-memory scan chain trigger-like
State and all flip-flop states.
Optionally, above-mentioned sheet sand covered and diagnostic device are based on JTAG.
On the other hand the embodiment of the present invention provides a kind of chip, comprising: sheet sand covered and diagnostic device as described above, and
Chip body.
Sheet sand covered and diagnostic method provided in an embodiment of the present invention, device and chip pass through when carrying out practical debugging
Down trigger information is monitored, and clock signal, freeze signal and down trigger mark are stopped according to the generation of down trigger information, so that
It can be automatically closed functional clock, pause processor operation when chip runs and malfunctions；Automatic trigger debugging simultaneously and diagnosis function
Can, so as to fast and accurately obtain the internal state of chip, the adjustable ability of chip is effectively improved, so that fault diagnosis
More quickly, fault location is more accurate.Meanwhile by can also by software flexible configure debugging breakpoints, setting is interrupted
The generation position of information is triggered, realizes program controllable debugging and diagnostic requirements；Scan chain is carried to chip interior using chip
State is observed and configures, and chip interior memory is captured and is observed with can be convenient, substantially increases chip
Observability and controllability；Using debugging and diagnosis based on JTAG, it is only necessary to entire tune can be completed by the port of JTAG
Examination and diagnostic process, test cost is small, simple to operate, is easy to grasp.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (12)
1. a kind of sheet sand covered and diagnostic method characterized by comprising
Down trigger information is monitored, clock signal, freeze signal and down trigger mark are stopped according to down trigger information generation
Will；
Stop clock signal according to described, closing function clock freezes non-debugging module port status according to the freeze signal；
And after monitoring the down trigger mark, internal trigger state and memory inside state are recorded；
After the completion of record, restore the functional clock；
The clock signal of stopping is for stopping the functional clock of chip, and the freeze signal is for freezing the non-of the chip interior
Debugging module port status, the down trigger mark indicate that the chip receives down trigger.
2. sheet sand covered according to claim 1 and diagnostic method, which is characterized in that the down trigger information by pair
It configures the configuration of bus and generates；Or the down trigger information according to the operation result and presupposed information for listening to processor and
It generates.
3. sheet sand covered according to claim 1 and diagnostic method, which is characterized in that before monitoring down trigger information,
The method also includes:
Monitoring triggering observation signal opens triggering observation mode according to the triggering observation signal.
4. sheet sand covered according to claim 1 and diagnostic method, which is characterized in that described and monitoring the interruption
After trigger flag, records internal trigger state and memory inside state includes:
After monitoring the down trigger mark, control scan clock signal realizes scan chain shifting function, and writing scan chain moves
Internal trigger state and memory inside state out.
5. sheet sand covered according to claim 4 and diagnostic method, which is characterized in that the internal trigger state packet
It includes: memory scans chain flip-flop states, non-memory scan chain flip-flop states and all flip-flop states.
6. sheet sand covered according to claim 1-5 and diagnostic method, which is characterized in that the sheet sand covered and
Diagnostic method is based on joint test working group JTAG.
7. a kind of sheet sand covered and diagnostic device characterized by comprising
Trigger analysis and processing module, for monitoring down trigger information, according to the down trigger information generation stop clock signal,
Freeze signal and down trigger mark；
Suspend module, for stopping clock signal according to, closing function clock freezes non-debugging according to the freeze signal
Module port state；
Logging modle records internal trigger state and memory inside state after monitoring the down trigger mark；
Recovery module, for restoring the functional clock after the completion of record；
The clock signal of stopping is for stopping the functional clock of chip, and the freeze signal is for freezing the non-of the chip interior
Debugging module port status, the down trigger mark indicate that the chip receives down trigger.
8. sheet sand covered according to claim 7 and diagnostic device, which is characterized in that the sheet sand covered and diagnostic device
Further include:
Bus module is configured, for configuring the down trigger information；
Data acquisition module and anticipatory data module, for listening to the operation result of processor with storage presupposed information and according to institute
It states operation result and the presupposed information generates down trigger information.
9. sheet sand covered according to claim 7 and diagnostic device, which is characterized in that the sheet sand covered and diagnostic device
Further include:
Triggering observation monitoring modular opens triggering observation mould according to the triggering observation signal for monitoring triggering observation signal
Formula.
10. sheet sand covered according to claim 7 and diagnostic device, which is characterized in that the logging modle includes:
Scan chain module, after monitoring the down trigger mark, control scan clock signal realizes scan chain displacement behaviour
Make, the internal trigger state and memory inside state that writing scan chain removes.
11. sheet sand covered according to claim 10 and diagnostic device, which is characterized in that the internal trigger state packet
It includes: memory scans chain flip-flop states, non-memory scan chain flip-flop states and all flip-flop states.
12. a kind of chip characterized by comprising sheet sand covered and diagnostic device as described in claim 7-11 is any.
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| CN109002388B (en) * | 2018-07-17 | 2021-11-23 | 京信网络系统股份有限公司 | A debugging method and device |
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| CN110032482A (en) * | 2019-04-11 | 2019-07-19 | 盛科网络（苏州）有限公司 | Sheet sand covered device and method |
| CN112540288B (en) * | 2020-11-30 | 2023-02-21 | 海光信息技术股份有限公司 | Method, system, device and storage medium for post-silicon chip verification |
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| CN114978965A (en) * | 2022-05-25 | 2022-08-30 | 中国第一汽车股份有限公司 | CAN diagnosis message and network message processing method and system under high-load condition of chip, electronic device and storage medium |
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