CN106471671A - Antenna feeder integrated on a multilayer printed circuit board - Google Patents

Abstract

The present disclosure relates to pre-fifth generation (5G) or 5G communication systems, beyond fourth generation (4G) communication systems, fourth generation (4G) communication systems such as Long Term Evolution LTE, provided to support higher data rates. The transmitter includes equipment for integrating the antenna feed into a multilayer printed circuit board (PCB). The device includes antenna elements disposed over a multilayer PCB having slot openings substantially overlapping each other and enabling coupling of RF signals from a printed transmission line on one of the conductive layers of the multilayer PCB. The multilayer PCB board includes at least one transceiver unit and baseband unit, so that the antenna feeder, transceiver and baseband unit are integrated into a single multilayer PCB board without reducing the bandwidth and efficiency of the antenna.

Description

Antenna feeder integrated on a multilayer printed circuit board

technical field

The present application relates generally to wireless communication devices and, more particularly, to antenna feeds integrated on multilayer printed circuit boards.

Background technique

Efforts have been made to develop improved fifth generation (5G) or pre-5G communication systems in order to meet the demand for increased wireless data traffic due to the development of fourth generation (4G) communication systems. Therefore, the 5G or pre-5G communication system is also called "super 4G network" or "post-Long Term Evolution (LTE) system".

5G communication systems are considered to be implemented in higher frequency (millimeter wave) bands such as the 60GHz band in order to achieve higher data rates. In order to reduce the propagation loss of radio waves and increase the transmission distance, beamforming, massive multiple-input multiple-output (MIMO), full-dimensional MIMO (FD-MIDO), array antennas, analog beamforming, large scale antenna technology.

In addition, in the 5G communication system, based on advanced small cells, cloud radio access network (RAN), ultra-dense network, device-to-device (D2D) communication, wireless backhaul, mobile network, cooperative communication, coordinated multi-point (CoMP) , interference cancellation at the receiving end, etc. to conduct research and development for system network improvement.

In 5G systems, Hybrid Frequency Shift Keying (FSK), Quadrature Amplitude Modulation (FQAM) and Sliding Window Superposition Coding (SWSC) as Advanced Coded Modulation (ACM), and Filtering as Advanced Access Techniques have been developed. There are group multi-carrier (FBMC), non-orthogonal multiple access (NOMA) and sparse coded multiple access (SCMA).

FD-MIMO employs a large number of active antenna elements arranged in a two-dimensional lattice at a base station (BS). In this way, the BS array can support azimuth and elevation beamforming for multi-user MIMO (MU-MIMO) with sufficient degrees of freedom. The base station's operating frequency depends on spectrum availability, service provider, and duplexing scheme used. For example, LTE TDD band #41 (2.496-2.69GHz) and #42 (3.4-3.6GHz) and FDD band #7 (2.5-2.57GHz UL and 2.62-2.69GHzDL) and #22 (3.41-3.5GHz UL and 3.51 -3.6GHz DL) provides suitable spectrum for FD-MIMO. At these frequency bands, with wavelengths in the range of 8-12 cm, the antenna system is relatively bulky given that FD-MIMO systems can consist of several hundred active antennas. Thus, a high level of integration is necessary to maintain an overall small form factor, low cost, light weight and avoid unnecessary power loss. This means that multiple boards making up an active antenna system, such as antenna board, antenna feed board, transceiver board and baseband board, need to be integrated into one compact unit.

Typically, integrating transceiver boards and baseband boards requires multilayer PCB technology and extremely efficient system architectures. However, antenna and antenna feed board integration is not straightforward as it usually results in a loss of bandwidth and efficiency.

Contents of the invention

Technical solutions

In a first embodiment, an antenna system is provided. The antenna system includes an antenna element arranged proximate to a multilayer printed circuit board (PCB) stack. The multilayer PCB stack-up includes a plurality of alternating conductive and dielectric layers, wherein a first conductive layer is configured to serve as an antenna ground plane and includes a slot opening having a lateral dimension smaller than that of the antenna element, a second The conductive layer is configured to function as a shielding layer, and the third conductive layer is configured to function as a system ground plane. The multilayer PCB stack-up also includes at least two first slot openings having lateral dimensions smaller than the lateral dimensions of the antenna element, the at least two first slot openings being arranged at similar lateral positions and passing through At least two continuous conductive layers such that the first slot openings substantially overlap each other. The multilayer PCB layup also includes a transmission line printed on the at least one conductive layer, the transmission line configured to propagate a radio frequency (RF) signal and to couple the RF signal to the antenna element through at least one of the at least two first slot openings. The multilayer PCB layup also includes at least one conductive layer having a portion configured to propagate a direct current (DC) signal. The multilayer PCB stack-up also includes at least one RF transceiver unit electrically coupled to the transmission line and at least one baseband processing unit electrically coupled to the RF transceiver unit. The multi-layer PCB stack-up also includes a plurality of conductive layer interconnection vias, the plurality of conductive layer interconnection holes make the ground plane layer and the antenna ground plane layer in the multi-layer PCB stack-up between parts, the The shielding layer is electrically connectable to portions of said conductive layer, the vias being arranged through all of the conductive layers, distributed across a substantial portion of the region of the multilayer PCB stack excluding the first slot opening.

Other technical features may be apparent to those skilled in the art from the following figures, descriptions and claims. Throughout this patent document, certain specific words and phrases are defined. Those of ordinary skill in the art should understand that these definitions apply to past uses, as well as future uses, of these defined words and phrases in most instances.

Before beginning the Detailed Description that follows, it may be advantageous to set forth certain terms and definitions of terms used throughout this patent document. The term "couple" and its derivatives mean any direct or indirect communication between two or more elements, whether or not those elements are in physical contact with each other. The terms "send", "receive" and "communicate" and their derivatives include direct and indirect communications. The words "include" and "comprise" and their derivatives mean inclusion without limitation. The word "or" is inclusive, meaning and/or. The phrase "associated with" and its derivatives mean include, be included within, interconnect with, contain, contained within be contained within, connect to or with, couple to or with, be communicable with, Cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have the nature of (have a property of), have a relationship with ... or have a relationship with ... (have a relationship to or with), etc. The term "controller" means any device, system or part thereof that controls at least one operation. Such a controller may be implemented in hardware or in a combination of hardware and software and/or firmware. The functionality associated with any particular controller can be centralized or distributed, whether locally or remotely. When the phrase "at least one of" is used with a list of items, it means that different combinations of one or more of the listed items may be used and that only one of the listed items may be required. For example, "at least one of A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C.

Description of drawings

For a more complete understanding of the present disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, wherein like reference numerals indicate like parts:

Figure 1 illustrates an exemplary wireless network according to the present disclosure;

2A and 2B illustrate exemplary wireless transmit and receive paths according to the present disclosure;

FIG. 3A shows an exemplary user equipment (UE) according to the present disclosure;

Figure 3B shows an exemplary evolved Node B (eNB) according to the present disclosure;

Figure 4 shows a patch antenna feed using a slot-coupled microstrip;

Figure 5 shows a multilayer printed circuit board (PCB) patch antenna feeder;

Figure 6 shows the Smith chart antenna impedance of the typical slot feeder in Figure 4 and the multilayer PCB slot feeder in Figure 5;

Figure 7 shows a diagram of an antenna feed circuit attached to a multi-layer PCB using connectors;

Figure 8 shows an antenna feed circuit integrated into a multi-layer PCB according to the present disclosure;

Fig. 9 shows a multi-layer PCB board integrated with an antenna feeding device according to the present disclosure;

Figure 10 shows a dual polarized antenna patch board on top of the proposed antenna feed multilayer PCB according to the present disclosure;

Figure 11 illustrates a dipole antenna assembly according to the present disclosure; and

12 and 13 illustrate the transition from the dipole antenna PCB board of FIG. 11 to a multi-layer PCB according to the present disclosure.

detailed description

1 through 13 , discussed below, and the various embodiments used to describe the principles of the disclosure in this patent document are by way of example only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged wireless communication device.

FIG. 1 illustrates an exemplary wireless network 100 according to the present disclosure. The implementation of wireless network 100 shown in FIG. 1 is used as an example only. Other implementations of wireless network 100 may be used without departing from the scope of this disclosure.

As shown in FIG. 1 , a wireless network 100 includes an eNodeB (eNB) 101 , an eNB 102 and an eNB 103 . eNB 101 communicates with eNB 102 and eNB 103 . The eNB 101 is also in communication with at least one Internet Protocol (IP) network 130, such as the Internet, a proprietary IP network, or other data network.

Depending on the network type, other well-known terms may also be used instead of "eNodeB" or "eNB", such as using "base station" or "access point". For convenience, the terms "eNodeB" and "eNB" are used in this patent document to denote network infrastructure components that provide wireless access to remote terminals. Also, other well-known terms such as "mobile station", "subscriber service station", "remote terminal", "wireless terminal" or "user equipment" may be used instead of "user equipment" or "UE" depending on the type of network. ". For convenience the terms "user equipment" and " UE" to denote a remote wireless device wirelessly accessing an eNB.

The eNB 102 provides wireless broadband access to a network 130 for a first plurality of user equipments (UEs) within the coverage area 120 of the eNB 102 . The first plurality of UEs includes: UE 111, which may be located in a small business (SB); UE 112, which may be located in an enterprise (E); UE 113, which may be located in a WiFi hotspot (HS); UE 113, which may be located in a first residence (R) UE 114; UE 115, which may be located in a second residence (R); and UE 116, which may be a mobile device (M) such as a cell phone, wireless laptop, wireless PDA, or the like. The eNB 103 provides wireless broadband access to the network 130 for a second plurality of UEs within the coverage area 125 of the eNB 103 . The second plurality of UEs includes UE 115 and UE 116 . In some embodiments, one or more of the eNBs 101-103 may communicate with each other and with the UEs 111-116 using 5G, LTE, LTE-A, WiMAX, or other advanced wireless communication technologies.

Dashed lines show the approximate extent of coverage areas 120 and 125, which are shown as approximately circular for purposes of illustration and description only. It should be clearly understood that coverage areas associated with an eNB, such as coverage areas 120 and 125, may have other shapes, including irregular shapes, depending on the configuration of the eNB and radio environment variations related to natural and man-made interference.

As described in more detail below, one or more of the eNBs 101-103 includes equipment for integrating the antenna feed into a multi-layer PCB including multiple conductive and dielectric layers. The antenna feed board is integrated onto a multi-layer PCB board including the remaining key telecommunication system components such as at least one of the transceiver unit and the baseband unit. The overall thickness of the integrated board is less than 2.54 mm (0.100") and can be mass-produced at low cost and with high reliability.

Although FIG. 1 shows one example of a wireless network 100, various changes may be made to FIG. 1 . For example, wireless network 100 may include any number of eNBs and any number of UEs in any suitable arrangement. Furthermore, eNB 101 can communicate directly with any number of UEs and provide wireless broadband access to network 130 to these UEs. Likewise, each eNB 102-103 can communicate directly with the network 130 and provide direct wireless broadband access to the network 130 for UEs. Also, eNB 101, 102 and/or 103 may provide access to other or additional external networks, such as external telephone networks or other types of data networks.

2A and 2B illustrate example wireless transmit and receive paths according to the present disclosure. In the following description, transmit path 200 may be described as being implemented in an eNB (such as eNB 102 ), while receive path 250 may be described as being implemented in a UE (eg, UE 116 ). However, it will be appreciated that receive path 250 may be implemented in the eNB and transmit path 200 may be implemented in the UE. In some embodiments, the transmit path 200 and the receive path 250 include devices for integrating the antenna feed into a multi-layer PCB including multiple conductive and dielectric layers.

The transmit path 200 includes a channel coding and modulation block 205, a serial-to-parallel (S-to-P) block 210, an N-sample inverse fast Fourier transform (IFFT) block 215, a parallel-to-serial (P-to-S) block 220 . Add a cyclic prefix block 225 and an up-converter (UC) 230 . Receive path 250 includes down converter (DC) 255, decyclic prefix block 260, serial to parallel (S to P) block 265, fast Fourier transform (FFT) block with N samples 270, parallel to serial (P to S) block 275 and channel decoding and modulation block 280 .

In transmit path 200, channel coding and modulation block 205 receives a set of information bits, performs coding (such as low density parity check (LDPC) coding), and modulates the input bits (such as quadrature phase shift keying (QPSK) or Quadrature Amplitude Modulation (QAM)) to generate a sequence of frequency-domain modulation symbols. Serial-to-parallel block 210 converts (eg, demultiplexes) serial modulation symbols into parallel data to generate N parallel symbol streams, where N is the number of IFFT/FFT samples used in eNB 102 and UE 116 . The N-sample IFFT block 215 performs an IFFT operation on the N parallel symbol streams to produce a time-domain output signal. Parallel-to-serial block 220 converts (eg, multiplexes) the parallel time-domain output symbols from N-samples IFFT block 215 to produce a serial time-domain signal. Add cyclic prefix block 225 inserts a cyclic prefix to the time domain signal. Upconverter 230 modulates (eg, upconverts) the output of add cyclic prefix block 225 to an RF frequency for transmission over a wireless channel. The signal can also be filtered at baseband before conversion to RF frequency.

The transmitted RF signal from eNB 102 reaches UE 116 after traversing the wireless channel, and operations performed at UE 116 are inverse to those performed at eNB 102 . Downconverter 255 downconverts the received signal to baseband frequency, and decyclic prefix block 260 removes the cyclic prefix to produce a serial time domain baseband signal. Serial to parallel block 265 converts the time domain baseband signal to parallel time domain signal. The N-sample FFT block 270 performs an FFT algorithm to generate N parallel frequency-domain signals. Parallel-to-serial block 275 converts the parallel frequency domain signal into a sequence of modulated data symbols. Channel decoding and demodulation block 280 demodulates and decodes the modulated symbols to recover the original input data stream.

Each of the eNBs 101-103 may implement a transmit path 200 similar to transmission in the downlink to UEs 111-116, and may implement a receive path 250 similar to reception in the uplink from UEs 111-116. Likewise, each of the UEs 111-116 may implement a transmit path 200 for transmissions in the uplink to the eNBs 101-103 and may enable reception for receptions in the downlink from the eNBs 101-103 Path 250.

Each of the components in FIGS. 2A and 2B can be implemented using hardware only or using a combination of hardware and software/firmware. As a specific example, at least some components in FIG. 2A and FIG. 2B may be realized by software, while other components may be realized by configurable hardware or a combination of software and configurable hardware. For example, FFT block 270 and IFFT block 215 may be implemented as configurable software algorithms, wherein the value of the number of samples N may be modified according to the embodiment.

Furthermore, although the present disclosure is described as using FFT and IFFT, this is used as an example only and should not be construed as limiting the scope of the present disclosure. Other types of transforms such as discrete Fourier transform (DFT) equations and inverse discrete Fourier transform (IDFT) equations may be used. It will be appreciated that the value of the variable N may be any integer (such as 1, 2, 3, 4, etc.) for the DFT equation and the IDFT equation, while the value of the variable N may be a power of 2 for the FFT equation and the IFFT equation Any integer (eg, 1, 2, 4, 8, 16, etc.) of .

Although Figures 2A and 2B illustrate examples of wireless transmission and reception paths, various changes may be made to Figures 2A and 2B. For example, various components in FIGS. 2A and 2B may be combined, further subdivided, or omitted, and other components may be added according to specific needs. Additionally, Figures 2A and 2B are intended to illustrate examples of the types of transmit and receive paths that may be used in a wireless network. Any other suitable architecture may be used to support wireless communications in a wireless network.

FIG. 3A illustrates an exemplary UE 116 in accordance with the present disclosure. The implementation of UE 116 shown in FIG. 3 is used as an example only, and UEs 111-115 of FIG. 1A may have the same or similar configuration. However, UEs come in a variety of configurations, and Figure 3A does not limit the scope of this disclosure to any particular embodiment of the UE.

UE 116 includes multiple antennas 305a-305n, radio frequency (RF) transceivers 310a-310n, transmit (TX) processing circuitry 315, microphone 320, and receive (RX) processing circuitry 325. TX processing circuitry 315 and RX processing circuitry 325 are coupled to each of RF transceivers 310a-310n, respectively, e.g., RF transceiver 310a, RF transceiver 310a, RF transceiver 210b to the Nth RF transceiver 310n. In some implementations, UE 116 includes a single antenna 305a and a single RF transceiver 310a. In certain embodiments, one or more of the antennas 305 includes a device for integrating the antenna feed into a multi-layer PCB including a plurality of conductive and dielectric layers. UE 116 also includes speaker 330 , main processor 340 , input/output (I/O) interface (IF) 345 , keyboard 350 , display 355 and memory 360 . Memory 360 includes a base operating system (OS) program 361 and one or more applications 362 .

RF transceivers 310a-310n receive incoming RF signals transmitted by eNBs or APs of network 100 from respective antennas 305a-305n. In certain embodiments, each of the RF transceivers 310a-310n and corresponding antennas 305a-305n are configured for a particular frequency band or technology type. For example, the first RF transceiver 310a and antenna 305a may be configured to ), while the second RF transceiver 310b and antenna 305b may be configured to communicate via IEEE 802.11 communication (such as Wi-Fi), and the other RF transceiver 310n and antenna 305n may be configured to communicate via cellular communication ( such as 3G, 4G, 5G, LTE, LTE-A or WiMAX) for communication. In certain embodiments, one or more of the RF transceivers 310a-310n and corresponding antennas 305a-305n are configured for a specific frequency band or the same technology type. RF transceivers 310a-310n down-convert input RF signals to generate intermediate frequency (IF) signals or baseband signals. The IF or baseband signal is sent to RX processing circuitry 325, which generates a processed baseband signal by filtering, decoding and/or digitizing the baseband or IF signal. RX processing circuit 325 sends the processed baseband signal to speaker 330 (such as for voice data) or to main processor 340 for further processing (such as for web browsing data).

TX processing circuitry 315 receives analog or digital voice from microphone 320 , or other output baseband data (such as web page data, email, or interactive video game data) from main processor 340 . TX processing circuitry 315 encodes, multiplexes, and/or digitizes the output baseband data to produce a processed baseband signal or IF signal. RF transceivers 310a-310n receive output processed baseband or IF signals from TX processing circuitry 315 and upconvert the baseband or IF signals to RF signals for transmission via one or more of antennas 305a-305n.

Main processor 340 may include one or more processors or other processing devices, and executes a basic OS program 361 stored in memory 360 to control the overall operation of UE 116 . For example, main processor 340 may control the reception of forward channel signals and the transmission of reverse channel signals through RF transceivers 310a-310n, RX processing circuit 325 and TX processing circuit 315 according to known principles. In some implementations, main processor 340 includes at least one microprocessor or microcontroller.

The main processor 340 is also capable of executing other processes and programs present in the memory 360 . Main processor 340 may move data into and out of memory 360 as required by the execution process. In some embodiments, the main processor 340 is configured to execute an application 362 based on an OS program 361 or in response to a signal received from an eNB or an operator. The main processor 340 is also coupled to an I/O interface 345 that enables the UE 116 to connect to other devices such as laptops and portable computers. I/O interface 345 is the communication path between these accessories and main controller 340 .

The main processor 340 is also coupled to a keyboard 350 and a display unit 355 . A user of UE 116 may use keyboard 350 to enter data into UE 116 . Display 355 may be a liquid crystal display or other display capable of presenting text or at least limited graphics, such as from a website, or a combination of text and limited graphics.

Memory 360 is coupled to main processor 340 . A portion of memory 360 may include random access memory (RAM), and another portion of memory 360 may include flash memory or other read-only memory (ROM).

Although FIG. 3A shows one example of UE 116, various changes may be made to FIG. For example, various components in FIG. 3A may be combined, further subdivided, or omitted, and other components may be added according to particular needs. As a specific example, the main processor 340 may be divided into a plurality of processors, such as one or more central processing units (CPUs) and one or more graphics processing units (GPUs). Furthermore, while FIG. 3 shows the UE 116 configured as a mobile phone or a smartphone, the UE may be configured to function as other types of mobile or stationary devices.

Figure 3B illustrates an example eNB 102 according to the present disclosure. The implementation of eNB 102 shown in FIG. 3B is used as an example only, and other eNBs of FIG. 1 may have the same or similar configuration. However, eNBs come in a variety of configurations, and Figure 3B does not limit the scope of this disclosure to any particular embodiment of an eNB.

The eNB 102 includes a plurality of antennas 365a - 365n , a plurality of RF transceivers 370a - 370n , transmit (TX) processing circuitry 375 and receive (RX) processing circuitry 380 . The eNB 102 also includes a controller/processor 385 , memory 390 and a backhaul or network interface 395 .

RF transceivers 370a-370n receive input RF signals (such as signals transmitted by UEs or other eNBs) from antennas 365a-365n. RF transceivers 370a-370n down-convert input RF signals to generate IF signals or baseband signals. The IF or baseband signal is sent to RX processing circuitry 380, which generates a processed baseband signal by filtering, decoding and/or digitizing the baseband or IF signal. RX processing circuit 320 sends the processed baseband signal to controller/processor 385 for further processing. In certain embodiments, one or more of the antenna 370 or the RF transceivers 370a-370n includes a device for integrating the antenna feed into a multi-layer PCB including multiple conductive and dielectric layers.

TX processing circuitry 375 receives analog data or digital data (such as voice data, web page data, email, or interactive video game data) from controller/processor 385 . TX processing circuitry 375 decodes, multiplexes, and/or digitizes the output baseband data to produce a processed baseband signal or IF signal. RF transceivers 370a-370n receive output processed baseband or IF signals from TX processing circuitry 385 and upconvert the baseband or IF signals to RF signals for transmission via antennas 365a-365n.

Controller/processor 385 may include one or more processors or other processing devices that control the overall operation of eNB 102 . For example, controller/processor 385 may control reception of forward channel signals and transmission of reverse channel signals via RF transceivers 370a-370n, RX processing circuit 380, and TX processing circuit 375 according to well-known principles. Controller/processor 385 may also support other functions, such as more advanced wireless communication functions. For example, controller/processor 385 may support beamforming operations or directional routing operations in which output signals from multiple antennas 365a-365n are weighted differently to effectively steer the output signals to in the desired direction. In eNB 102, a controller/processor 385 may support various other functions. In some embodiments, the controller/processor 385 includes at least one microprocessor or microcontroller.

Controller/processor 385 is also capable of executing programs present in memory 390 as well as other processes, such as a basic OS. Controller/processor 385 can move data into and out of memory 390 as required by the execution process.

The controller/processor 325 is also coupled to a backhaul or network interface 395 . A backhaul or network interface 395 allows the eNB 102 to communicate with other devices or systems over a backhaul connection or over a network. Interface 395 may support communication via any suitable wired or wireless connection. For example, when eNB 102 is implemented as part of a cellular communication system, such as that supporting 5G, LTE or LTE-A, interface 395 may allow eNB 102 to communicate with other eNBs over wired or wireless backhaul connections. When the eNB 102 is implemented as an access point, the interface 395 may allow the eNB 102 to communicate through a wired or wireless local area network, or through a wired or wireless connection to a larger network, such as the Internet. Interface 395 includes any suitable structure that supports communication via wired or wireless connections, such as Ethernet or RF transceivers.

Memory 390 is coupled to controller/processor 385 . A portion of memory 390 may include RAM, and another portion of memory 390 may include flash memory or other ROM.

As described in more detail below, the transmit and receive paths of the eNB 102 (implemented using RF transceivers 370a-370n, TX processing circuitry 375, and/or RX processing circuitry 380) support communication with aggregates of FDD and TDD cells.

Although FIG. 3B shows one example of an eNB 102, various changes may be made to FIG. 3B. For example, eNB 102 may include any number of each of the components shown in FIG. 3B. As a specific example, an access point may include multiple interfaces 395, and controller/processor 385 may support a routing function that routes data between different network addresses. As another specific example, while eNB 102 is shown as including a single instance of TX processing circuitry 375 and a single instance of RX processing circuitry 380, eNBs 102 may each include multiple instances (such as one for each RF transceiver). TX processing circuit 375 and RX processing circuit 380).

Figure 4 shows a patch antenna feed 400 using a slot-coupled microstrip. Two popular antenna elements used in FD-MIMO BS arrays (patch antenna and dipole antenna) both suffer from performance degradation when trying to integrate with other RF building blocks. Specifically, in order for a printed microstrip patch antenna to cover a frequency bandwidth of approximately 10% of that required for operation in bands such as LTE TDD #41, #42 and FDD #7, #22, approximately 1-5 mm air gap 405 in place of the dielectric substrate. The air gap 405 can be established by using plastic spacers 410 to fix the patch antenna board 415 at the desired distance above the board 420 with the ground plane 425 and slot 430 opening. In this case, it is not good practice to feed the patch antenna through direct electrical contact (such as using some kind of probe feeding technique), as this increases mechanical complexity, reduces reliability, increases overall cost, and Requires customization that would hinder assembly and production. Therefore, the patch antenna feeder 400 uses an aperture-coupled feeding technique in which a slot 430 is opened on the antenna ground plane 425 in the area below the patch antenna 435, and the RF signal is routed from the printed transmission line across the slot 430 opening. 440 is coupled to patch antenna 415 .

This is a typical form of a fed aperture coupled patch antenna. However, this technique requires that the slot 430 and the printed microstrip 440 feed line be at least λ/8 from below from the metal surface. A multilayer printed circuit board (PCB) patch antenna feed 500 as shown in FIG. As in the above, the slot 430 is actually short-circuited by the metal layer, or its quality factor Q becomes very high and the antenna bandwidth and impedance are seriously affected. For example, λ/8 at band #41 (2.496-2.69GHz) equates to a distance of 14.4mm (0.567”). This is the shortest distance a feedline must be from any copper signal routing or ground plane/routing in a multilayer PCB Otherwise, the antenna impedance deviates far from the desired 50 ohm (Ω) target, as shown in Figure 6. The adverse effect of this λ/8 spacing requirement is that it cannot route the slot-fed microstrip antenna feed line to On multilayer PCBs, this is because the maximum thickness of modern PCBs is limited to <5.08 mm (0.200").

In order to avoid this shortcoming, as shown in the antenna feed circuit 700 shown in FIG. 7, the previous method separates the shielding layer or top conductive layer 505 of the multi-layer PCB board from the antenna feed board by a distance greater than λ/8, An RF connection 705 is used to carry the RF signal from the transceiver, which is typically included on a multi-layer PCB, to the antenna feed board.

At cellular frequencies, the length of the RF link 705 is typically about 18 millimeters. The configuration of the antenna feed circuit 700 of FIG. 7 is not very practical because the configuration of the antenna feed circuit 700 increases the overall antenna form factor, increases cost due to expensive RF connectors and adapters, and the RF connectors and adapters cause extra losses in the system, increase component complexity and reduce reliability (especially when doing mass production), increase overall weight (considering a practical antenna system with about a few hundred Sensitive to misalignment errors between individual boards and RF connectors.

Embodiments of the present disclosure illustrate methods and apparatus for integrating an antenna feed board onto a multi-layer PCB board including the remaining key telecommunication system components such as at least one transceiver unit and a baseband unit. The overall thickness of the integrated board is less than 2.54 millimeters (0.100"), and the integrated board can be mass-produced at low cost and high reliability.

Fig. 8 shows an antenna feed circuit integrated into a multi-layer PCB according to the present disclosure. The implementation of the antenna feed circuit 800 shown in FIG. 8 is used as an example only. In some embodiments, one or more of the antenna 365 or transceiver 370 of the eNB 102 may have the same or similar configuration. Other implementations of the antenna feed circuit 800 may be used without departing from the scope of the present disclosure.

The antenna feed circuit 800 is integrated into a multi-layer PCB 805 . To avoid blocking the slot opening 815a on the antenna ground plane 810 layer, slot 815b openings are provided on all continuous conductive layers 820 on the multilayer PCB 805 board below the main antenna feed slot 815 . In order to ensure the electrical connection between the part of the conductive layer 820 and the system and antenna ground plane 810 layer, interconnecting conductive vias 825 are added as needed. Vias 825 are distributed across a substantial portion of the area of multilayer PCB 805 , but outside and away from openings of slots 815 on all conductive layers 820 . Antenna feed circuit 800 includes patch antenna 835 . In some embodiments, patch antenna 835 is antenna 365 . A microstrip line 830 propagating an RF signal to be coupled to a patch antenna 835 is placed above the top conductive layer 820 and partially below the patch antenna 835 . The air gap 840 is established by plastic spacers 845 securing the patch antenna board 850 at the desired distance above the board 855 with the ground plane 810 .

Fig. 9 shows a multi-layer PCB board integrated with an antenna feeding device according to the present disclosure. The implementation of the multilayer PCB board integrated with the antenna feeding device 900 shown in FIG. 9 is only used as an example. In some embodiments, one or more of the antenna 365 or transceiver 370 of the eNB 102 may have the same or similar configuration. Other implementations of the antenna feed circuit 900 may be used without departing from the scope of the present disclosure.

The multilayer PCB board integrated with the antenna feeding device 900 includes a transceiver 905 . Transceiver 905 and baseband 910 comprise part of transceiver 370 . The transceiver 905 includes power amplifiers, filters, transmit and receive (TRX) switches, duplexers, mixers, analog-to-digital converters (ADC)/digital-to-analog converters (DAC). The electrical components of the transceiver 905 are primarily coupled to the conductive layer 820a at the bottom side of the multilayer PCB 805 board, and the electrical connection to the antenna feed line 915 is achieved with interconnect vias 825, which may be on the multilayer PCB 805 board. Printed microstrip lines 830 on top of conductive layer 820 at the top side. A printed directional coupler 920 and a power splitter 925 are also placed over the conductive layer 820 at the top side of the multilayer PCB board 855 and are electrically connected to the antenna feed 915 . Baseband 910 is included on the top side of PCB board 855 and is electrically connected to transceiver unit 905 through interconnection vias 825 . Baseband 910 includes processing circuits such as ASICs, FPGAs, DSPs, memories, and the like.

Fig. 10 shows a dual polarized antenna patch board on top of the proposed antenna feed multilayer PCB according to the present disclosure. The embodiment of a dual polarized antenna patch panel 1000 shown in FIG. 10 is used as an example only. In the example shown in Figure 10, only two elements are shown. Other embodiments may be used without departing from the scope of the present disclosure.

Figure 10 shows a top view of a dual polarized patch antenna array board positioned at a short distance above a multilayer PCB including the feed device described with reference to Figure 8, with two elements 1005a and 1005b shown serving only as example. The array of vias 825 are arranged through the multilayer PCB 805 and are evenly spaced about λ/10. The via 825 is configured to act as a tuning element to compensate for the poorer feedline impedance, i.e. to rotate the poorer feedline impedance to approximately 50Ω according to FIG. Caused by the lack of vertical separation between the slotted component and the shielding layer on the bottom layer of the multilayer PCB. Without a compensating via array, it is not possible to integrate the antenna feed structure into a multilayer PCB due to the impedance indicated in Figure 8. While there is no exact formula for via array spacing, empirical data indicates that λ/10 - λ/12 yields optimal impedance in most cases, although these empirical data are not hard limits.

In addition to the patch antenna 835, this integrated feed device can also be used as a balun when feeding a dipole antenna. Dipole antennas are known to provide greater frequency bandwidth than patch antennas, and also provide a much lower cross-polarization field. This feature makes dipole antennas suitable for beamforming antenna arrays such as those used in modern MIMO wireless communication systems. A disadvantage of dipole antennas is that they require balanced feeds and impedance matching. This is usually provided by external baluns and impedance converters. The balun converts a single-ended RF signal, such as that propagated by microstrip line 830, to a differential or balanced RF signal that can be used in differential mode to feed a dipole antenna, such as through a pair of coplanar band propagating RF signal). An impedance converter is required to convert the system impedance (typically 50Ω) to the dipole antenna impedance (typically about 200Ω). This impedance transformation ratio (4:1) requires an overly long transmission line impedance converter (>λ/4), which requires extra space on the PCB, making integration difficult. In summary, for best performance, the dipole antenna needs to be placed approximately λ/4 above the ground plane.

Figure 11 illustrates a dipole antenna assembly according to the present disclosure. The implementation of dipole antenna assembly 1110 shown in FIG. 11 is used as an example only. Other embodiments may be used without departing from the scope of the present disclosure.

As shown in the example shown in Figure 11, the transfer of the RF signal from a flat multilayer PCB board, which typically has the antenna ground on the top two layers, to the dipole antenna PCB board 1105 is not direct. The ground and feed lines, the dipole antenna PCB 1105 are placed at right angles to the multilayer PCB 805 . Dipole antenna 1100 includes dipole antenna element 1110 arranged on dipole antenna PCB board 1105 . The dipole antenna PCB board 1105 is coupled to the multi-layer PCB 805 by fastening means 1115 such as right angle connectors with screws, right angle connectors with adhesive, plastic welds, other chemical bonds, or combinations thereof . The dipole antenna PCB 1105 is arranged over at least a portion of the slot 815 like a microstrip line 830 propagating RF signals.

In FIGS. 11 , 12 and 13 , the integrated feed device disclosed in the embodiments of the present disclosure is modified for use as a balun and impedance converter for feeding a dipole antenna. The transition from the dipole antenna PCB 1105 to the multilayer PCB 805 is also disclosed in FIGS. 12 and 13 . Figures 11, 12 and 13 show the apparatus disclosed in Figure 8 for feeding a patch antenna, suitable for feeding a dipole antenna.

In the example shown in FIGS. 12 and 13 , an approximately λ/2 long dipole antenna element is printed on an antenna PCB 1105 having two conductive layers 820 and one dielectric layer 1205 . Then, the antenna PCB 1105 is placed at right angles to the multilayer PCB 805, which has an antenna feeder (ie, a microstrip line 830 for propagating RF signals) and a ground plane 810 on its upper two layers. In certain embodiments, the antenna PCB 1105 is about λ/4 high at the center frequency of operation. The dipole antenna PCB board 1105 is secured to the multi-layer PCB 805 using fastening means 1115 such as plastic right angle connectors with screws, right angle connectors with adhesive, plastic welds, other chemical bonds, or their combination. In some embodiments, a narrow shallow groove is opened in the multilayer PCB 805 along the edge 1210 where the antenna PCB 1105 is in physical contact with the multilayer PCB 805 . The width and length of the groove are respectively equal to the thickness and length of the antenna PCB 1105 . The depth 1215 of the groove is less than the thickness of the first dielectric layer 1205 of the multilayer PCB board 805 . With this configuration, the antenna PCB 1105 can be slightly recessed into the multilayer PCB 805 such that the two balance strips for the antenna element 1110 on the antenna PCB 1105 are in substantial and effective electrical contact with the via pad 1220, Wherein, the through hole pad 1220 is located on the multilayer PCB board 805 , and is short-circuited to the ground plane of the multilayer PCB through the through holes 825 on both sides of the opening of the gap 815 . In this manner, RF signals propagating through microstrip line 830 may be coupled from microstrip line 830 and through slot 815 openings to the pair of balanced strips (i.e., antenna elements 1110) to radiate out through dipole antenna 1100, where , the microstrip line 830 is above the top conductive layer 820b of the multilayer PCB 805 and spans a portion of the slot 815 opening on the antenna ground plane, which is on the second conductive layer 820 of the multilayer PCB. This technique can be replicated at multiple locations where the dipole array is fed.

Although the present disclosure has been described through exemplary embodiments, various changes and modifications may be suggested to those skilled in the art. It is intended that the present disclosure embrace such changes and modifications as they fall within the scope of the appended claims.

Claims (15)

1. An antenna, comprising: an antenna element arranged in close proximity to a multilayer printed circuit board (PCB) stack; and The multi-layer PCB stacking includes: a plurality of alternating conductive and dielectric layers, wherein a first conductive layer is configured to serve as an antenna ground plane and includes a slot opening having a lateral dimension smaller than the lateral dimension of the antenna element, and a second conductive layer configured to serve as a shield, the third conductive layer is configured to serve as a system ground plane, At least two first slot openings having a lateral dimension smaller than the lateral dimension of the antenna element, the at least two first slot openings being arranged at similar lateral positions and passing through at least two a continuous conductive layer such that the first slot openings substantially overlap each other, a transmission line printed on at least one conductive layer, the transmission line configured to propagate a radio frequency (RF) signal and configured to couple to the antenna element through at least one of the at least two first slot openings, at least one conductive layer having a portion configured to propagate a direct current (DC) signal, at least one transceiver unit electrically connected to the transmission line, at least one baseband processing unit electrically connected to the transceiver unit; and A plurality of conductive layer interconnection vias configured to enable conductive connection between the ground plane layer and part of the antenna ground plane layer, and between the shielding layer and part of the conductive layer in the multilayer PCB stack-up , the vias are arranged to be distributed through all conductive layers, across a substantial portion of an area of the multilayer PCB stackup that does not include the first slot opening. 2. The antenna according to claim 1, wherein the antenna element is printed on an antenna PCB, the antenna PCB is arranged on the multilayer PCB stack, and is located on the side of the multilayer PCB stack. The planes are substantially parallel and at a certain distance, and the distance is maintained by a plastic spacer configured to form an air gap between the antenna PCB board and the multilayer PCB stack without forming an air gap between the antenna PCB board and the multilayer PCB stack. An electrical connection is established between the PCB board and the multi-layer PCB stack, and the height of the plastic spacer is about 2-5 mm. 3. The antenna of claim 2, wherein the antenna element comprises: A patch antenna printed on a portion of the bottom conductive layer of a two-layer antenna PCB having a thickness of about 10-150 mils and having a thickness between 1.1-5.5 range and such that conductors are completely removed from the top layer of the two-layer PCB and the bottom layer of the antenna PCB is the closest layer to the multi-layer PCB stackup; or A rectangular patch antenna having a narrow slot cut extending from corner to corner along two diagonals of the rectangular patch antenna. 4. The antenna of claim 1, wherein the transmission line is printed on a top conductive layer of the multilayer PCB, the top conductive layer being the layer closest to the antenna element, and wherein the The transmission line includes one of a microstrip line, a coplanar waveguide, or a pair of coplanar strips. 5. The antenna of claim 4, wherein the second conductive layer disposed below the top conductive layer of the multilayer PCB stack-up is configured as the antenna ground plane and comprises a lateral dimension larger than that of the antenna element. The at least one first slot opening having a small lateral dimension, the at least one first slot opening configured to couple the RF signal from the transmission line to the antenna element. 6. The antenna of claim 4, wherein the transmission line printed on the top conductive layer spans a substantial portion of the slot opening through a different layer. 7. The antenna according to claim 4, wherein the third conductive layer, the fourth conductive layer, the fifth conductive layer, the sixth conductive layer, the seventh conductive layer and the eighth continuous conductive layer each comprise shape and having a lateral dimension smaller than that of the antenna element, the slot openings are formed at similar lateral positions on each conductive layer and are arranged such that the openings substantially overlap each other and with the The slot openings on the second conductive layer substantially overlap. 8. The antenna of claim 1 , wherein the shield is substantially covered with copper and does not include a slot opening, and is configured to electrically connect a space below the shield with a space above the shield. Shield off. 9. The antenna according to claim 1, wherein a second slit opening is formed close to and adjacent to each of said first slit openings on all conductive layers having said first slit opening, said second slit opening configured to couple a second RF signal to the antenna element in a vertically polarized mode such that the antenna system is a dual polarized antenna. 10. The antenna of claim 9, wherein the RF signal and the second RF signal are coupled to a dual polarized antenna element through the first slot opening and the second slot opening. 11. The antenna of claim 1, wherein: The at least one transceiver unit includes a power amplifier, a filter, a transmit and receive (TRX) switch, a duplexer, a mixer, an audio-to-digital converter (ADC)/digital-to-audio converter (DAC), the at least a transceiver unit electrically connected to said sixth continuous conductive layer and through said interconnect via to said microstrip transmission line propagating said RF signal, The baseband unit includes processing circuitry, memory, and is electrically connected to the first conductive layer and to the transceiver unit through the interconnect vias. 12. The antenna according to claim 1, wherein the antenna element is a dipole antenna element printed on a part of the conductive layer of the two-layer antenna PCB board and has two pairs of symmetrical narrow conductive strip transmission lines, the two pairs of symmetrical narrow conductive strip transmission lines separated by a small gap and attached to one dipole feed terminal on one side, and configured to carry the RF signal to the dipole Antenna, the strip is printed on a part of the conductive layer of the antenna PCB board, the antenna PCB board is arranged on a plane perpendicular to the multilayer PCB stack and makes the other of the two conductive feed strip lines One side is in electrical contact with the antenna ground plane at two locations on substantially opposite sides of the slot opening such that an RF signal is coupled to the dipole antenna feed stripline through the slot opening, wherein the The slot opening is formed on the conductive layer of the antenna ground plane stacked on the multi-layer PCB. 13. The antenna of claim 12, wherein the two paired symmetrical narrow conductive strip transmission lines on the antenna PCB extend to the bottom edge of the antenna PCB, and wherein the antenna PCB The board is secured at right angles to the multilayer PCB stack and is secured by fastening means, wherein the antenna PCB board and the multilayer PCB board are in physical contact. 14. The antenna of claim 13, wherein each of the conductive tape transmission lines on the antenna PCB is electrically connected to a via pad on the surface of the multilayer PCB stack-up, wherein the via The lateral dimension of the via pad is approximately equal to the width of each stripline, and each pad is electrically connected to the antenna ground plane through a conductive via, the via pad and the via are located in the multilayer On a substantially opposite side of the slot opening on the antenna ground plane layer of the PCB. 15. The antenna of claim 1, wherein the antenna and the multilayer PCB are included in a housing having a planar metal portion that is grounded to a system where the multilayer PCB is stacked The face layer is electrically and thermally connected to the transceiver unit and the heat sink of the baseband unit.