CN106531622A - Preparation method of gallium arsenide-based MOSFET gate dielectric - Google Patents
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 60
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 60
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 39
- 239000001301 oxygen Substances 0.000 claims abstract description 39
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 230000004888 barrier function Effects 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 13
- COHDHYZHOPQOFD-UHFFFAOYSA-N arsenic pentoxide Chemical compound O=[As](=O)O[As](=O)=O COHDHYZHOPQOFD-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000203 mixture Substances 0.000 claims abstract description 9
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims abstract description 8
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052733 gallium Inorganic materials 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 238000004140 cleaning Methods 0.000 claims abstract description 5
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 claims abstract description 5
- 230000003647 oxidation Effects 0.000 claims abstract description 4
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical group [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 14
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 12
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 12
- 229910052746 lanthanum Inorganic materials 0.000 claims description 10
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 8
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 238000000231 atomic layer deposition Methods 0.000 claims description 7
- 239000008367 deionised water Substances 0.000 claims description 7
- 229910021641 deionized water Inorganic materials 0.000 claims description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 6
- 239000001569 carbon dioxide Substances 0.000 claims description 6
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 6
- 239000001272 nitrous oxide Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052688 Gadolinium Inorganic materials 0.000 claims description 4
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- UIWYJDYFSGRHKR-UHFFFAOYSA-N gadolinium atom Chemical compound [Gd] UIWYJDYFSGRHKR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052735 hafnium Inorganic materials 0.000 claims description 4
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052734 helium Inorganic materials 0.000 claims description 4
- 239000001307 helium Substances 0.000 claims description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 4
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- 229910052726 zirconium Inorganic materials 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000011259 mixed solution Substances 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 238000009832 plasma treatment Methods 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 abstract description 2
- 239000000243 solution Substances 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
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- 230000010354 integration Effects 0.000 description 2
- RBFDCQDDCJFGIK-UHFFFAOYSA-N arsenic germanium Chemical compound [Ge].[As] RBFDCQDDCJFGIK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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Abstract
本发明公开了一种砷化镓基MOSFET栅介质的制备方法，包括如下步骤：步骤1：清洗砷化镓衬底表面；步骤2：在清洗完成后的所述砷化镓衬底表面沉积阻挡层；步骤3：利用直接离化的氧等离子体或间接离化的氧等离子体处理步骤2获得的衬底表面，氧等离子扩散进入到所述阻挡层和砷化镓界面处，从而氧化砷化镓表面，在所述阻挡层与所述砷化镓衬底界面形成一薄层五氧化二砷和三氧化二镓的混合物层；步骤4：在氧等离子体氧化后的砷化镓衬底表面沉积高介电常数的栅氧化物层。本发明的制备方法能够在砷化镓表面形成热稳定高、界面态密度小、等效氧化层厚度薄的栅介质，从而提高砷化镓沟道MOSFET器件的电学特性。
The invention discloses a method for preparing a gallium arsenide-based MOSFET gate dielectric, which comprises the following steps: step 1: cleaning the surface of the gallium arsenide substrate; step 2: depositing a barrier on the surface of the gallium arsenide substrate after cleaning layer; step 3: using directly ionized oxygen plasma or indirect ionized oxygen plasma to treat the substrate surface obtained in step 2, oxygen plasma diffuses into the interface between the barrier layer and gallium arsenide, thereby oxidizing arsenide On the surface of gallium, a thin layer of mixture layer of diarsenic pentoxide and gallium trioxide is formed at the interface between the barrier layer and the gallium arsenide substrate; step 4: the surface of the gallium arsenide substrate after oxygen plasma oxidation A high dielectric constant gate oxide layer is deposited. The preparation method of the invention can form a gate dielectric with high thermal stability, low interface state density and thin equivalent oxide layer thickness on the gallium arsenide surface, thereby improving the electrical characteristics of the gallium arsenide channel MOSFET device.
Description
技术领域technical field
本发明涉及半导体集成技术领域，尤其涉及一种砷化镓基MOSFET栅介质的制备方法。The invention relates to the technical field of semiconductor integration, in particular to a preparation method of a gallium arsenide-based MOSFET gate dielectric.
背景技术Background technique
半导体技术作为信息产业的核心和基础，被视为衡量一个国家科学技术进步和综合国力的重要标志。在过去的40多年中，以硅CMOS技术为基础的集成电路技术遵循摩尔定律通过缩小器件的特征尺寸来提高芯片的工作速度、增加集成度以及降低成本，集成电路的特征尺寸由微米尺度进化到纳米尺度。但是当MOS器件的栅长减小到90纳米后，栅氧化层的厚度只有1.2纳米，摩尔定律开始面临来自物理与技术方面的双重挑战。As the core and foundation of the information industry, semiconductor technology is regarded as an important symbol to measure a country's scientific and technological progress and comprehensive national strength. In the past 40 years, the integrated circuit technology based on silicon CMOS technology has followed Moore's law to increase the working speed of the chip, increase the integration level and reduce the cost by reducing the feature size of the device. The feature size of the integrated circuit has evolved from the micron scale to nanoscale. However, when the gate length of MOS devices is reduced to 90 nanometers, the thickness of the gate oxide layer is only 1.2 nanometers, and Moore's Law begins to face challenges from both physics and technology.
金属-氧化物半导体场效应晶体管，简称金氧半场效晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)。学术界与产业界普遍认为：采用高迁移率沟道材料替代传统硅材料将是CMOS技术的重要发展方向，其中砷化镓沟道材料最有可能在近期实现大规模应用。砷化镓的电子迁移率比硅要高，砷化镓沟道CMOS器件已经成为解决硅基CMOS遇到的问题的有效途径。然而砷化镓基MOSFET亟需获得热稳定高、界面态密度小、等效氧化层厚度薄的高介电常数的栅介质材料，这已经成为当前研究的重点与难点。Metal-Oxide-Semiconductor Field-Effect Transistor, referred to as Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Academia and industry generally believe that replacing traditional silicon materials with high-mobility channel materials will be an important development direction of CMOS technology, and gallium arsenide channel materials are most likely to achieve large-scale applications in the near future. Gallium arsenide has a higher electron mobility than silicon, and gallium arsenide channel CMOS devices have become an effective way to solve the problems encountered by silicon-based CMOS. However, gallium arsenide-based MOSFETs urgently need to obtain high dielectric constant gate dielectric materials with high thermal stability, low interface state density, and thin equivalent oxide layer thickness, which has become the focus and difficulty of current research.
发明内容Contents of the invention
有鉴于此，本发明的目的是在砷化镓表面形成热稳定高、界面态密度小、等效氧化层厚度薄的栅介质，因此，本发明提供一种砷化镓基MOSFET栅介质的制备方法，以期解决前述前有技术中存在的至少部分技术问题。In view of this, the object of the present invention is to form a gate dielectric with high thermal stability, low interface state density and thin equivalent oxide layer thickness on the surface of gallium arsenide. Therefore, the present invention provides a preparation of a gallium arsenide-based MOSFET gate dielectric method, in order to solve at least some of the technical problems in the aforementioned prior art.
为实现上述目的，本发明提供一种砷化镓基MOSFET栅介质的制备方法，包括如下步骤：In order to achieve the above object, the present invention provides a method for preparing a gallium arsenide-based MOSFET gate dielectric, comprising the following steps:
步骤1：清洗砷化镓衬底表面；Step 1: cleaning the surface of the gallium arsenide substrate;
步骤2：在清洗完成后的所述砷化镓衬底表面沉积阻挡层；Step 2: depositing a barrier layer on the surface of the gallium arsenide substrate after cleaning;
步骤3：利用直接离化的氧等离子体或间接离化的氧等离子体处理步骤2获得的衬底表面，氧等离子扩散进入到所述阻挡层和砷化镓界面处，从而氧化砷化镓表面，在所述阻挡层与所述砷化镓衬底界面形成一薄层五氧化二砷和三氧化二镓的混合物层；Step 3: treating the surface of the substrate obtained in step 2 with directly ionized oxygen plasma or indirectly ionized oxygen plasma, and oxygen plasma diffuses into the interface between the barrier layer and gallium arsenide, thereby oxidizing the surface of gallium arsenide , forming a thin mixture layer of diarsenic pentoxide and digallium trioxide at the interface between the barrier layer and the gallium arsenide substrate;
步骤4：在氧等离子体氧化后的砷化镓衬底表面沉积高介电常数的栅氧化物层。Step 4: Depositing a high dielectric constant gate oxide layer on the surface of the gallium arsenide substrate after oxygen plasma oxidation.
进一步地，所述步骤1中，所述砷化镓衬底包括砷化镓片、绝缘体上砷化镓片、硅上外延砷化镓片或化合物半导体上外延砷化镓片，所述砷化镓衬底首先用丙酮和乙醇各清洗1-10分钟，然后用去离子水冲洗干净，接着采用氢氟酸和/或盐酸与去离子水混合后的混合溶液去除砷化镓衬底表面的自然氧化物层。Further, in the step 1, the gallium arsenide substrate includes a gallium arsenide sheet, a gallium arsenide on insulator sheet, an epitaxial gallium arsenide on silicon sheet or an epitaxial gallium arsenide on a compound semiconductor sheet, and the arsenide The gallium substrate is first cleaned with acetone and ethanol for 1-10 minutes each, and then rinsed with deionized water, and then the mixed solution of hydrofluoric acid and/or hydrochloric acid mixed with deionized water is used to remove the natural particles on the surface of the gallium arsenide substrate. oxide layer.
进一步地，所述步骤2中，采用原子层沉积、化学气相沉积、脉冲激光溅射或分子束外延的方法沉积的三氧化二镧作为阻挡层，所述三氧化二镧的厚度在3埃-10纳米之间。Further, in the step 2, the lanthanum trioxide deposited by atomic layer deposition, chemical vapor deposition, pulsed laser sputtering or molecular beam epitaxy is used as a barrier layer, and the thickness of the lanthanum trioxide is between 3 Angstroms- between 10 nanometers.
进一步地，所述步骤3中，所述直接离化的氧等离子体是由氧气、臭氧、二氧化碳、一氧化二氮中的一种或多种，或氧气、臭氧、二氧化碳、一氧化二氮中的一种或多种与氮气、氦气、氩气中的一种或多种混合后的气体，经过等离子体发生器离化形成的等离子体，所述等离子体发生器工作功率在0-200瓦每平方厘米之间。Further, in the step 3, the directly ionized oxygen plasma is one or more of oxygen, ozone, carbon dioxide, nitrous oxide, or oxygen, ozone, carbon dioxide, nitrous oxide One or more gases mixed with one or more of nitrogen, helium, and argon are ionized by a plasma generator to form plasma, and the working power of the plasma generator is 0-200 between watts per square centimeter.
进一步地，所述步骤3中，所述间接离化的氧等离子体是由氮气、氦气、氩气中的一种或多种经过等离子体发生器离化形成等离子体源，所述等离子体源再与氧气、臭氧、二氧化碳、一氧化二氮中的一种或多种混合气体混合使其离化，所述等离子体发生器工作功率在0-200瓦每平方厘米之间。Further, in the step 3, the indirect ionized oxygen plasma is ionized by one or more of nitrogen, helium, and argon through a plasma generator to form a plasma source, and the plasma The source is then mixed with one or more mixed gases of oxygen, ozone, carbon dioxide, and nitrous oxide to make it ionized. The working power of the plasma generator is between 0-200 watts per square centimeter.
进一步地，所述步骤3中，所述直接离化的氧等离子体或间接离化的氧等离子体处理步骤2获得的衬底表面的时间在1毫秒-1小时之间。Further, in the step 3, the direct ionized oxygen plasma or the indirect ionized oxygen plasma treats the surface of the substrate obtained in step 2 within 1 millisecond to 1 hour.
进一步地，所述步骤3中，所述直接离化的氧等离子体或间接离化的氧等离子体处理步骤2获得的衬底表面的温度在20摄氏度-500摄氏度之间。Further, in the step 3, the temperature of the substrate surface obtained in the direct ionized oxygen plasma or indirect ionized oxygen plasma treatment step 2 is between 20 degrees Celsius and 500 degrees Celsius.
进一步地，所述步骤4中，采用原子层沉积、化学气相沉积、脉冲激光溅射、分子束外延的方法沉积高介电常数的氧化物作为栅氧化物层，所述氧化物包括铝基、锆基、铪基、钆基、镓基、镧基、钽基氧化物，氧化物中的掺杂元素可以为铝、锆、铪、钆、镓、镧、钽、氮、磷，氧化物中掺杂元素的原子数量与总的金属元素的原子数量的比值＝x:(1-x)，x的取值范围可设置为0≤x<1，栅氧化物层的厚度在3埃－10纳米之间。Further, in step 4, an oxide with a high dielectric constant is deposited as a gate oxide layer by means of atomic layer deposition, chemical vapor deposition, pulsed laser sputtering, and molecular beam epitaxy, and the oxide includes aluminum-based, Zirconium-based, hafnium-based, gadolinium-based, gallium-based, lanthanum-based, tantalum-based oxides, the doping element in the oxide can be aluminum, zirconium, hafnium, gadolinium, gallium, lanthanum, tantalum, nitrogen, phosphorus, in the oxide The ratio of the number of atoms of the doping element to the number of atoms of the total metal elements = x:(1-x), the value range of x can be set to 0≤x<1, and the thickness of the gate oxide layer is between 3 angstroms-10 between nanometers.
本发明的优点和技术效果如下：Advantage of the present invention and technical effect are as follows:
采用具有高介电常数的三氧化二镧作为阻挡层材料，三氧化二镧的介电常数在20以上，阻挡层等效氧化层厚度很小；三氧化二镧和砷化镓界面比较稳定，不易形成互扩散层；氧等离子体在氧化砷化镓表面时由于有阻挡层，砷化镓表面不易形成等离子表面损伤；通过控制氧等离子体表面处理时间，可以控制五氧化二砷和三氧化二镓混合物层厚度，且砷化镓-五氧化二砷和三氧化二镓混合物界面热稳定性高、界面态密度低；最上层栅介质层沉积后，整个复合栅介质的等效氧化层厚度可以达到小于1纳米，从而提高砷化镓沟道MOSFET器件的电学特性。Using lanthanum trioxide with a high dielectric constant as the barrier layer material, the dielectric constant of lanthanum trioxide is above 20, and the equivalent oxide layer thickness of the barrier layer is very small; the interface between lanthanum trioxide and gallium arsenide is relatively stable, It is not easy to form an interdiffusion layer; when oxygen plasma oxidizes the surface of gallium arsenide, due to the barrier layer, the surface of gallium arsenide is not easy to form plasma surface damage; by controlling the surface treatment time of oxygen plasma, it is possible to control the Gallium mixture layer thickness, and gallium arsenide - diarsenic pentoxide and gallium trioxide mixture interface thermal stability is high, the interface state density is low; after the uppermost gate dielectric layer is deposited, the equivalent oxide layer thickness of the entire composite gate dielectric can be Reach less than 1 nanometer, thereby improving the electrical characteristics of GaAs channel MOSFET devices.
附图说明Description of drawings
图1为本发明技术方案中砷化镓基MOSFET栅介质的制备流程示意图；Fig. 1 is a schematic diagram of the preparation process of the GaAs-based MOSFET gate dielectric in the technical solution of the present invention;
图2为本发明技术方案中砷化镓衬底结构示意图；Fig. 2 is a schematic structural diagram of a gallium arsenide substrate in the technical solution of the present invention;
图3为本发明技术方案中沉积完三氧化二镧后的结构示意图；Fig. 3 is the structural representation after depositing dilanthanum trioxide in the technical scheme of the present invention;
图4为本发明技术方案中氧等离子体氧化形成一薄层五氧化二砷和三氧化二镓混合物层后的结构示意图；Fig. 4 is the schematic diagram of the structure after forming a thin layer of arsenic pentoxide and gallium trioxide mixture layer by oxygen plasma oxidation in the technical solution of the present invention;
图5为本发明技术方案中在阻挡层上沉积栅氧化物层后的结构示意图；Fig. 5 is a structural schematic diagram after depositing a gate oxide layer on the barrier layer in the technical solution of the present invention;
其中，in,
201为砷化镓衬底；202为砷化镓；203为五氧化二砷和三氧化二镓混合物层；204为栅氧化物层。201 is a gallium arsenide substrate; 202 is a gallium arsenide; 203 is a mixture layer of diarsenic pentoxide and digallium trioxide; 204 is a gate oxide layer.
具体实施方式detailed description
为使本发明的目的、内容和优点更加清楚，下面结合附图和实施例，对本发明的具体实施方式作进一步的详细描述。以下实施例仅用于更加清楚地说明本发明的技术方案，而不能以此来限制本发明的保护范围。In order to make the purpose, content and advantages of the present invention clearer, the specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and examples. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.
实施例1Example 1
本实施例具体描述本发明所提供的一种砷化镓基MOSFET栅介质的制备方法。This embodiment specifically describes a method for preparing a gallium arsenide-based MOSFET gate dielectric provided by the present invention.
如图1所示，其显示本实施例提供的砷化镓基MOSFET栅介质的制备方法的流程示意图，所述制备方法，包括如下步骤：As shown in Figure 1, it shows a schematic flow chart of the preparation method of the gallium arsenide-based MOSFET gate dielectric provided in this embodiment. The preparation method includes the following steps:
步骤101：如图1所示，开始，准备砷化镓衬底201，砷化镓衬底为砷化镓锗片；Step 101: As shown in FIG. 1, start by preparing a gallium arsenide substrate 201, the gallium arsenide substrate being a gallium germanium arsenide wafer;
步骤102：如图1和图2所示，采用丙酮和乙醇各清洗5分钟，然后用去离子水冲洗1分钟；接着采用盐酸：水体积比等于1:2的溶液清洗砷化镓衬底表面1分钟，并用去离子水冲洗1分钟，重复溶液清洗和去离子水冲洗三次，氮气吹干。Step 102: As shown in Figure 1 and Figure 2, wash with acetone and ethanol for 5 minutes each, and then rinse with deionized water for 1 minute; then use a solution of hydrochloric acid:water volume ratio equal to 1:2 to clean the surface of the gallium arsenide substrate 1 minute, and rinse with deionized water for 1 minute, repeat the solution washing and deionized water rinse three times, and blow dry with nitrogen.
步骤103：如图1和图3所示，利用原子层沉积的方法，在热生长模式下，三(2,2,6,6-四甲基-3,5-庚二酮酸)镧作为镧源，臭氧作为氧源，镧源加热到200摄氏度，反应腔体温度350摄氏度，在步骤102获得的砷化镓衬底表面沉积1纳米的三氧化二镧作为阻挡层202。Step 103: As shown in Figure 1 and Figure 3, using atomic layer deposition method, in thermal growth mode, tris(2,2,6,6-tetramethyl-3,5-heptanedionate) lanthanum as The lanthanum source, ozone as the oxygen source, the lanthanum source heated to 200 degrees Celsius, the temperature of the reaction chamber 350 degrees Celsius, and 1 nanometer of lanthanum trioxide deposited on the surface of the gallium arsenide substrate obtained in step 102 as the barrier layer 202 .
步骤104：如图1和图4所示，利用原子层沉积系统，在等离子生长模式下，氧气：氮气体积比等于1:1的混合气体，混合气体流量300立方厘米每分钟，经过等离子发生器形成氧等离子体，等离子发生器功率设为100瓦每平方厘米，反应腔温度设定为350摄氏度，用氧等离子体处理步骤103获得的衬底表面8秒，在阻挡层202与砷化镓衬底201界面形成0.5纳米左右厚度的五氧化二砷和三氧化二镓混合物层203。Step 104: As shown in Figure 1 and Figure 4, using the atomic layer deposition system, in the plasma growth mode, the mixed gas with the volume ratio of oxygen:nitrogen equal to 1:1, the flow rate of the mixed gas is 300 cubic centimeters per minute, and passes through the plasma generator Oxygen plasma is formed, the power of the plasma generator is set to 100 watts per square centimeter, the temperature of the reaction chamber is set to 350 degrees Celsius, and the surface of the substrate obtained in step 103 is treated with oxygen plasma for 8 seconds. A mixture layer 203 of diarsenic pentoxide and digallium trioxide with a thickness of about 0.5 nm is formed on the interface of the bottom 201 .
步骤105：如图1和图5所示，利用原子层沉积的方法，在热生长模式下，三(2,2,6,6-四甲基-3,5-庚二酮酸)镧作为镧源，臭氧作为氧源，镧源加热到200摄氏度，反应腔体温度350摄氏度，在步骤104获得的砷化镓衬底表面沉积2纳米的三氧化二镧作为栅氧化物层204。Step 105: As shown in Figure 1 and Figure 5, using atomic layer deposition method, in thermal growth mode, tris(2,2,6,6-tetramethyl-3,5-heptanedionate) lanthanum as The lanthanum source, ozone as the oxygen source, the lanthanum source heated to 200 degrees Celsius, the temperature of the reaction chamber 350 degrees Celsius, and 2 nanometers of lanthanum trioxide deposited on the surface of the gallium arsenide substrate obtained in step 104 as the gate oxide layer 204 .
通过上述各步骤制得的砷化镓衬底201表面复合栅介质由0.5纳米五氧化二砷和三氧化二镓混合物层203、1纳米三氧化二镧阻挡层202和2纳米三氧化二镧栅氧化物层204组成，等效氧化层厚度小于1纳米。The composite gate dielectric on the surface of the gallium arsenide substrate 201 prepared through the above steps is composed of a 0.5 nanometer arsenic pentoxide and gallium trioxide mixture layer 203, a 1 nanometer lanthanum trioxide barrier layer 202 and a 2 nanometer lanthanum trioxide gate The oxide layer 204 is composed of an equivalent oxide layer thickness less than 1 nanometer.
以上所述的具体实施例，对本发明的目的、技术方案和有益效果进行了进一步地详细说明，应理解的是，以上所述仅为本发明的具体实施例而已，并不用于限制本发明，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.
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