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CN107256886A - Groove-type Schottky diode and preparation method thereof - Google Patents

Groove-type Schottky diode and preparation method thereof Download PDF

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Publication number
CN107256886A
CN107256886A CN201710564660.6A CN201710564660A CN107256886A CN 107256886 A CN107256886 A CN 107256886A CN 201710564660 A CN201710564660 A CN 201710564660A CN 107256886 A CN107256886 A CN 107256886A
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groove
type
oxide layer
layer
schottky diode
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付妮娜
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/112Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/62Electrodes ohmically coupled to a semiconductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/01Manufacture or treatment
    • H10D8/051Manufacture or treatment of Schottky diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/60Schottky-barrier diodes 
    • H10D8/605Schottky-barrier diodes  of the trench conductor-insulator-semiconductor barrier type, e.g. trench MOS barrier Schottky rectifiers [TMBS]

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Abstract

本发明涉及一种沟槽式肖特基二极管及其制作方法。所述沟槽式肖特基二极管包括N型衬底、形成于所述N型衬底表面的N型外延层、形成于所述N型外延层中的多个沟槽、形成于每个沟槽内表面的氧化层、形成于所述沟槽中且设置于所述氧化层表面的多晶硅、形成于相邻的两个沟槽之间的N型外延层表面的P型注入区域、及形成于所述氧化层、所述多晶硅及所述P型注入区域上的金属层。

The invention relates to a trench Schottky diode and a manufacturing method thereof. The trench Schottky diode includes an N-type substrate, an N-type epitaxial layer formed on the surface of the N-type substrate, a plurality of grooves formed in the N-type epitaxial layer, and a plurality of grooves formed in each groove The oxide layer on the inner surface of the groove, the polysilicon formed in the groove and arranged on the surface of the oxide layer, the P-type implantation region formed on the surface of the N-type epitaxial layer between two adjacent grooves, and forming A metal layer on the oxide layer, the polysilicon and the P-type implanted region.

Description

沟槽式肖特基二极管及其制作方法Trench Schottky diode and manufacturing method thereof

【技术领域】【Technical field】

本发明涉及半导体器件制造技术领域,特别地,涉及一种沟槽式肖特基二极管及其制作方法。The invention relates to the technical field of semiconductor device manufacturing, in particular to a trench Schottky diode and a manufacturing method thereof.

【背景技术】【Background technique】

功率二极管是电路系统的关键部件,广泛适用于在高频逆变器、数码产品、发电机、电视机等民用产品和卫星接收装置、导弹及飞机等各种先进武器控制系统和仪器仪表设备的军用场合。功率二极管正向着两个重要方向拓展:(1)向几千万乃至上万安培发展,可应用于高温电弧风洞、电阻焊机等场合;(2)反向恢复时间越来越短,呈现向超快、超软、超耐用方向发展,使自身不仅用于整流场合,在各种开关电路中有着不同作用。为了满足低功耗、高频、高温、小型化等应用要求对其的耐压、导通电阻、开启压降、反向恢复特性、高温特性等越来越高。Power diodes are key components of circuit systems, and are widely used in high-frequency inverters, digital products, generators, televisions and other civilian products, as well as satellite receivers, missiles and aircraft and other advanced weapon control systems and instrumentation equipment. Military occasions. Power diodes are expanding in two important directions: (1) to tens of millions or even tens of thousands of amperes, which can be applied to high-temperature arc wind tunnels, resistance welding machines, etc.; (2) reverse recovery time is getting shorter and shorter, showing Developing in the direction of ultra-fast, ultra-soft, and ultra-durable, it is not only used in rectification occasions, but also has different functions in various switching circuits. In order to meet the application requirements of low power consumption, high frequency, high temperature, and miniaturization, its withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, high temperature characteristics, etc. are getting higher and higher.

通常应用的有普通整流二极管、肖特基二极管、PIN二极管。它们相互比较各有特点:肖特基整流管具有较低的通态压降,较大的漏电流,反向恢复时间几乎为零。而PIN快恢复整流管具有较快的反向恢复时间,但其通态压降很高。Commonly used rectifier diodes, Schottky diodes, and PIN diodes are commonly used. Compared with each other, they have their own characteristics: the Schottky rectifier has a lower on-state voltage drop, a larger leakage current, and the reverse recovery time is almost zero. The PIN fast recovery rectifier has a faster reverse recovery time, but its on-state voltage drop is very high.

沟槽式肖特基二极管,在该器件中,通过电场耗尽作用改变了电场强度分布,将电场强度的最大值从肖特基结位置转移到了硅的内部, 有效地抑制了反向偏压下出现的肖特基势垒降低效应,从而减小了肖特基结的反向漏电流;另一方面,沟槽式肖特基二极管还可以降低有源区中电场强度的最大值,从而实现二极管反向击穿电压的增加,因此,在保证维持同样击穿电压的前提下,可以使用比较高掺杂浓度的外延层,从而实现较低的正向导通电压。然而,如何提高沟槽式肖特基二极管的器件性能是一个重要的课题。Trench Schottky diode, in this device, the electric field intensity distribution is changed by the electric field depletion, and the maximum value of the electric field intensity is transferred from the Schottky junction position to the inside of the silicon, effectively suppressing the reverse bias The Schottky barrier lowering effect appears, thereby reducing the reverse leakage current of the Schottky junction; on the other hand, the trench Schottky diode can also reduce the maximum value of the electric field intensity in the active region, thereby To achieve an increase in the reverse breakdown voltage of the diode, therefore, under the premise of maintaining the same breakdown voltage, an epitaxial layer with a relatively high doping concentration can be used to achieve a lower forward conduction voltage. However, how to improve the device performance of trench Schottky diodes is an important issue.

【发明内容】【Content of invention】

本发明提出了沟槽式肖特基二极管及其制作方法,提高了器件性能。The invention proposes a trench Schottky diode and a manufacturing method thereof, which improves device performance.

一种沟槽式肖特基二极管,其包括N型衬底、形成于所述N型衬底表面的N型外延层、形成于所述N型外延层中的多个沟槽、形成于每个沟槽内表面的氧化层、形成于所述沟槽中且设置于所述氧化层表面的多晶硅、形成于相邻的两个沟槽之间的N型外延层表面的P型注入区域、形成于所述氧化层、及所述多晶硅及所述P型注入区域上的金属层。A trench type Schottky diode, which includes an N-type substrate, an N-type epitaxial layer formed on the surface of the N-type substrate, a plurality of grooves formed in the N-type epitaxial layer, and formed in each The oxide layer on the inner surface of the groove, the polysilicon formed in the groove and arranged on the surface of the oxide layer, the P-type implanted region formed on the surface of the N-type epitaxial layer between two adjacent grooves, A metal layer formed on the oxide layer, the polysilicon and the P-type implanted region.

在一种实施方式中,所述沟槽包括第一部分及位于所述第一部分上方的第二部分,所述第二部分的沟槽宽度大于所述第一部分的沟槽宽度,所述氧化层形成于所述第一部分沟槽的内表面及所述第二部分的沟槽中。In one embodiment, the trench includes a first part and a second part located above the first part, the trench width of the second part is greater than the trench width of the first part, and the oxide layer forms In the inner surface of the groove of the first part and the groove of the second part.

在一种实施方式中,所述多晶硅位于所述第一部分的沟槽中,所述金属层延伸至所述第二部分的沟槽中。In one embodiment, the polysilicon is located in the trench of the first portion, and the metal layer extends into the trench of the second portion.

在一种实施方式中,所述P型注入区连接相邻的两个沟槽的第二部分中的氧化层。In one embodiment, the P-type implantation region connects the oxide layers in the second parts of two adjacent trenches.

在一种实施方式中,所述P型注入区包括第一区域与第二区域,所述第二区域位于所述第一区域上方,所述第二区域连接所述相邻的两个沟槽的第二部分中的氧化层,所述第一区域位于所述相邻的两个沟槽的第一部分之间。In one embodiment, the P-type implant region includes a first region and a second region, the second region is located above the first region, and the second region connects the two adjacent trenches The oxide layer in the second portion of the first region is located between the first portions of the two adjacent trenches.

一种沟槽式肖特基二极管的制作方法,其包括如下步骤:A kind of manufacture method of trench Schottky diode, it comprises the steps:

提供N型衬底,在所述N型衬底表面形成N型外延层,在所述N 型外延层表面制备氧化层;An N-type substrate is provided, an N-type epitaxial layer is formed on the surface of the N-type substrate, and an oxide layer is prepared on the surface of the N-type epitaxial layer;

在所述第一氧化层表面形成第一光刻胶,并对所述第一光刻胶进行光刻,形成掩膜;forming a first photoresist on the surface of the first oxide layer, and performing photolithography on the first photoresist to form a mask;

利用所述第一光刻胶形成的掩膜对所述第一氧化层进行湿法刻蚀;performing wet etching on the first oxide layer using a mask formed by the first photoresist;

利用所述第一光刻胶及所述第一氧化层作为掩膜对所述N型外延层进行干法刻蚀形成位于所述N型外延层中的多个沟槽,去除第一光刻胶;Use the first photoresist and the first oxide layer as a mask to perform dry etching on the N-type epitaxial layer to form a plurality of grooves in the N-type epitaxial layer, and remove the first photoresist glue;

对所述N型外延层进行热氧化从而在所述多个沟槽表面形成第二氧化层;thermally oxidizing the N-type epitaxial layer to form a second oxide layer on the surface of the plurality of trenches;

在所述多个沟槽中且所述第二氧化层表面形成多晶硅,去除第一氧化层;forming polysilicon in the plurality of trenches and on the surface of the second oxide layer, and removing the first oxide layer;

在所述多个沟槽之间的N型外延层表面进行P型离子注入形成P 型注入区域;及Performing P-type ion implantation on the surface of the N-type epitaxial layer between the plurality of trenches to form a P-type implanted region; and

在所述P型注入区域、所述第二氧化层及所述多晶硅上形成金属层。A metal layer is formed on the P-type implanted region, the second oxide layer and the polysilicon.

在一种实施方式中,在所述多个沟槽中形成多晶硅,去除第一氧化层的步骤包括:In one embodiment, polysilicon is formed in the plurality of trenches, and the step of removing the first oxide layer includes:

在所述多个沟槽中及沟槽之间的N型外延层表面形成多晶硅层;及forming a polysilicon layer on the surface of the N-type epitaxial layer in and between the plurality of trenches; and

干法蚀刻所述沟槽之间的N型外延层表面的多晶硅层及所述第一氧化层从而去除所述沟槽之间的N型外延层表面的多晶硅层及所述第一氧化层并获得所述位于沟槽中的多晶硅。dry etching the polysilicon layer and the first oxide layer on the surface of the N-type epitaxial layer between the trenches to remove the polysilicon layer and the first oxide layer on the surface of the N-type epitaxial layer between the trenches and The polysilicon located in the trench is obtained.

在一种实施方式中,所述沟槽包括第一部分及位于所述第一部分上方的第二部分,所述第二部分的沟槽宽度大于所述第一部分的沟槽宽度,所述第二氧化层形成于所述第一部分沟槽的内表面及所述第二部分的沟槽中。In one embodiment, the groove includes a first portion and a second portion located above the first portion, the groove width of the second portion is larger than the groove width of the first portion, and the second oxide A layer is formed on the inner surface of the trenches of the first portion and in the trenches of the second portion.

在一种实施方式中,所述多晶硅位于所述第一部分的沟槽中,所述金属层延伸至所述第二部分的沟槽中,所述P型注入区连接相邻的两个沟槽的第二部分中的第二氧化层。In one embodiment, the polysilicon is located in the trench of the first part, the metal layer extends into the trench of the second part, and the P-type implantation region connects two adjacent trenches The second oxide layer in the second part.

在一种实施方式中,所述P型注入区包括第一区域与第二区域,所述第二区域位于所述第一区域上方,所述第二区域连接所述相邻的两个沟槽的第二部分中的第二氧化层,所述第一区域位于所述相邻的两个沟槽的第一部分之间。In one embodiment, the P-type implant region includes a first region and a second region, the second region is located above the first region, and the second region connects the two adjacent trenches The second oxide layer in the second portion of the first region is located between the first portions of the two adjacent trenches.

本发明沟槽式肖特基二极管在传统的沟槽式肖特基二极管结构基础上,在沟槽之间进行离子注入形成P型注入区域形成欧姆接触。与传统沟槽式肖特基二极管相比,在相同电压下本发明器件中的最大场强仍在器件的下部沟槽的底部边缘,但最大场强的值有降低,沟槽之间的欧姆接触受到P型注入区域保护提高耐压能力,所以器件的击穿电压增大。在器件未击穿之前漏电流出现在沟槽和欧姆接触位置,但本发明沟槽式肖特基二极管和传统沟槽式肖特基二极管相比,不同位置处的电场强度值都有所下降,所以可以有效地减弱肖特基势垒降低效应,从而实现更低的漏电流。On the basis of the structure of the traditional trench Schottky diode, the trench Schottky diode of the present invention performs ion implantation between the trenches to form a P-type implanted region to form an ohmic contact. Compared with the traditional trench type Schottky diode, the maximum field strength in the device of the present invention is still at the bottom edge of the lower trench of the device under the same voltage, but the value of the maximum field strength has decreased, and the ohm between the trenches The contact is protected by the P-type injection area to improve the withstand voltage capability, so the breakdown voltage of the device increases. Before the device breaks down, the leakage current appears in the trench and the ohmic contact position, but the trench Schottky diode of the present invention is compared with the traditional trench Schottky diode, and the electric field strength values at different positions are all decreased. Therefore, the Schottky barrier lowering effect can be effectively weakened, thereby achieving lower leakage current.

【附图说明】【Description of drawings】

为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它的附图,其中:In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For Those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort, wherein:

图1是本发明沟槽式肖特基二极管的结构示意图。FIG. 1 is a schematic structural diagram of a trench Schottky diode of the present invention.

图2是图1所示沟槽式肖特基二极管的制作方法的流程图。FIG. 2 is a flow chart of the manufacturing method of the trench Schottky diode shown in FIG. 1 .

图3-图10是图2所示制作方法的各步骤的结构示意图。3-10 are structural schematic diagrams of each step of the manufacturing method shown in FIG. 2 .

【主要元件符号说明】[Description of main component symbols]

沟槽式肖特基二极管100;N型衬底101;N型外延层102;沟槽 103;氧化层104、111;多晶硅105;P型注入区域106;金属层107;第一部分1031;第二部分1032;第一区域1061;第二区域1062步骤S1~S8Trench Schottky diode 100; N-type substrate 101; N-type epitaxial layer 102; trench 103; oxide layers 104, 111; polysilicon 105; Part 1032; first area 1061; second area 1062 steps S1-S8

【具体实施方式】【detailed description】

下面将对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

请参阅图1,图1是本发明沟槽式肖特基二极管100的结构示意图。所述沟槽式肖特基二极管100包括N型衬底101、形成于所述N 型衬底101表面的N型外延层102、形成于所述N型外延层102中的多个沟槽103、形成于每个沟槽103内表面的氧化层104、形成于所述沟槽103中且设置于所述氧化层104表面的多晶硅105、形成于相邻的两个沟槽103之间的N型外延层102表面的P型注入区域106、及形成于所述氧化层104、所述多晶硅105及所述P型注入区域106上的金属层107。Please refer to FIG. 1 . FIG. 1 is a schematic structural diagram of a trench Schottky diode 100 according to the present invention. The trench Schottky diode 100 includes an N-type substrate 101, an N-type epitaxial layer 102 formed on the surface of the N-type substrate 101, and a plurality of trenches 103 formed in the N-type epitaxial layer 102 , the oxide layer 104 formed on the inner surface of each trench 103, the polysilicon 105 formed in the trench 103 and disposed on the surface of the oxide layer 104, the N formed between two adjacent trenches 103 The P-type implanted region 106 on the surface of the epitaxial layer 102 , and the metal layer 107 formed on the oxide layer 104 , the polysilicon 105 and the P-type implanted region 106 .

所述沟槽103包括第一部分1031及位于所述第一部分1031上方的第二部分1032,所述第二部分1032的沟槽宽度大于所述第一部分 1031的沟槽宽度,所述氧化层104形成于所述第一部分1031沟槽的内表面及所述第二部分1032的沟槽中。The trench 103 includes a first portion 1031 and a second portion 1032 above the first portion 1031, the trench width of the second portion 1032 is greater than the trench width of the first portion 1031, and the oxide layer 104 is formed In the inner surface of the groove of the first part 1031 and the groove of the second part 1032 .

所述多晶硅105位于所述第一部分1031的沟槽中,所述金属层 107延伸至所述第二部分1032的沟槽中。The polysilicon 105 is located in the trench of the first portion 1031, and the metal layer 107 extends into the trench of the second portion 1032.

所述P型注入区106连接相邻的两个沟槽103的第二部分1032中的氧化层104。所述P型注入区106包括第一区域1061与第二区域 1062,所述第二区域1062位于所述第一区域1061上方,所述第二区域1062连接所述相邻的两个沟槽103的第二部分1032中的氧化层104,所述第一区域1061位于所述相邻的两个沟槽103的第一部分1031 之间。The P-type implantation region 106 connects the oxide layer 104 in the second portion 1032 of two adjacent trenches 103 . The P-type implant region 106 includes a first region 1061 and a second region 1062, the second region 1062 is located above the first region 1061, and the second region 1062 connects the two adjacent trenches 103 The oxide layer 104 in the second portion 1032 of the first region 1061 is located between the first portions 1031 of the two adjacent trenches 103 .

请参阅图2-图10,图2是图1所示沟槽式肖特基二极管100的制作方法的流程图,图3-图10是图2所示制作方法的各步骤的结构示意图。所述沟槽式肖特基二极管100的制作方法包括以下步骤S1~S8。Please refer to FIG. 2-FIG. 10. FIG. 2 is a flow chart of the manufacturing method of the trench Schottky diode 100 shown in FIG. 1, and FIG. The manufacturing method of the trench Schottky diode 100 includes the following steps S1-S8.

步骤S1,请参阅图3,提供N型衬底101,在所述N型衬底101 表面形成N型外延层102,在所述N型外延层102表面制备第一氧化层111。所述第一氧化层111为二氧化硅层。Step S1 , referring to FIG. 3 , provides an N-type substrate 101 , forms an N-type epitaxial layer 102 on the surface of the N-type substrate 101 , and prepares a first oxide layer 111 on the surface of the N-type epitaxial layer 102 . The first oxide layer 111 is a silicon dioxide layer.

步骤S2,请参阅图4,在所述第一氧化层111表面形成第一光刻胶,并对所述第一光刻胶进行光刻,形成掩膜。Step S2 , please refer to FIG. 4 , forming a first photoresist on the surface of the first oxide layer 111 , and performing photolithography on the first photoresist to form a mask.

步骤S3,请参阅图5,利用所述第一光刻胶形成的掩膜对所述第一氧化层111进行湿法刻蚀,从而在所述第一氧化层111中形成多个贯穿所述第一氧化层111的沟槽刻蚀窗口112。Step S3, please refer to FIG. 5 , use the mask formed by the first photoresist to perform wet etching on the first oxide layer 111, so as to form a plurality of A window 112 is etched into the trench of the first oxide layer 111 .

步骤S4,请参阅图6,利用所述第一光刻胶及所述第一氧化层111 作为掩膜对所述N型外延层102进行干法刻蚀形成位于所述N型外延层102中的多个沟槽103,去除第一光刻胶。Step S4, please refer to FIG. 6 , using the first photoresist and the first oxide layer 111 as a mask to perform dry etching on the N-type epitaxial layer 102 to form a layer located in the N-type epitaxial layer 102 a plurality of trenches 103, the first photoresist is removed.

步骤S5,请参阅图7,对所述N型外延层102进行热氧化从而在所述多个沟槽103表面形成第二氧化层(即所述氧化层104)。Step S5 , please refer to FIG. 7 , thermally oxidizes the N-type epitaxial layer 102 to form a second oxide layer (ie, the oxide layer 104 ) on the surface of the plurality of trenches 103 .

步骤S6,在所述多个沟槽103中且所述第二氧化层104表面形成多晶硅,去除第一氧化层111。具体地,请参阅图8及图9,所述步骤 S6包括:Step S6 , forming polysilicon in the plurality of trenches 103 and on the surface of the second oxide layer 104 , and removing the first oxide layer 111 . Specifically, referring to Fig. 8 and Fig. 9, described step S6 comprises:

在所述多个沟槽103中及沟槽103之间的N型外延层102表面形成多晶硅层;及Forming a polysilicon layer on the surface of the N-type epitaxial layer 102 in the plurality of trenches 103 and between the trenches 103; and

干法蚀刻所述沟槽103之间的N型外延层102表面的多晶硅层及所述第一氧化层111从而去除所述沟槽103之间的N型外延层102表面的多晶硅层及所述第一氧化层111并获得所述位于沟槽103中的多晶硅105。dry etching the polysilicon layer on the surface of the N-type epitaxial layer 102 between the trenches 103 and the first oxide layer 111 to remove the polysilicon layer on the surface of the N-type epitaxial layer 102 between the trenches 103 and the The first oxide layer 111 obtains the polysilicon 105 located in the trench 103 .

步骤S7,请参阅图10,在所述多个沟槽103之间的N型外延层 102表面进行P型离子注入形成P型注入区域106。Step S7, please refer to FIG. 10 , perform P-type ion implantation on the surface of the N-type epitaxial layer 102 between the plurality of trenches 103 to form a P-type implanted region 106 .

步骤S8,请参阅图1,在所述P型注入区域106、所述第二氧化层104及所述多晶硅105上形成金属层107。Step S8 , please refer to FIG. 1 , forming a metal layer 107 on the P-type implanted region 106 , the second oxide layer 104 and the polysilicon 105 .

本发明沟槽式肖特基二极管100在传统的沟槽式肖特基二极管结构基础上,在沟槽103之间进行离子注入形成P型注入区域106形成欧姆接触。与传统沟槽式肖特基二极管相比,在相同电压下本发明器件中的最大场强仍在器件的下部沟槽103的底部边缘,但最大场强的值有降低,沟槽103之间的欧姆接触受到P型注入区域106保护提高耐压能力,所以器件的击穿电压增大。在器件未击穿之前漏电流出现在沟槽103和欧姆接触位置,但本发明沟槽式肖特基二极管100和传统沟槽式肖特基二极管相比,不同位置处的电场强度值都有所下降,所以可以有效地减弱肖特基势垒降低效应,从而实现更低的漏电流。The trench Schottky diode 100 of the present invention is based on the traditional trench Schottky diode structure, and ion implantation is performed between the trenches 103 to form a P-type implanted region 106 to form an ohmic contact. Compared with the traditional trench Schottky diode, the maximum field strength in the device of the present invention is still at the bottom edge of the lower trench 103 of the device under the same voltage, but the value of the maximum field strength has been reduced, and between the trenches 103 The ohmic contact is protected by the P-type implant region 106 to improve the withstand voltage capability, so the breakdown voltage of the device increases. Before the device breaks down, the leakage current appears in the trench 103 and the ohmic contact position, but the trench Schottky diode 100 of the present invention is compared with the traditional trench Schottky diode, and the electric field intensity values at different positions are all different. Decrease, so the Schottky barrier lowering effect can be effectively weakened, thereby achieving lower leakage current.

以上所述的仅是本发明的实施方式,在此应当指出,对于本领域的普通技术人员来说,在不脱离本发明创造构思的前提下,还可以做出改进,但这些均属于本发明的保护范围。What has been described above is only the embodiment of the present invention. It should be pointed out that for those of ordinary skill in the art, improvements can be made without departing from the creative concept of the present invention, but these all belong to the present invention. scope of protection.

Claims (10)

1. a kind of groove-type Schottky diode, it is characterised in that:The groove-type Schottky diode includes N-type substrate, shape The N-type epitaxy layer on N-type substrate surface, the multiple grooves being formed in the N-type epitaxy layer described in Cheng Yu, it is formed at each groove The oxide layer of inner surface, be formed in the groove and be arranged at it is described oxidation layer surface polysilicon, be formed at adjacent two The p-type injection zone on the N-type epitaxy layer surface between individual groove and it is formed at the oxide layer, the polysilicon and the p-type Metal level on injection zone.
2. groove-type Schottky diode as claimed in claim 1, it is characterised in that:The groove includes Part I and position Part II above the Part I, the groove width of the Part II is more than the ditch groove width of the Part I Degree, the oxide layer is formed in the groove of the inner surface of the Part I groove and the Part II.
3. groove-type Schottky diode as claimed in claim 2, it is characterised in that:The polysilicon is located at described first In the groove divided, the metal level is extended in the groove of the Part II.
4. groove-type Schottky diode as claimed in claim 2, it is characterised in that:The p-type injection region connection is adjacent Oxide layer in the Part II of two grooves.
5. groove-type Schottky diode as claimed in claim 4, it is characterised in that:The p-type injection region includes the firstth area Domain and second area, the second area are located above the first area, described adjacent two of second area connection Oxide layer in the Part II of groove, the first area is located between the Part I of two adjacent grooves.
6. a kind of preparation method of groove-type Schottky diode, it comprises the following steps:
N-type substrate is provided, N-type epitaxy layer is formed on the N-type substrate surface, oxide layer is prepared on the N-type epitaxy layer surface;
In described first oxidation layer surface the first photoresist of formation, and photoetching is carried out to first photoresist, form mask;
Wet etching is carried out to first oxide layer using the mask of first photoresist formation;
Dry etching is carried out using first photoresist and first oxide layer to the N-type epitaxy layer as mask to be formed Multiple grooves in the N-type epitaxy layer, remove the first photoresist;
Thermal oxide is carried out to the N-type epitaxy layer so as in the multiple flute surfaces the second oxide layer of formation;
In the multiple groove and it is described second oxidation layer surface formation polysilicon, remove the first oxide layer;
N-type epitaxy layer surface between the multiple groove carries out p-type ion implanting formation p-type injection zone;And
Metal level is formed on the p-type injection zone, second oxide layer and the polysilicon.
7. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that:In the multiple groove Middle formation polysilicon, the step of removing the first oxide layer includes:
N-type epitaxy layer surface in the multiple groove and between groove forms polysilicon layer;And
The polysilicon layer on the N-type epitaxy layer surface between groove described in dry etching and first oxide layer are described so as to remove The polysilicon layer on the N-type epitaxy layer surface between groove and first oxide layer simultaneously obtain the polycrystalline being located in groove Silicon.
8. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that:The groove includes the A part and the Part II above the Part I, the groove width of the Part II are more than the Part I Groove width, second oxide layer is formed at the inner surface of the Part I groove and the groove of the Part II In.
9. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that:The polysilicon is located at In the groove of the Part I, the metal level is extended in the groove of the Part II, and the p-type injection region connects phase The second oxide layer in the Part II of two adjacent grooves.
10. the preparation method of groove-type Schottky diode as claimed in claim 6, it is characterised in that:The p-type injection region Including first area and second area, the second area is located above the first area, and the second area connection is described The second oxide layer in the Part II of two adjacent grooves, the first area is located at the of two adjacent grooves Between a part.
CN201710564660.6A 2017-07-12 2017-07-12 Groove-type Schottky diode and preparation method thereof Pending CN107256886A (en)

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