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CN107256883B - A kind of two-way TVS diode of two-way and preparation method thereof - Google Patents

A kind of two-way TVS diode of two-way and preparation method thereof Download PDF

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CN107256883B
CN107256883B CN201710315387.3A CN201710315387A CN107256883B CN 107256883 B CN107256883 B CN 107256883B CN 201710315387 A CN201710315387 A CN 201710315387A CN 107256883 B CN107256883 B CN 107256883B
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CN107256883A (en
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徐远
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Suzhou Silicon Semiconductor Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/114PN junction isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/01Manufacture or treatment

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Abstract

本发明公开了一种两路双向TVS二极管及其制作方法。包括:背电极、N+衬底、P‑外延层、位于P‑外延层中并列设置的两个P阱、位于P阱两侧的N型隔离区、位于每个P阱中的P型掺杂区、位于每个P型掺杂区中的N型掺杂区、位于P‑外延层表面的氧化层、氧化层中对应每个N型掺杂区的位置设有接触孔、两个正面电极通过各自的接触孔与对应的N型掺杂区电连接、位于正面电极以及氧化层上方的钝化层。两个TVS二极管分别由N型掺杂区域、P型掺杂区域,P阱及N+衬底构成,特有的NPN的结构,使TVS二极管具备了双向对称的功能。两个TVS之间由N型隔离区分开,且在器件的边缘也有N型隔离,这使得器件中两个二极管之前的漏电以及器件边缘的漏电降到最低。

The invention discloses a two-way bidirectional TVS diode and a manufacturing method thereof. Including: back electrode, N+ substrate, P-epitaxial layer, two P-wells arranged side by side in the P-epitaxial layer, N-type isolation regions on both sides of the P-well, P-type doping in each P-well region, an N-type doped region located in each P-type doped region, an oxide layer located on the surface of the P-epitaxial layer, a contact hole is provided in the oxide layer corresponding to each N-type doped region, and two front electrodes The passivation layer is electrically connected to the corresponding N-type doped region through respective contact holes, and is located on the front electrode and the oxide layer. The two TVS diodes are composed of N-type doped regions, P-type doped regions, P wells and N+ substrates. The unique NPN structure makes the TVS diodes bidirectionally symmetrical. The two TVSs are separated by an N-type isolation region, and there is also an N-type isolation at the edge of the device, which minimizes the leakage between the two diodes in the device and the leakage at the edge of the device.

Description

一种两路双向TVS二极管及其制作方法A kind of two-way bidirectional TVS diode and its manufacturing method

技术领域technical field

本发明涉及半导体技术领域,具体涉及一种两路双向TVS二极管及其制作方法。The invention relates to the technical field of semiconductors, in particular to a two-way bidirectional TVS diode and a manufacturing method thereof.

背景技术Background technique

随着半导体技术的发展,超深亚微米已经成为集成电路加工的主流工艺。但是在各种接口段总是会存在各种意想不到的浪涌和静电,为确保集成电路的可靠性,以TVS二极管为主的防护类器件被广泛地应用到敏感已产生浪涌的端口处。TVS二极管并联于被保护电路的前端。正常状态下,TVS呈高阻抗,理想状态上可以看做开路。当外界突然输入一瞬态高压,TVS立刻利用PN结的雪崩击穿效应,将阻抗降低,高压产生的浪涌被TVS二极管分流。同时TVS两端的电压被钳制到最大钳位电压以下。当浪涌消失后,TVS又恢复到先前的高阻抗状态。With the development of semiconductor technology, ultra-deep submicron has become the mainstream process of integrated circuit processing. However, there will always be various unexpected surges and static electricity in various interface segments. In order to ensure the reliability of integrated circuits, protective devices mainly based on TVS diodes are widely used in sensitive ports that have generated surges. . The TVS diode is connected in parallel to the front end of the protected circuit. Under normal conditions, TVS is high impedance, and ideally it can be regarded as an open circuit. When a transient high voltage is suddenly input from the outside, the TVS immediately uses the avalanche breakdown effect of the PN junction to reduce the impedance, and the surge generated by the high voltage is shunted by the TVS diode. At the same time, the voltage at both ends of the TVS is clamped below the maximum clamping voltage. When the surge disappears, the TVS returns to its previous high-impedance state.

TVS二极管应用非常广泛,手机、平板电脑、液晶显示器、摄像头、机顶盒,都有它的身影。传统应用上工程师会在易产生的浪涌的端口上都并联一个TVS二极管,这样一来如果I/O端口多的话,成本不谈,也占用了太多的PCB板上资源。TVS diodes are widely used in mobile phones, tablet computers, liquid crystal displays, cameras, and set-top boxes. In traditional applications, engineers will connect a TVS diode in parallel to the ports that are prone to surges. In this way, if there are many I/O ports, not to mention the cost, it also takes up too many resources on the PCB board.

发明内容Contents of the invention

本发明所要解决的技术问题是:如何提供一种两路双向TVS二极管及其制作方法,本发明利用集成理念设计的双路TVS二极管,一颗器件便可保护两路I/O接口。The technical problem to be solved by the present invention is: how to provide a two-way bidirectional TVS diode and its manufacturing method. The present invention utilizes the dual-way TVS diode designed with the integration concept, and one device can protect two-way I/O interfaces.

本发明通过以下技术方案得以实现:The present invention is achieved through the following technical solutions:

一种两路双向TVS二极管的制作方法,包括以下步骤:A method for manufacturing two-way bidirectional TVS diodes, comprising the following steps:

(1)提供N+衬底;(1) Provide N+ substrate;

(2)在所述N+衬底的正反两面分别依次生长二氧化硅层和氮化硅层;(2) growing a silicon dioxide layer and a silicon nitride layer sequentially on the front and back sides of the N+ substrate, respectively;

(3)去除所述N+衬底的正面的二氧化硅层和氮化硅层,保留所述N+衬底背面的二氧化硅层和氮化硅层作为背封层;(3) removing the silicon dioxide layer and silicon nitride layer on the front side of the N+ substrate, and retaining the silicon dioxide layer and silicon nitride layer on the back side of the N+ substrate as a back seal layer;

(4)在N+衬底的正面生长一P-外延层,然后湿法刻蚀去除所述N+衬底背面的二氧化硅层和氮化硅层;(4) growing a P- epitaxial layer on the front side of the N+ substrate, and then wet etching to remove the silicon dioxide layer and silicon nitride layer on the back side of the N+ substrate;

(5)利用掩膜在所述P-外延层中进行硼掺杂形成并列设置的两个P阱;(5) performing boron doping in the P- epitaxial layer using a mask to form two P wells arranged side by side;

(6)在所述P-外延层两侧边缘以及两个所述P阱之间通过磷掺杂形成N型隔离区;(6) N-type isolation regions are formed by phosphorus doping at the edges of both sides of the P- epitaxial layer and between the two P wells;

(7)在每个P阱中通过离子注入硼形成P型掺杂区;(7) Forming a P-type doped region by ion-implanting boron in each P-well;

(8)在每个P型掺杂区中通过离子注入磷形成N型掺杂区;(8) Forming an N-type doped region by ion-implanting phosphorus in each P-type doped region;

(9)在所述P-外延层上形成氧化层,在氧化层中对应每个N型掺杂区的位置形成接触孔,在每个接触孔内以及氧化层表面沉积形成正面电极;(9) forming an oxide layer on the P- epitaxial layer, forming a contact hole in the oxide layer corresponding to each N-type doped region, and depositing a front electrode in each contact hole and on the surface of the oxide layer;

(10)在正面电极表面形成钝化层,在钝化层中形成作为后端封装打线的孔;(10) Form a passivation layer on the surface of the front electrode, and form a hole in the passivation layer as a back-end packaging wiring;

(11)减薄所述N+衬底,然后在所述N+衬底的背面制备背面电极,以完成两路双向TVS二极管的制作。(11) Thinning the N+ substrate, and then preparing a back electrode on the back of the N+ substrate, so as to complete the fabrication of two-way bidirectional TVS diodes.

作为优选,所述步骤(1)中所述N+衬底为<111>晶向,掺As,电阻率为0.007Ohm.cm,厚度675微米。Preferably, the N+ substrate in the step (1) has a <111> crystal orientation, is doped with As, has a resistivity of 0.007 Ohm.cm, and a thickness of 675 microns.

作为优选,所述步骤(2)中,所述二氧化硅层的厚度为1-3微米,所述氮化硅层的厚度为1-3微米,所述步骤(3)中,首先利用等离子体刻蚀去除所述N+衬底的正面的氮化硅层,然后利用氢氟酸和氟化铵的混合试剂去除所述N+衬底的正面的二氧化硅层。Preferably, in the step (2), the silicon dioxide layer has a thickness of 1-3 microns, and the silicon nitride layer has a thickness of 1-3 microns. In the step (3), firstly, the plasma The silicon nitride layer on the front side of the N+ substrate is removed by bulk etching, and then the silicon dioxide layer on the front side of the N+ substrate is removed by using a mixed reagent of hydrofluoric acid and ammonium fluoride.

作为优选,所述步骤(4)中,所述P-外延层的厚度为3-6微米,所述P-外延层的电阻率为50-150 Ohm.cm,利用光刻胶保护所述P-外延层,湿法刻蚀的刻蚀液是氢氟酸。Preferably, in the step (4), the thickness of the P-epitaxial layer is 3-6 microns, the resistivity of the P-epitaxial layer is 50-150 Ohm.cm, and the P-epitaxial layer is protected by photoresist - the epitaxial layer, the etching solution for wet etching is hydrofluoric acid.

作为优选,所述步骤(5)的具体工艺为:生长700纳米的氧化层,然后涂胶、光刻、显影、腐蚀,在适当的区域开口,在开口内离子注入硼元素,注入剂量为4E14 /cm2,注入能量为70KeV。Preferably, the specific process of the step (5) is: grow a 700-nanometer oxide layer, then apply glue, photolithography, development, etch, open an opening in an appropriate area, and ion-implant boron in the opening, the implantation dose is 4E14 /cm 2 , the implantation energy is 70KeV.

作为优选,所述步骤(5)的具体工艺为:形成掩膜,然后涂胶、光刻、显影、腐蚀,在适当的区域开窗口,在窗口内离子注入硼元素,注入剂量为4E14 /cm2,注入能量为70KeV,所述步骤(6)的具体工艺为:形成掩膜,在适当的区域开窗口,然后将所述N+衬底放入1000℃的炉管,通入PoCL3气体进行掺杂,在P-外延中形成N型掺杂区,与N型衬底连接,形成了N型隔离区。Preferably, the specific process of the step (5) is: forming a mask, then applying glue, photolithography, developing, and etching, opening a window in an appropriate area, and ion-implanting boron in the window, with an implantation dose of 4E14 /cm 2. The implantation energy is 70KeV. The specific process of the step (6) is: forming a mask, opening a window in an appropriate area, and then putting the N+ substrate into a furnace tube at 1000°C, and injecting PoCL3 gas for doping impurity, form N-type doped region in P-epitaxy, and connect with N-type substrate to form N-type isolation region.

作为优选,所述步骤(7)的具体工艺为:形成掩膜,在所述P阱的适宜区域开窗口,并离子注入硼元素,注入剂量为4E14 /cm2,注入能量为160KeV,形成P型掺杂区;所述步骤(8)的具体工艺为:形成掩膜,在所述P型掺杂区的适宜区域开窗口,并离子注入磷元素,注入剂量为3E15 /cm2,注入能量为45KeV,形成N型掺杂区。Preferably, the specific process of the step (7) is: forming a mask, opening a window in a suitable area of the P well, and ion-implanting boron element with an implantation dose of 4E14/cm 2 and an implantation energy of 160KeV to form a P well. type doping region; the specific process of the step (8) is: forming a mask, opening a window in a suitable area of the P-type doping region, and ion-implanting phosphorus element, the implantation dose is 3E15 /cm 2 , and the implantation energy 45KeV, forming an N-type doped region.

作为优选,所述步骤(9)的具体工艺为:氧化层为二氧化硅层,氧化层的厚度为200-500纳米,正面电极为铝硅铜电极,正面电极的厚度为1-4微米。Preferably, the specific process of the step (9) is as follows: the oxide layer is a silicon dioxide layer, the thickness of the oxide layer is 200-500 nanometers, the front electrode is an aluminum-silicon-copper electrode, and the thickness of the front electrode is 1-4 microns.

作为优选,所述步骤(10)的具体工艺为:在正面电极表面淀积1-3微米厚的PSG(磷硅玻璃)和1-3微米厚的Si3N4来作为钝化层。Preferably, the specific process of the step (10) is: deposit 1-3 micron thick PSG (phosphosilicate glass) and 1-3 micron thick Si 3 N 4 on the surface of the front electrode as a passivation layer.

作为优选,所述步骤(11)的具体工艺为:所述N+衬底减薄到250微米,通过蒸发的工艺制作背金,形成背面电极。Preferably, the specific process of the step (11) is as follows: the N+ substrate is thinned to 250 microns, and the back gold is made by evaporation to form the back electrode.

所述背金可以是金属元素蒸发制成,优选采用金元素蒸发制成。The gold back can be made by evaporation of metal elements, preferably by evaporation of gold elements.

本发明还提出了一种两路双向TVS二极管,所述两路双向TVS二极管根据上述两路双向TVS二极管的制作方法所制备。The present invention also proposes a two-way bidirectional TVS diode, which is prepared according to the manufacturing method of the above-mentioned two-way bidirectional TVS diode.

本发明的两个TVS二极管分别由所在区域的N型掺杂区域、P型掺杂区域,P阱以及N+衬底而构成,特有的NPN的结构,使TVS二极管具备了双向对称的功能。两个TVS之间由N型隔离区分开,且在器件的边缘也有N型隔离,这使得器件中两个二极管之前的漏电以及器件边缘的漏电降到最低,本发明利用集成的思路将两个双向的TVS二极管集成在一颗芯片中,一个器件就可以保护两路I/O端口,大大节约了PCB板上占用的面积,节约了成本。The two TVS diodes of the present invention are respectively composed of an N-type doped region, a P-type doped region, a P well and an N+ substrate, and the unique NPN structure enables the TVS diode to have bidirectional symmetry. The two TVS are separated by an N-type isolation area, and there is also an N-type isolation at the edge of the device, which minimizes the leakage before the two diodes in the device and the leakage at the edge of the device. The present invention integrates the two The bidirectional TVS diode is integrated in one chip, and one device can protect two I/O ports, which greatly saves the area occupied by the PCB board and saves the cost.

附图说明Description of drawings

图1-11为本发明的两路双向TVS二极管的制作方法的流程图。。1-11 are flowcharts of the manufacturing method of the two-way bidirectional TVS diode of the present invention. .

具体实施方式Detailed ways

如图1-11所示,一种两路双向TVS二极管的制作方法,包括以下步骤:As shown in Figure 1-11, a method of manufacturing a two-way bidirectional TVS diode includes the following steps:

(1)提供N+衬底,如图1所示,所述N+衬底为<111>晶向,掺As,电阻率为0.007Ohm.cm,厚度675微米;(1) Provide an N+ substrate, as shown in Figure 1, the N+ substrate has a <111> crystal orientation, is doped with As, has a resistivity of 0.007Ohm.cm, and a thickness of 675 microns;

(2)在所述N+衬底的正反两面分别依次生长二氧化硅层和氮化硅层,如图2所示,所述二氧化硅层的厚度为1-3微米,所述氮化硅层的厚度为1-3微米;(2) A silicon dioxide layer and a silicon nitride layer are sequentially grown on both sides of the N+ substrate respectively, as shown in FIG. 2 , the thickness of the silicon dioxide layer is 1-3 microns, and the nitrided The thickness of the silicon layer is 1-3 microns;

(3)去除所述N+衬底的正面的二氧化硅层和氮化硅层,保留所述N+衬底背面的二氧化硅层和氮化硅层作为背封层,如图3所示,具体的,首先利用等离子体刻蚀去除所述N+衬底的正面的氮化硅层,然后利用氢氟酸和氟化铵的混合试剂去除所述N+衬底的正面的二氧化硅层;(3) removing the silicon dioxide layer and silicon nitride layer on the front side of the N+ substrate, and retaining the silicon dioxide layer and silicon nitride layer on the back side of the N+ substrate as the back seal layer, as shown in FIG. 3 , Specifically, firstly, the silicon nitride layer on the front side of the N+ substrate is removed by plasma etching, and then the silicon dioxide layer on the front side of the N+ substrate is removed by a mixed reagent of hydrofluoric acid and ammonium fluoride;

(4)在N+衬底的正面生长一P-外延层,然后湿法刻蚀去除所述N+衬底背面的二氧化硅层和氮化硅层,如图4所示,所述P-外延层的厚度为3-6微米,所述P-外延层的电阻率为50-150 Ohm.cm,利用光刻胶保护所述P-外延层,湿法刻蚀的刻蚀液是氢氟酸;(4) A P- epitaxial layer is grown on the front side of the N+ substrate, and then the silicon dioxide layer and the silicon nitride layer on the back side of the N+ substrate are removed by wet etching, as shown in FIG. 4 , the P- epitaxial layer The thickness of the layer is 3-6 microns, the resistivity of the P-epitaxial layer is 50-150 Ohm.cm, the P-epitaxial layer is protected by photoresist, and the etching solution for wet etching is hydrofluoric acid ;

(5)利用掩膜在所述P-外延层中进行硼掺杂形成并列设置的两个P阱,如图5所示,其具体工艺为:生长700纳米的氧化层,然后涂胶、光刻、显影、腐蚀,在适当的区域开口,在开口内离子注入硼元素,注入剂量为4E14 /cm2,注入能量为70KeV;(5) Use a mask to perform boron doping in the P- epitaxial layer to form two P wells arranged side by side, as shown in Figure 5, the specific process is: grow a 700 nm oxide layer, then apply glue, light Engraving, development, etching, openings in appropriate areas, ion-implanting boron elements in the openings, the implantation dose is 4E14 /cm 2 , and the implantation energy is 70KeV;

(6)在所述P-外延层两侧边缘以及两个所述P阱之间通过磷掺杂形成N型隔离区,如图6所示,其具体工艺为:形成掩膜,在适当的区域开窗口,然后将所述N+衬底放入1000℃的炉管,通入PoCL3气体进行掺杂,在P-外延中形成N型掺杂区,与N型衬底连接,形成了N型隔离区;(6) N-type isolation regions are formed by phosphorus doping at the edges of both sides of the P- epitaxial layer and between the two P wells, as shown in FIG. 6 , the specific process is: forming a mask, Open a window in the region, then put the N+ substrate into a furnace tube at 1000°C, inject PoCL3 gas for doping, form an N-type doped region in the P- epitaxy, and connect it to the N-type substrate to form an N-type quarantine area;

(7)在每个P阱中通过离子注入硼形成P型掺杂区,如图7所示,其具体工艺为:形成掩膜,在所述P阱的适宜区域开窗口,并离子注入硼元素,注入剂量为4E14 /cm2,注入能量为160KeV,形成P型掺杂区;(7) Form a P-type doped region by ion-implanting boron in each P-well, as shown in Figure 7, the specific process is: forming a mask, opening a window in a suitable area of the P-well, and ion-implanting boron element, the implantation dose is 4E14 /cm 2 , and the implantation energy is 160KeV to form a P-type doped region;

(8)在每个P型掺杂区中通过离子注入磷形成N型掺杂区,如图8所示,其具体工艺为:形成掩膜,在所述P型掺杂区的适宜区域开窗口,并离子注入磷元素,注入剂量为3E15 /cm2,注入能量为45KeV,形成N型掺杂区;(8) In each P-type doped region, an N-type doped region is formed by ion-implanting phosphorus, as shown in FIG. 8 , the specific process is: forming a mask, opening a window, and ion-implant phosphorus element, the implantation dose is 3E15 /cm 2 , and the implantation energy is 45KeV to form an N-type doped region;

(9)在所述P-外延层上形成氧化层,在氧化层中对应每个N型掺杂区的位置形成接触孔,在每个接触孔内以及氧化层表面沉积形成正面电极,如图9所示,其具体工艺为:氧化层为二氧化硅层,氧化层的厚度为200-500纳米,正面电极为铝硅铜电极,正面电极的厚度为1-4微米;(9) Form an oxide layer on the P-epitaxial layer, form a contact hole in the oxide layer corresponding to each N-type doped region, and deposit a front electrode in each contact hole and on the surface of the oxide layer, as shown in the figure As shown in 9, the specific process is: the oxide layer is a silicon dioxide layer, the thickness of the oxide layer is 200-500 nanometers, the front electrode is an aluminum-silicon-copper electrode, and the thickness of the front electrode is 1-4 microns;

(10)在正面电极表面形成钝化层,在钝化层中形成作为后端封装打线的孔,如图10所示,其具体工艺为:在正面电极表面淀积1-3微米厚的PSG(磷硅玻璃)和1-3微米厚的Si3N4来作为钝化层;(10) Form a passivation layer on the surface of the front electrode, and form a hole in the passivation layer as a back-end packaging wire, as shown in Figure 10. The specific process is: deposit 1-3 micron thick on the surface of the front electrode PSG (phosphosilicate glass) and 1-3 micron thick Si 3 N 4 as passivation layer;

(11)减薄所述N+衬底,然后在所述N+衬底的背面制备背面电极,如图11所示,其具体工艺为:所述N+衬底减薄到250微米,通过蒸发的工艺制作背金,形成背面电极,以完成两路双向TVS二极管的制作。(11) Thinning the N+ substrate, and then preparing a back electrode on the back of the N+ substrate, as shown in Figure 11, the specific process is: the N+ substrate is thinned to 250 microns, and the evaporation process Make the back gold and form the back electrode to complete the production of two bidirectional TVS diodes.

本发明还提出了一种两路双向TVS二极管,如图11所示,所述两路双向TVS二极管根据上述两路双向TVS二极管的制作方法所制备。The present invention also proposes a two-way bidirectional TVS diode, as shown in FIG. 11 , the two-way bidirectional TVS diode is prepared according to the manufacturing method of the above-mentioned two-way bidirectional TVS diode.

实施例1Example 1

如图1-11所示,一种两路双向TVS二极管的制作方法,包括以下步骤:As shown in Figure 1-11, a method of manufacturing a two-way bidirectional TVS diode includes the following steps:

(1)提供N+衬底,如图1所示,所述N+衬底为<111>晶向,掺As,电阻率为0.007Ohm.cm,厚度675微米;(1) Provide an N+ substrate, as shown in Figure 1, the N+ substrate has a <111> crystal orientation, is doped with As, has a resistivity of 0.007Ohm.cm, and a thickness of 675 microns;

(2)在所述N+衬底的正反两面分别依次生长二氧化硅层和氮化硅层,如图2所示,所述二氧化硅层的厚度为1微米,所述氮化硅层的厚度为1微米;(2) A silicon dioxide layer and a silicon nitride layer are sequentially grown on both sides of the N+ substrate respectively, as shown in FIG. 2 , the thickness of the silicon dioxide layer is 1 micron, and the silicon nitride layer is The thickness is 1 micron;

(3)去除所述N+衬底的正面的二氧化硅层和氮化硅层,保留所述N+衬底背面的二氧化硅层和氮化硅层作为背封层,如图3所示,具体的,首先利用等离子体刻蚀去除所述N+衬底的正面的氮化硅层,然后利用氢氟酸和氟化铵的混合试剂去除所述N+衬底的正面的二氧化硅层;(3) removing the silicon dioxide layer and silicon nitride layer on the front side of the N+ substrate, and retaining the silicon dioxide layer and silicon nitride layer on the back side of the N+ substrate as the back seal layer, as shown in FIG. 3 , Specifically, firstly, the silicon nitride layer on the front side of the N+ substrate is removed by plasma etching, and then the silicon dioxide layer on the front side of the N+ substrate is removed by a mixed reagent of hydrofluoric acid and ammonium fluoride;

(4)在N+衬底的正面生长一P-外延层,然后湿法刻蚀去除所述N+衬底背面的二氧化硅层和氮化硅层,如图4所示,所述P-外延层的厚度为6微米,所述P-外延层的电阻率为100 Ohm.cm,利用光刻胶保护所述P-外延层,湿法刻蚀的刻蚀液是氢氟酸,即用氢氟酸将背面的SiO2和 Si3N4全部漂去;(4) A P- epitaxial layer is grown on the front side of the N+ substrate, and then the silicon dioxide layer and the silicon nitride layer on the back side of the N+ substrate are removed by wet etching, as shown in FIG. 4 , the P- epitaxial layer The thickness of the layer is 6 microns, and the resistivity of the P-epitaxial layer is 100 Ohm.cm. The P-epitaxial layer is protected by photoresist, and the etching solution for wet etching is hydrofluoric acid, that is, hydrogen Fluoric acid will float all the SiO 2 and Si 3 N 4 on the back;

(5)利用掩膜在所述P-外延层中进行硼掺杂形成并列设置的两个P阱,如图5所示,其具体工艺为:生长700纳米的氧化层,然后涂胶、光刻、显影、腐蚀,在适当的区域开口,在开口内离子注入硼元素,注入剂量为4E14 /cm2,注入能量为70KeV;(5) Use a mask to perform boron doping in the P- epitaxial layer to form two P wells arranged side by side, as shown in Figure 5, the specific process is: grow a 700 nm oxide layer, then apply glue, light Engraving, development, etching, openings in appropriate areas, ion-implanting boron elements in the openings, the implantation dose is 4E14 /cm 2 , and the implantation energy is 70KeV;

(6)在所述P-外延层两侧边缘以及两个所述P阱之间通过磷掺杂形成N型隔离区,如图6所示,其具体工艺为:形成掩膜,在适当的区域开窗口,然后将所述N+衬底放入1000℃的炉管,通入PoCL3气体进行掺杂,在P-外延中形成N型掺杂区,与N型衬底连接,形成了N型隔离区;(6) N-type isolation regions are formed by phosphorus doping at the edges of both sides of the P- epitaxial layer and between the two P wells, as shown in FIG. 6 , the specific process is: forming a mask, Open a window in the region, then put the N+ substrate into a furnace tube at 1000°C, inject PoCL3 gas for doping, form an N-type doped region in the P- epitaxy, and connect it to the N-type substrate to form an N-type quarantine area;

(7)在每个P阱中通过离子注入硼形成P型掺杂区,如图7所示,其具体工艺为:形成掩膜,在所述P阱的适宜区域开窗口,并离子注入硼元素,注入剂量为4E14 /cm2,注入能量为160KeV,形成P型掺杂区;(7) Form a P-type doped region by ion-implanting boron in each P-well, as shown in Figure 7, the specific process is: forming a mask, opening a window in a suitable area of the P-well, and ion-implanting boron element, the implantation dose is 4E14 /cm 2 , and the implantation energy is 160KeV to form a P-type doped region;

(8)在每个P型掺杂区中通过离子注入磷形成N型掺杂区,如图8所示,其具体工艺为:形成掩膜,在所述P型掺杂区的适宜区域开窗口,并离子注入磷元素,注入剂量为3E15 /cm2,注入能量为45KeV,形成N型掺杂区;(8) In each P-type doped region, an N-type doped region is formed by ion-implanting phosphorus, as shown in FIG. 8 , the specific process is: forming a mask, opening a window, and ion-implant phosphorus element, the implantation dose is 3E15 /cm 2 , and the implantation energy is 45KeV to form an N-type doped region;

(9)在所述P-外延层上形成氧化层,在氧化层中对应每个N型掺杂区的位置形成接触孔,在每个接触孔内以及氧化层表面沉积形成正面电极,如图9所示,其具体工艺为:氧化层为二氧化硅层,氧化层的厚度为300纳米,正面电极为铝硅铜电极,正面电极的厚度为2微米;(9) Form an oxide layer on the P-epitaxial layer, form a contact hole in the oxide layer corresponding to each N-type doped region, and deposit a front electrode in each contact hole and on the surface of the oxide layer, as shown in the figure As shown in 9, the specific process is: the oxide layer is a silicon dioxide layer, the thickness of the oxide layer is 300 nanometers, the front electrode is an aluminum silicon copper electrode, and the thickness of the front electrode is 2 microns;

(10)在正面电极表面形成钝化层,在钝化层中形成作为后端封装打线的孔,如图10所示,其具体工艺为:在正面电极表面淀积1微米厚的PSG(磷硅玻璃)和1微米厚的Si3N4来作为钝化层;(10) Form a passivation layer on the surface of the front electrode, and form a hole in the passivation layer as a back-end packaging wiring, as shown in Figure 10. The specific process is: deposit 1 micron thick PSG on the surface of the front electrode ( Phosphosilicate glass) and 1 micron thick Si 3 N 4 as a passivation layer;

(11)减薄所述N+衬底,然后在所述N+衬底的背面制备背面电极,如图11所示,其具体工艺为:所述N+衬底减薄到250微米,通过蒸发的工艺制作背金,形成背面电极,以完成两路双向TVS二极管的制作。(11) Thinning the N+ substrate, and then preparing a back electrode on the back of the N+ substrate, as shown in Figure 11, the specific process is: the N+ substrate is thinned to 250 microns, and the evaporation process Make the back gold and form the back electrode to complete the production of two bidirectional TVS diodes.

本发明还提出了一种两路双向TVS二极管,如图11所示,所述两路双向TVS二极管根据上述两路双向TVS二极管的制作方法所制备。The present invention also proposes a two-way bidirectional TVS diode, as shown in FIG. 11 , the two-way bidirectional TVS diode is prepared according to the manufacturing method of the above-mentioned two-way bidirectional TVS diode.

以上所述是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也视为本发明的保护范围。The above description is a preferred embodiment of the present invention, and it should be pointed out that for those skilled in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications are also considered Be the protection scope of the present invention.

Claims (8)

1. a kind of production method of the two-way TVS diode of two-way, which comprises the following steps:
(1) N+ substrate is provided;
(2) silicon dioxide layer and silicon nitride layer are successively grown respectively in the tow sides of the N+ substrate;
(3) the positive silicon dioxide layer and silicon nitride layer for removing the N+ substrate, retain the titanium dioxide of the N+ substrate back Silicon layer and silicon nitride layer are as back sealing;
(4) in the one P- epitaxial layer of front growth of N+ substrate, then wet etching removes the silica of the N+ substrate back Layer and silicon nitride layer;
(5) it carries out boron doping in the P-epitaxial layer using exposure mask and forms two p-wells being set side by side;The step (5) Specifically comprises the processes of: the oxide layer of 700 nanometers of growth, then gluing, photoetching, development, corrosion are being opened in region openings appropriate Ion implanting boron element in mouthful, implantation dosage 4E14/cm2, Implantation Energy 70KeV;
(6) N-type isolated area is formed by phosphorus doping between P- epitaxial layer both sides of the edge and described two p-wells;
(7) P-doped zone is formed by boron ion implantation in each p-well;
(8) N-doped zone is formed by ion implanting phosphorus in each P-doped zone, the junction depth of N-doped zone is mixed less than p-type Miscellaneous area, thus to obtain the structure for the NPN being made of n-type doping region, P-doped zone domain, p-well and N+ substrate;Wherein, p-well It is deep into N+ substrate interior;
(9) oxide layer is formed on the P- epitaxial layer, the position that each N-doped zone is corresponded in oxide layer forms contact Hole, in each contact hole and oxidation layer surface deposits to form front electrode;
(10) passivation layer is formed on front electrode surface, forms the hole as rear end packaging and routing in the passivation layer;
(11) the N+ substrate is thinned, then rear electrode is prepared at the back side of the N+ substrate, to complete the two-way TVS bis- of two-way The production of pole pipe.
2. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (1) In, the N+ substrate is<111>crystal orientation, mix As, resistivity 0.007Ohm.cm, 675 microns of thickness.
3. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (2) In, the silicon dioxide layer with a thickness of 1-3 microns, the silicon nitride layer with a thickness of 1-3 microns, it is first in the step (3) The positive silicon nitride layer of the N+ substrate is removed first with plasma etching, then utilizes the mixing of hydrofluoric acid and ammonium fluoride Reagent removes the positive silicon dioxide layer of the N+ substrate.
4. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (4) In, the P- epitaxial layer with a thickness of 3-6 microns, the resistivity of the P- epitaxial layer is 50-150Ohm.cm, utilizes photoresist The P- epitaxial layer is protected, the etching liquid of wet etching is hydrofluoric acid.
5. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (6) Specifically comprises the processes of: it forms exposure mask and then the N+ substrate is put into 1000 DEG C of boiler tube, be passed through in region windowing appropriate PoCl3Gas is doped, and Yanzhong forms N-doped zone outside P-, is connect with N+ substrate, is formd N-type isolated area.
6. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (7) Specifically comprises the processes of: exposure mask is formed, in the Production Zones Suitable windowing of the p-well, and ion implanting boron element, implantation dosage are 4E14/cm2, Implantation Energy 160KeV, formation P-doped zone;The step (8) specifically comprises the processes of: exposure mask is formed, in institute State the Production Zones Suitable windowing of P-doped zone, and ion implanting P elements, implantation dosage 3E15/cm2, Implantation Energy is 45KeV forms N-doped zone.
7. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (9) Specifically comprises the processes of: oxide layer is silicon dioxide layer, oxide layer with a thickness of 200-500 nanometers, front electrode is aluminium copper silicon electrode, Front electrode with a thickness of 1-4 microns.
8. the production method of the two-way TVS diode of two-way according to claim 1, which is characterized in that the step (10) Specifically comprises the processes of: in front electrode surface deposition 1-3 microns of thick PSG and 1-3 microns of thick Si3N4As passivation layer, institute State step (11) specifically comprises the processes of: the N+ substrate thinning, by the technique production back gold of evaporation, forms back to 250 microns Face electrode.
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