CN107482908A - A Main Board Input Circuit for Preventing PCB Main Board from Fire - Google Patents
A Main Board Input Circuit for Preventing PCB Main Board from Fire Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/009—Converters characterised by their input or output configuration having two or more independently controlled outputs
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Abstract
本发明涉及服务器技术领域,提供一种防止PCB主板着火的主板输入电路,包括保险丝电路和电压转换电路;电压转换电路包括主控芯片,主控芯片的输入端与保险丝电路的输出端连接,主控芯片的12V输出端设有第一路电压转换线路、第二路电压转换线路和第三路电压转换线路,第一路电压转换线路上设有12V电压转换芯片;第二路电压转换线路上设有5V电压转换芯片;所述第一路电压转换线路上设有3.3V电压转换芯片,从而实现对PCB板的保护,有效防止因为短路等原因造成PCB元器件损坏带来的着火问题,提升了服务器的品质。
The invention relates to the technical field of servers, and provides a motherboard input circuit for preventing PCB motherboards from catching fire, including a fuse circuit and a voltage conversion circuit; the voltage conversion circuit includes a main control chip, the input end of the main control chip is connected to the output end of the fuse circuit, and the main control chip The 12V output end of the control chip is provided with the first road voltage conversion circuit, the second road voltage conversion circuit and the third road voltage conversion circuit, the first road voltage conversion circuit is provided with a 12V voltage conversion chip; There is a 5V voltage conversion chip; the first voltage conversion circuit is equipped with a 3.3V voltage conversion chip, so as to realize the protection of the PCB board, effectively prevent the fire problem caused by the damage of the PCB components due to short circuit and other reasons, and improve the quality of the server.
Description
技术领域technical field
本发明属于服务器技术领域,尤其涉及一种防止PCB主板着火的主板输入电路。The invention belongs to the technical field of servers, and in particular relates to a mainboard input circuit for preventing a PCB mainboard from catching fire.
背景技术Background technique
伴随网络应用的发展,信息化逐渐覆盖到社会的各个领域。人们的日常工作生活越来越多的通过网络来进行交流,希望服务器工作稳定的要求也在不断增加。当服务器工作出现异常时,尽快排查出故障,完成快速修复,使其恢复正常工作成为了客户最为重视的维护环节。在通用服务器进行安装、维护时,会有拆卸服务器主板动作,该动作如果操作不慎有可能会将主板上的电容、芯片、MOS等主要的电子元器件撞坏,撞坏的器件初期表现为有几百欧姆阻抗,有可能不会出现上电立即烧毁的情况,但时间一长,内部损坏严重就会变成短路。With the development of network applications, informatization has gradually covered all areas of society. People's daily work and life are more and more communicated through the network, and the requirements for stable server work are also increasing. When the server works abnormally, it is the most important maintenance link for customers to find out the fault as soon as possible, complete the quick repair, and make it return to normal work. When installing and maintaining a general-purpose server, there will be an action to disassemble the main board of the server. If the operation is not careful, it may damage the main electronic components such as capacitors, chips, and MOS on the main board. There is an impedance of several hundred ohms, and it may not burn out immediately after power-on, but after a long time, if the internal damage is serious, it will become a short circuit.
针对主板烧毁问题,通常采用对PCB板进行切片分析,对烧毁电子元器件进行X-ray分析,追溯生产过程中的测试数据分析,这三个分析方向展开进行,但因最初的短路点已被烧毁,无法有利的证明出着火点和着火原因,只能通过经验判断去推论一个最大可能性,最重要的是由于故障已经发生,对客户使用造成了严重的影响,没有从源头杜绝这种故障的发生,降低风险。Aiming at the problem of motherboard burnout, it is usually used to slice and analyze the PCB board, conduct X-ray analysis on the burnt electronic components, and trace the test data analysis during the production process. These three analysis directions are carried out, but because the initial short-circuit point has been Burned out, it is impossible to prove the ignition point and the cause of the fire. We can only infer a maximum possibility based on experience and judgment. The most important thing is that the failure has already occurred, which has seriously affected the use of customers. There is no way to eliminate this failure from the source. happen, reduce the risk.
发明内容Contents of the invention
本发明的目的在于提供一种防止PCB主板着火的主板输入电路,旨在解决现有技术中故障已经发生,对客户使用造成了严重的影响,没有从源头杜绝这种故障的发生,降低风险的问题。The purpose of the present invention is to provide a motherboard input circuit that prevents the PCB motherboard from igniting, aiming at solving the problem that a fault has occurred in the prior art, which has seriously affected the use of customers, and there is no way to prevent the occurrence of such a fault from the source and reduce the risk. question.
本发明是这样实现的,一种防止PCB主板着火的主板输入电路,所述防止PCB主板着火的主板输入电路包括保险丝电路和电压转换电路;The present invention is achieved in this way, a main board input circuit for preventing the PCB main board from igniting, the main board input circuit for preventing the PCB main board from catching fire includes a fuse circuit and a voltage conversion circuit;
所述保险丝电路的输入端与12V的供电电源的输出端连接,输出端与所述电压转换电路的输入端连接;The input end of the fuse circuit is connected to the output end of the 12V power supply, and the output end is connected to the input end of the voltage conversion circuit;
所述电压转换电路包括主控芯片,所述主控芯片的输入端与所述保险丝电路的输出端连接,所述主控芯片的12V输出端设有第一路电压转换线路、第二路电压转换线路和第三路电压转换线路,其中:The voltage conversion circuit includes a main control chip, the input end of the main control chip is connected to the output end of the fuse circuit, and the 12V output end of the main control chip is provided with a first voltage conversion circuit and a second voltage conversion circuit. Conversion circuit and the third road voltage conversion circuit, wherein:
所述第一路电压转换线路上设有12V电压转换芯片,所述12V电压转换芯片输出端的电压为12V;The first voltage conversion circuit is provided with a 12V voltage conversion chip, and the voltage at the output terminal of the 12V voltage conversion chip is 12V;
所述第二路电压转换线路上设有5V电压转换芯片,所述5V电压转换芯片输出端的电压为5V;A 5V voltage conversion chip is provided on the second voltage conversion circuit, and the voltage at the output terminal of the 5V voltage conversion chip is 5V;
所述第一路电压转换线路上设有3.3V电压转换芯片,所述3.3V电压转换芯片输出端的电压为3.3V。A 3.3V voltage conversion chip is provided on the first voltage conversion circuit, and the voltage at the output terminal of the 3.3V voltage conversion chip is 3.3V.
作为一种改进的方案,所述保险丝电路包括并联连接的第一保险丝和第二保险丝。As an improved solution, the fuse circuit includes a first fuse and a second fuse connected in parallel.
作为一种改进的方案,所述主控芯片设有引脚GND1、管脚OV、管脚UV、管脚VCC、管脚MO+、管脚HS+、管脚HS-、管脚MO-、管脚TEMP、管脚GATE、管脚PGND、管脚GND、管脚PWGIN、管脚VOUT、管脚CSOUT、管脚PWRGD和管脚RETRY_L。As an improved solution, the main control chip is provided with pins GND1, pin OV, pin UV, pin VCC, pin MO+, pin HS+, pin HS-, pin MO-, pin TEMP, pin GATE, pin PGND, pin GND, pin PWGIN, pin VOUT, pin CSOUT, pin PWRGD, and pin RETRY_L.
作为一种改进的方案,所述管脚OV引出的线路串接电阻R1后连接至P12V_STBY端,所述管脚OV与所述电阻R1之间设有第一电流节点,所述第一电流节点引出的线路串接电阻R2后接地,所述电阻R2与接地端之间设有第二电流节点,所述第一电流节点与所述第二电流节点之间设有与所述电阻R2并联的电容C1;As an improved solution, the line drawn from the pin OV is connected to the P12V_STBY terminal after being connected in series with a resistor R1, and a first current node is provided between the pin OV and the resistor R1, and the first current node The lead-out line is connected in series with a resistor R2 and then grounded, a second current node is provided between the resistor R2 and the ground terminal, and a resistor connected in parallel with the resistor R2 is provided between the first current node and the second current node. capacitor C1;
所述管脚UV引出的线路串接电阻R3后连接至所述P12V_STBY端,所述管脚UV与所述电阻R2之间设有第三电流节点,所述第三电流节点引出的线路串接电阻R4后接地,所述电阻R4与接地端之间设有第四电流节点,所述第四电流节点与所述第三电流节点之间设有与所述电阻R4并联的电容C2;The line drawn from the pin UV is connected to the P12V_STBY terminal after being connected in series with a resistor R3, a third current node is provided between the pin UV and the resistor R2, and the line drawn from the third current node is connected in series The resistor R4 is then grounded, a fourth current node is provided between the resistor R4 and the ground terminal, and a capacitor C2 connected in parallel with the resistor R4 is provided between the fourth current node and the third current node;
所述管脚VCC引出的线路串接电阻R5后连接至所述P12V_STBY端,所述管脚VCC与所述电阻R5之间设有第五电流节点,所述第五电流节点引出的线路连接电容C3后接地;The line drawn from the pin VCC is connected to the P12V_STBY terminal after being connected in series with a resistor R5, a fifth current node is provided between the pin VCC and the resistor R5, and the line drawn from the fifth current node is connected to a capacitor Ground after C3;
所述P12V_STBY端的前端连接所述保险丝电路。The front end of the P12V_STBY terminal is connected to the fuse circuit.
作为一种改进的方案,所述P12V_STBY端与所述电阻R5之间设有第六电流节点,所述第六电流节点引出的线路包括三路,三路输出线路分别串接电阻R6、电阻R7和电阻R8,三鹿输出线路分别串接电阻R6、电阻R7和电阻R8之后汇集到第七电流节点;As an improved solution, a sixth current node is provided between the P12V_STBY terminal and the resistor R5, and the lines drawn from the sixth current node include three lines, and the three output lines are respectively connected in series with a resistor R6 and a resistor R7 and resistor R8, the Sanlu output line is respectively connected in series with resistor R6, resistor R7 and resistor R8 and then collected to the seventh current node;
所述第六电流节点与所述电阻R6之间设有第八电流节点,所述第八电流节点引出的线路依次串接电阻R9和电阻R10后,与所述管脚M0+连接,所述电阻R9与所述电阻R10之间设有第十一电流节点,所述第十一电流节点引出的线路连接至所述管脚HS+;An eighth current node is provided between the sixth current node and the resistor R6, and the line drawn from the eighth current node is connected in series with the resistor R9 and the resistor R10 in sequence, and connected to the pin M0+. The resistor An eleventh current node is provided between R9 and the resistor R10, and a line drawn from the eleventh current node is connected to the pin HS+;
所述第六电流节点与所述电阻R7之间设有第九电流节点,所述第九电流节点引出的线路串接电阻R11后与所述电阻R10串接;A ninth current node is provided between the sixth current node and the resistor R7, and the line drawn from the ninth current node is connected in series with the resistor R11 and then connected in series with the resistor R10;
所述第六电流节点与所述电阻R8之间设有第十电流节点,所述第十电流节点引出的线路串接电阻R12后与所述电阻R10串接;A tenth current node is provided between the sixth current node and the resistor R8, and the line drawn from the tenth current node is connected in series with the resistor R12 and then connected in series with the resistor R10;
所述第七电流节点与所述电阻R6之间设有第十二电流节点,所述第十二电流节点引出的线路依次串接电阻R13和电阻R114后,与所述管脚M0-连接,所述电阻R13与所述电阻R14之间设有第十三电流节点,所述第十三电流节点引出的线路连接至所述管脚HS-;A twelfth current node is provided between the seventh current node and the resistor R6, and the line drawn from the twelfth current node is connected in series with a resistor R13 and a resistor R114 in sequence, and is connected to the pin M0-, A thirteenth current node is provided between the resistor R13 and the resistor R14, and a line drawn from the thirteenth current node is connected to the pin HS-;
所述第七电流节点与所述电阻R7之间设有第十四电流节点,所述第十四电流节点引出的线路串接电阻R15后与所述电阻R14串接;A fourteenth current node is provided between the seventh current node and the resistor R7, and the line drawn from the fourteenth current node is connected in series with the resistor R15 and then connected in series with the resistor R14;
所述第七电流节点与所述电阻R8之间设有第十五电流节点,所述第十五电流节点引出的线路串接电阻R16后与所述电阻R14串接。A fifteenth current node is provided between the seventh current node and the resistor R8, and the line leading out from the fifteenth current node is connected in series with the resistor R16 and then connected in series with the resistor R14.
作为一种改进的方案,所述第七电流节点引出的线路设有并联连接的第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路,所述第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路汇集至第十六节点;As an improved solution, the line drawn from the seventh current node is provided with a first field effect tube circuit, a second field effect tube circuit, a third field effect tube circuit and a fourth field effect tube circuit connected in parallel, so The first field effect tube circuit, the second field effect tube circuit, the third field effect tube circuit and the fourth field effect tube circuit are collected to the sixteenth node;
所述第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路上分别串接场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的漏极D分别与所述第七电流节点连接,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的栅极G分别与所述管脚GATE连接,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的源极S分别与所述12V输出端连接。The first field effect tube circuit, the second field effect tube circuit, the third field effect tube circuit and the fourth field effect tube circuit are connected in series with field effect tube Q1, field effect tube Q2, field effect tube Q3 and field effect tube circuit respectively. Tube Q4, the drains D of the field effect transistor Q1, field effect transistor Q2, field effect transistor Q3, and field effect transistor Q4 are respectively connected to the seventh current node, and the field effect transistor Q1, field effect transistor Q2, The gates G of the field effect transistor Q3 and the field effect transistor Q4 are respectively connected to the pin GATE, and the sources S of the field effect transistor Q1, the field effect transistor Q2, the field effect transistor Q3 and the field effect transistor Q4 are respectively connected to the pins GATE. connected to the 12V output.
作为一种改进的方案,所述管脚GATE与所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的栅极G之间的线路上设有第十七电流节点,所述第十七电流节点引出的线路连接至所述12V输出端。As an improved solution, a seventeenth current node is provided on the line between the pin GATE and the gate G of the field effect transistor Q1, the field effect transistor Q2, the field effect transistor Q3 and the field effect transistor Q4 , the line drawn from the seventeenth current node is connected to the 12V output terminal.
作为一种改进的方案,所述第十六电流节点与所述12V输出端之间设有滤波电路。As an improved solution, a filter circuit is provided between the sixteenth current node and the 12V output terminal.
作为一种改进的方案,所述滤波电路包括并联的若干个电容。As an improved solution, the filtering circuit includes several capacitors connected in parallel.
在本发明实施例中,防止PCB主板着火的主板输入电路包括保险丝电路和电压转换电路;电压转换电路包括主控芯片,主控芯片的输入端与保险丝电路的输出端连接,主控芯片的12V输出端设有第一路电压转换线路、第二路电压转换线路和第三路电压转换线路,第一路电压转换线路上设有12V电压转换芯片;第二路电压转换线路上设有5V电压转换芯片;所述第一路电压转换线路上设有3.3V电压转换芯片,从而实现对PCB板的保护,有效防止因为短路等原因造成PCB元器件损坏带来的着火问题,提升了服务器的品质。In the embodiment of the present invention, the main board input circuit for preventing the PCB main board from catching fire includes a fuse circuit and a voltage conversion circuit; The output end is provided with a first voltage conversion circuit, a second voltage conversion circuit and a third voltage conversion circuit, the first voltage conversion circuit is provided with a 12V voltage conversion chip; the second voltage conversion circuit is provided with a 5V voltage Conversion chip; the first voltage conversion circuit is equipped with a 3.3V voltage conversion chip, so as to realize the protection of the PCB board, effectively prevent the fire problem caused by the damage of PCB components due to short circuit and other reasons, and improve the quality of the server .
附图说明Description of drawings
图1是本发明提供的防止PCB主板着火的主板输入电路的示意图;Fig. 1 is the schematic diagram of the mainboard input circuit that prevents PCB mainboard from igniting that the present invention provides;
图2是本发明提供的主控芯片的电路示意图;Fig. 2 is the schematic circuit diagram of the main control chip provided by the present invention;
其中,1-保险丝电路,2-12V的供电电源,3-主控芯片,4-12V电压转换芯片,5-5V电压转换芯片,6-3.3V电压转换芯片,7-第一电流节点,8-第二电流节点,9-第三电流节点,10-第四电流节点,11-第五电流节点,12-第六电流节点,13-第七电流节点,14-第八电流节点,15-第九电流节点,16-第十电流节点,17-第十二电流节点,18-第十三电流节点,19-第十四电流节点,20-第十五电流节点,21-第十六电流节点,22-第十七电流节点,23-第十一电流节点,24-12V输出端,25-滤波电路。Among them, 1-fuse circuit, 2-12V power supply, 3-main control chip, 4-12V voltage conversion chip, 5-5V voltage conversion chip, 6-3.3V voltage conversion chip, 7-first current node, 8 - the second current node, 9 - the third current node, 10 - the fourth current node, 11 - the fifth current node, 12 - the sixth current node, 13 - the seventh current node, 14 - the eighth current node, 15 - Ninth current node, 16-tenth current node, 17-twelfth current node, 18-thirteenth current node, 19-fourteenth current node, 20-fifteenth current node, 21-sixteenth current node Node, 22-the seventeenth current node, 23-the eleventh current node, 24-12V output terminal, 25-filter circuit.
具体实施方式detailed description
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
图1示出了本发明提供的防止PCB主板着火的主板输入电路的示意图,为了便于说明,图中仅给出了与本发明相关的部分。Fig. 1 shows the schematic diagram of the mainboard input circuit for preventing the PCB mainboard from igniting provided by the present invention. For the convenience of description, only the parts related to the present invention are shown in the figure.
防止PCB主板着火的主板输入电路包括保险丝电路1和电压转换电路;The main board input circuit for preventing the PCB main board from catching fire includes a fuse circuit 1 and a voltage conversion circuit;
所述保险丝电路的输入端与12V的供电电源2的输出端连接,输出端与所述电压转换电路的输入端连接;The input end of the fuse circuit is connected to the output end of the 12V power supply 2, and the output end is connected to the input end of the voltage conversion circuit;
所述电压转换电路包括主控芯片3,所述主控芯片3的输入端与所述保险丝电路的输出端连接,所述主控芯片3的12V输出端设有第一路电压转换线路、第二路电压转换线路和第三路电压转换线路,其中:The voltage conversion circuit includes a main control chip 3, the input end of the main control chip 3 is connected to the output end of the fuse circuit, and the 12V output end of the main control chip 3 is provided with a first voltage conversion circuit, a second Two road voltage conversion circuit and the third road voltage conversion circuit, wherein:
所述第一路电压转换线路上设有12V电压转换芯片4,所述12V电压转换芯片4输出端的电压为12V;A 12V voltage conversion chip 4 is provided on the first voltage conversion circuit, and the voltage at the output terminal of the 12V voltage conversion chip 4 is 12V;
所述第二路电压转换线路上设有5V电压转换芯片5,所述5V电压转换芯片5输出端的电压为5V;The second voltage conversion circuit is provided with a 5V voltage conversion chip 5, and the voltage at the output terminal of the 5V voltage conversion chip 5 is 5V;
所述第一路电压转换线路上设有3.3V电压转换芯片6,所述3.3V电压转换芯片6输出端的电压为3.3V。A 3.3V voltage conversion chip 6 is provided on the first voltage conversion circuit, and the voltage at the output terminal of the 3.3V voltage conversion chip 6 is 3.3V.
其中,上述保险丝电路可以一根保险丝串接的方式,当然也可以采用并联连接的第一保险丝和第二保险丝的方式,图1和图2中给出的两个保险丝并联的情形,在此不再赘述。Wherein, the above-mentioned fuse circuit can be connected in series with one fuse, and of course, the first fuse and the second fuse connected in parallel can also be used. The parallel connection of the two fuses shown in Fig. 1 and Fig. 2 is not mentioned here. Let me repeat.
如图2所示,主控芯片3设有引脚GND1、管脚OV、管脚UV、管脚VCC、管脚MO+、管脚HS+、管脚HS-、管脚MO-、管脚TEMP、管脚GATE、管脚PGND、管脚GND、管脚PWGIN、管脚VOUT、管脚CSOUT、管脚PWRGD和管脚RETRY_L;As shown in Figure 2, the main control chip 3 is provided with pins GND1, pins OV, pins UV, pins VCC, pins MO+, pins HS+, pins HS-, pins MO-, pins TEMP, Pin GATE, pin PGND, pin GND, pin PWGIN, pin VOUT, pin CSOUT, pin PWRGD and pin RETRY_L;
管脚OV引出的线路串接电阻R1后连接至P12V_STBY端,所述管脚OV与所述电阻R1之间设有第一电流节点7,所述第一电流节点7引出的线路串接电阻R2后接地,所述电阻R2与接地端之间设有第二电流节点8,所述第一电流节点7与所述第二电流节点8之间设有与所述电阻R2并联的电容C1;The line drawn from the pin OV is connected to the P12V_STBY terminal after being connected in series with a resistor R1, and a first current node 7 is provided between the pin OV and the resistor R1, and the line drawn out of the first current node 7 is connected in series with a resistor R2 After grounding, a second current node 8 is provided between the resistor R2 and the ground terminal, and a capacitor C1 connected in parallel with the resistor R2 is provided between the first current node 7 and the second current node 8;
所述管脚UV引出的线路串接电阻R3后连接至所述P12V_STBY端,所述管脚UV与所述电阻R2之间设有第三电流节点9,所述第三电流节点9引出的线路串接电阻R4后接地,所述电阻R4与接地端之间设有第四电流节点10,所述第四电流节点10与所述第三电流节点9之间设有与所述电阻R4并联的电容C2;The line drawn from the pin UV is connected to the P12V_STBY terminal after being connected in series with a resistor R3, a third current node 9 is provided between the pin UV and the resistor R2, and the line drawn from the third current node 9 The resistor R4 is connected in series and grounded, a fourth current node 10 is provided between the resistor R4 and the ground terminal, and a resistor connected in parallel with the resistor R4 is provided between the fourth current node 10 and the third current node 9. Capacitor C2;
所述管脚VCC引出的线路串接电阻R5后连接至所述P12V_STBY端,所述管脚VCC与所述电阻R5之间设有第五电流节点11,所述第五电流节点11引出的线路连接电容C3后接地;The line drawn from the pin VCC is connected to the P12V_STBY terminal after being connected in series with a resistor R5, a fifth current node 11 is provided between the pin VCC and the resistor R5, and the line drawn from the fifth current node 11 Connect the capacitor C3 to ground;
所述P12V_STBY端的前端连接所述保险丝电路;The front end of the P12V_STBY terminal is connected to the fuse circuit;
该P12V_STBY端与所述电阻R5之间设有第六电流节点12,所述第六电流节点12引出的线路包括三路,三路输出线路分别串接电阻R6、电阻R7和电阻R8,三鹿输出线路分别串接电阻R6、电阻R7和电阻R8之后汇集到第七电流节点13;There is a sixth current node 12 between the P12V_STBY terminal and the resistor R5, and the lines drawn from the sixth current node 12 include three lines, and the three output lines are respectively connected in series with a resistor R6, a resistor R7, and a resistor R8. The output lines are respectively connected in series with resistors R6, R7 and R8 and then collected to the seventh current node 13;
所述第六电流节点12与所述电阻R6之间设有第八电流节点14,所述第八电流节点14引出的线路依次串接电阻R9和电阻R10后,与所述管脚M0+连接,所述电阻R9与所述电阻R10之间设有第十一电流节点23,所述第十一电流节点23引出的线路连接至所述管脚HS+;An eighth current node 14 is provided between the sixth current node 12 and the resistor R6, and the line drawn from the eighth current node 14 is connected in series with the resistor R9 and the resistor R10 in sequence, and is connected to the pin M0+, An eleventh current node 23 is provided between the resistor R9 and the resistor R10, and a line drawn from the eleventh current node 23 is connected to the pin HS+;
所述第六电流节点12与所述电阻R7之间设有第九电流节点15,所述第九电流节点15引出的线路串接电阻R11后与所述电阻R10串接;A ninth current node 15 is provided between the sixth current node 12 and the resistor R7, and the line drawn from the ninth current node 15 is connected in series with the resistor R11 and then connected in series with the resistor R10;
所述第六电流节点12与所述电阻R8之间设有第十电流节点16,所述第十电流节点16引出的线路串接电阻R12后与所述电阻R10串接;A tenth current node 16 is provided between the sixth current node 12 and the resistor R8, and the line drawn from the tenth current node 16 is connected in series with the resistor R12 and then connected in series with the resistor R10;
所述第七电流节点13与所述电阻R6之间设有第十二电流节点17,所述第十二电流节点17引出的线路依次串接电阻R13和电阻R114后,与所述管脚M0-连接,所述电阻R13与所述电阻R14之间设有第十三电流节点18,所述第十三电流节点18引出的线路连接至所述管脚HS-;A twelfth current node 17 is provided between the seventh current node 13 and the resistor R6, and the line drawn from the twelfth current node 17 is sequentially connected with a resistor R13 and a resistor R114 in series, and connected to the pin M0 - connection, a thirteenth current node 18 is provided between the resistor R13 and the resistor R14, and the line drawn from the thirteenth current node 18 is connected to the pin HS-;
所述第七电流节点13与所述电阻R7之间设有第十四电流节点19,所述第十四电流节点19引出的线路串接电阻R15后与所述电阻R14串接;A fourteenth current node 19 is provided between the seventh current node 13 and the resistor R7, and the line drawn from the fourteenth current node 19 is connected in series with the resistor R15 and then connected in series with the resistor R14;
所述第七电流节点13与所述电阻R8之间设有第十五电流节点20,所述第十五电流节点20引出的线路串接电阻R16后与所述电阻R14串接。A fifteenth current node 20 is provided between the seventh current node 13 and the resistor R8, and the line leading out from the fifteenth current node 20 is connected in series with the resistor R16 and then connected in series with the resistor R14.
在该实施例中,所述第七电流节点13引出的线路设有并联连接的第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路,所述第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路汇集至第十六节点21;In this embodiment, the circuit drawn from the seventh current node 13 is provided with a first field effect tube circuit, a second field effect tube circuit, a third field effect tube circuit and a fourth field effect tube circuit connected in parallel, so The first field effect tube circuit, the second field effect tube circuit, the third field effect tube circuit and the fourth field effect tube circuit are collected to the sixteenth node 21;
所述第一场效应管电路、第二场效应管电路、第三场效应管电路和第四场效应管电路上分别串接场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的漏极D分别与所述第七电流节点连接,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的栅极G分别与所述管脚GATE连接,所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的源极S分别与所述12V输出端(P12V_OUT)24连接。The first field effect tube circuit, the second field effect tube circuit, the third field effect tube circuit and the fourth field effect tube circuit are connected in series with field effect tube Q1, field effect tube Q2, field effect tube Q3 and field effect tube circuit respectively. Tube Q4, the drains D of the field effect transistor Q1, field effect transistor Q2, field effect transistor Q3, and field effect transistor Q4 are respectively connected to the seventh current node, and the field effect transistor Q1, field effect transistor Q2, The gates G of the field effect transistor Q3 and the field effect transistor Q4 are respectively connected to the pin GATE, and the sources S of the field effect transistor Q1, the field effect transistor Q2, the field effect transistor Q3 and the field effect transistor Q4 are respectively connected to the pins GATE. The 12V output terminal (P12V_OUT) 24 is connected.
在该实施例中,所述管脚GATE与所述场效应管Q1、场效应管Q2、场效应管Q3和场效应管Q4的栅极G之间的线路上设有第十七电流节点22,所述第十七电流节点22引出的线路连接至所述12V输出端。In this embodiment, a seventeenth current node 22 is provided on the line between the pin GATE and the gate G of the field effect transistor Q1, field effect transistor Q2, field effect transistor Q3, and field effect transistor Q4 , the line drawn from the seventeenth current node 22 is connected to the 12V output terminal.
结合图2所示,该第十六电流节点21与所述12V输出端之间设有滤波电路25,其中,所述滤波电路25包括并联的若干个电容。As shown in FIG. 2 , a filter circuit 25 is provided between the sixteenth current node 21 and the 12V output terminal, wherein the filter circuit 25 includes several capacitors connected in parallel.
在本发明实施例中,防止PCB主板着火的主板输入电路包括保险丝电路和电压转换电路;电压转换电路包括主控芯片3,主控芯片3的输入端与保险丝电路的输出端连接,主控芯片3的12V输出端设有第一路电压转换线路、第二路电压转换线路和第三路电压转换线路,第一路电压转换线路上设有12V电压转换芯片;第二路电压转换线路上设有5V电压转换芯片;所述第一路电压转换线路上设有3.3V电压转换芯片,从而实现对PCB板的保护,有效防止因为短路等原因造成PCB元器件损坏带来的着火问题,提升了服务器的品质。In the embodiment of the present invention, the main board input circuit for preventing the PCB main board from catching fire includes a fuse circuit and a voltage conversion circuit; The 12V output terminal of 3 is provided with the first voltage conversion circuit, the second voltage conversion circuit and the third voltage conversion circuit, the first voltage conversion circuit is provided with a 12V voltage conversion chip; the second voltage conversion circuit is provided with There is a 5V voltage conversion chip; the first voltage conversion circuit is equipped with a 3.3V voltage conversion chip, so as to realize the protection of the PCB board, effectively prevent the fire problem caused by the damage of the PCB components due to short circuit and other reasons, and improve the The quality of the server.
在该实施例中,服务器PCB板输入端与12V电源输入端之间增加保险丝电路,即通过保险丝电路之后再给服务器PCB板供电,保险丝电路通过服务器主板PCB铜箔焊接固定在主板上。In this embodiment, a fuse circuit is added between the input end of the server PCB board and the input end of the 12V power supply, that is, power is supplied to the server PCB board after passing through the fuse circuit, and the fuse circuit is fixed on the main board by soldering the copper foil of the server main board PCB.
假定一个通用服务器主板工作的最大功率为1200W,选1颗耐电流100A或2颗耐电流50A的保险丝设计到主板输入端,当主板上的电子元器件出现损坏时,在上电情况下就会发生短路,短路就会引起12V输出大电流,当短路电流超过100A时就会触发保险丝保护,保险丝断开会切断给主板的供电,防止了PCB着火的发生,当客服发现服务器主板不工作进行排查时,便可快速定位短路点,确定出故障原因。Assuming that the maximum power of a general-purpose server motherboard is 1200W, select one fuse with a current resistance of 100A or two fuses with a current resistance of 50A and design it at the input end of the motherboard. When the electronic components on the motherboard are damaged, it will When a short circuit occurs, the short circuit will cause 12V to output a large current. When the short circuit current exceeds 100A, the fuse protection will be triggered. The fuse will cut off the power supply to the main board, preventing the PCB from catching fire. , the short-circuit point can be quickly located and the cause of the failure can be determined.
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. within range.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080048665A1 (en) * | 2006-08-23 | 2008-02-28 | Micrel Inc. | Generation of System Power-Good Signal in Hot-Swap Power Controllers |
| CN102799257A (en) * | 2011-05-23 | 2012-11-28 | 鸿富锦精密工业(深圳)有限公司 | Power supply protection circuit |
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| US20080048665A1 (en) * | 2006-08-23 | 2008-02-28 | Micrel Inc. | Generation of System Power-Good Signal in Hot-Swap Power Controllers |
| CN102799257A (en) * | 2011-05-23 | 2012-11-28 | 鸿富锦精密工业(深圳)有限公司 | Power supply protection circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109639140A (en) * | 2019-01-11 | 2019-04-16 | 武汉精立电子技术有限公司 | A kind of pcb board of DC-DC Switching Power Supply |
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