CN108207083A - Manufacturing method and structure of circuit board - Google Patents

Abstract

The present invention provides a method for manufacturing a circuit board and its structure. The method for manufacturing a circuit board of the present invention includes forming a first patterned circuit layer on the surface of a circuit substrate, and the first patterned circuit layer exposes a portion of the surface of the circuit substrate. Forming a patterned circuit layer on the surface of the portion of the circuit substrate exposed by the first patterned circuit layer. Transferring a second patterned circuit layer onto a corresponding patterned adhesive layer. The present invention can manufacture a circuit board structure having a thick metal fine circuit layer by circuit transfer, and patterned thick metal fine circuit layers with different line widths are configured on the circuit substrate.

Description

Manufacturing method and structure of circuit board

technical field

The invention relates to a method for manufacturing a circuit board and its structure, and in particular to a method for manufacturing a circuit board with a thick metal thin circuit structure and its structure.

Background technique

In the manufacturing process of printed circuit boards, in order to make thin line patterns of circuit boards, the modified semi-additive process (MSAP) is often used to make line widths below 40 microns (μm) on circuit boards. line layer. However, the aforesaid manufacturing process requires high investment in equipment and materials, which greatly increases the materials and manufacturing costs required for the manufacturing process of printed circuit boards. In addition, thick metal circuit layers, such as thick copper layers, are difficult to manufacture through the above-mentioned improved semi-additive process, so that the application of thick metal circuit layers in the manufacture of thin circuit structures is limited.

Contents of the invention

The invention provides a method for manufacturing a circuit board, which uses circuit transfer to produce a circuit board structure with a thick metal thin circuit layer.

The invention provides a circuit board structure, in which patterned thick metal thin circuit layers with different line widths are arranged on the circuit substrate.

The manufacturing method of the circuit board of the present invention includes forming a first patterned circuit layer on the surface of the circuit substrate, and the first patterned circuit layer exposes part of the surface of the circuit substrate. A patterned circuit layer is formed on the part of the surface of the circuit substrate exposed by the first patterned circuit layer. Transfer printing the second patterned circuit layer on the corresponding patterned adhesive layer.

The circuit board structure of the present invention includes a circuit substrate, a first patterned circuit layer, a patterned adhesive layer and a second patterned circuit layer. The first patterned circuit layer is configured on the surface of the circuit substrate and exposes part of the surface of the circuit substrate. The patterned adhesive layer is configured on the part of the surface of the circuit substrate exposed by the first patterned circuit layer. The second patterned circuit layer is correspondingly disposed on the patterned adhesive layer. In addition, the line width of the second patterned circuit layer is smaller than the line width of the first patterned circuit layer.

In an embodiment of the present invention, the above-mentioned manufacturing method of the circuit board further includes forming the second patterned circuit layer on a release layer before transferring the second patterned circuit layer to the corresponding patterned adhesive layer.

In an embodiment of the present invention, the above-mentioned circuit substrate has a first alignment point, and the release layer has a second alignment pattern, and before transferring the second patterned circuit layer on the corresponding adhesive layer, first The first alignment pattern and the second alignment pattern are aligned.

In an embodiment of the present invention, the above-mentioned manufacturing method of the circuit board further includes forming a dielectric layer on the circuit substrate. The dielectric layer covers the first patterned circuit layer and the second patterned circuit layer, and fills between the first patterned circuit layer and the second patterned circuit layer.

In an embodiment of the present invention, the method for forming the patterned adhesive layer includes screen printing or jet printing.

In an embodiment of the present invention, the surface of the above-mentioned first patterned circuit layer and the surface of the second patterned circuit layer are flush with each other.

In an embodiment of the present invention, the line width of the second patterned circuit layer is smaller than the line width of the first patterned circuit layer.

In an embodiment of the present invention, the line width of the above-mentioned first patterned circuit layer is greater than or equal to the space between the lines of the first patterned circuit layer.

Based on the above, in the manufacturing method of the circuit board in various embodiments of the present invention, the first patterned circuit layer can be formed on the circuit substrate. Next, a patterned adhesive layer can be formed on the part of the surface of the circuit substrate exposed by the first patterned circuit layer. Then, the second patterned wiring layer can be correspondingly formed on the patterned adhesive layer by means of transfer printing. Therefore, in various embodiments of the present invention, the first patterned circuit layer and the second patterned circuit layer can be respectively formed on the circuit substrate by different process methods. In particular, the second patterned circuit layer is formed on the circuit substrate by transfer printing, so that the second patterned circuit layer can have a smaller line width than the first patterned circuit layer, and reduce the size of the first patterned circuit layer. and the line distance between the second patterned circuit layer.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

Description of drawings

1 is a schematic structural view of a circuit board according to an embodiment of the present invention;

2 is a schematic structural view of a circuit board according to another embodiment of the present invention;

3A to 3I are schematic flowcharts of the manufacturing method of the circuit board shown in FIG. 1 and FIG. 2 .

Explanation of reference signs:

10: Adhesive

50: Stencil

60: release layer

62: Second alignment pattern

50a: grid opening

100: circuit board

110: circuit substrate

110a: upper surface

110b: lower surface

112: The first alignment mark

120: the first patterned circuit layer

130: patterned adhesive layer

140: the second patterned circuit layer

150: dielectric layer

160: the third patterned circuit layer

170: Conductive Via

d1, d3: line width

d2, d4: line spacing

Detailed ways

FIG. 1 is a schematic diagram of a circuit board structure according to an embodiment of the present invention. In this embodiment, the circuit board 100 includes a circuit substrate 110 , a first patterned circuit layer 120 , a patterned adhesive layer 130 and a second patterned circuit layer 140 . As shown in FIG. 1 , in this embodiment, the first patterned circuit layer 120 can be formed on the upper surface 110 a and the lower surface 110 b of the circuit substrate 110 at the same time. In addition, the patterned adhesive layer 130 is disposed on the part of the circuit substrate 110 exposed by the first patterned circuit layer 120 . For example, the patterned adhesive layer 130 can be disposed in the gap between the lines of the first patterned line layer 120 . Furthermore, the second patterned wiring layer 140 is correspondingly disposed on the patterned adhesive layer 130 .

As shown in FIG. 1 , the distance d2 between the lines of the first patterned wiring layer 120 is greater than or equal to the line width d1 of the first patterned wiring layer 120 . For example, the ratio of the distance d2 between the lines of the first patterned circuit layer 120 to the line width d1 of the first patterned circuit layer 120 falls within the range of 1-5. In this embodiment, the sum of the distance d4 between the two sides of the second patterned wiring layer 140 and the first patterned wiring layer 120 and the line width d3 of the second patterned wiring layer 140 is equal to the first pattern The distance d2 between the lines of the circuit layer 120 itself. In this embodiment, the ratio of the line width d3 of the second patterned circuit layer 140 to the line width d1 of the first patterned circuit layer 120 falls within a range of 0.8 to 1.2, for example. In addition, the distance d4 between the first patterned circuit layer 120 and the second patterned circuit layer 140 is smaller than the line width d3 of the second patterned circuit layer 140 .

For example, the line width d1 of the first patterned circuit layer 120 may be less than 30 microns. Furthermore, the distance d4 between the first patterned circuit layer 120 and the second patterned circuit layer 140 may be less than or equal to 10 micrometers.

Besides, in this embodiment, the ratio of the thickness of the first patterned circuit layer 120 to the thickness of the second patterned circuit layer 140 falls within a range of 0.8 to 1.2, for example. In a general implementation, the thickness of the adhesive layer 130 in FIG. 1 is extremely thin relative to the thickness of the second patterned wiring layer 140. The thickness of the circuit layer 120. In this embodiment, the thickness of the first patterned circuit layer 120 is, for example, greater than 50 microns.

Therefore, in this embodiment, on the one hand, the first patterned circuit layer 120 and the second patterned circuit layer 140 with a thicker circuit thickness can be formed on the circuit substrate 110, and on the other hand, the second patterned circuit layer 140 may have a narrower line width d3 than that of the first patterned circuit layer. In addition, compared with the circuit layer formed by a single patterning process, the line distance d4 between the first patterned circuit layer 120 and the second patterned circuit layer 140 may be narrower (for example, less than 10 micrometers).

Please refer to FIG. 1 again. In this embodiment, the circuit substrate 110 also has a first alignment mark 112, so that when the patterned adhesive layer 130 is formed by, for example, screen printing, the connection between the screen plate and the circuit substrate 110 is carried out. To improve the alignment accuracy made by screen printing. In addition, in this embodiment, the patterned adhesive layer 130 can also be formed by inkjet.

FIG. 2 is a schematic diagram of a circuit board structure according to another embodiment of the present invention. The difference between this embodiment and the embodiment shown in FIG. 1 is that a dielectric layer 150 can be further formed on the circuit substrate 110 above the first patterned circuit layer 120 and the second patterned circuit layer 140 . The dielectric layer 150 covers the first patterned circuit layer 120 and the second patterned circuit layer 140 and is filled therebetween. In addition, the third patterned circuit layer 160 can be formed on the dielectric layer 150 corresponding to the first patterned dielectric layer 120 . Moreover, the conductive via 170 can be formed in the dielectric layer 150 and penetrate the dielectric layer 150 to electrically connect the third patterned circuit layer 160 disposed on the surface of the dielectric layer 150 and cover the dielectric layer 150 below. The first patterned wiring layer 120. In this embodiment, the dielectric layer 150 , the conductive via 170 penetrating therethrough, and the third patterned circuit layer 160 can be repeatedly stacked and formed on the first patterned circuit layer 120 and the second patterned circuit layer 140 , To form a circuit board 100 with a multi-layer laminated structure.

3A to 3I are schematic flowcharts of the manufacturing method of the circuit board shown in FIG. 1 and FIG. 2 . In this embodiment, the method for forming the circuit board 100 includes the following steps. As shown in FIG. 3A, the first patterned wiring layer 120 is formed on the upper surface 110a and the lower surface 110b of the wiring substrate 110 respectively, wherein the line spacing d2 between the lines of the first patterned wiring layer 120 is relative to the line width of the line The ratio of d1 falls within the range of 1 to 5. Generally speaking, the ratio of the line distance d2 to the line width d1 can be 3. Next, please refer to FIG. 3B, on the part of the surface of the circuit substrate 110 exposed by the first patterned circuit layer 120, that is, the gap between the lines of the first patterned circuit layer 120 as shown in the figure, for example The patterned adhesive layer 130 is formed by screen printing or inkjet.

In detail, as shown in FIG. 3B , in this embodiment, the adhesive 10 can be screen-printed between the circuits of the first patterned circuit layer 120 through the screen plate 50 . Adhesive 10 can be coated along the direction of the arrow in the figure, and injected into part of the upper surface 110a between the lines of the first patterned circuit layer 120 through the mesh opening 50a of the mesh plate 50, so as to be on the upper surface 110a of the circuit substrate 110 A patterned adhesive layer 130 is formed. Therefore, the patterned adhesive layer 130 may be exposed in gaps between the lines of the first patterned line layer 120 . In addition, the same screen printing process steps as above can be repeated on the lower surface 110 b of the circuit substrate 110 to form the patterned adhesive layer 130 on the lower surface 110 b of the circuit substrate 110 .

Please refer to FIG. 3C , after the patterned adhesive layer 130 is formed, the mesh plate 50 can be removed to continue the subsequent process steps. Next, please refer to FIG. 3D , the second patterned circuit layer 140 can be firstly formed on the release layer 60 through a process such as laser patterning. In addition, as shown in FIG. 3D , the release layer 60 has a second alignment pattern 62 for alignment between the release layer 60 and the circuit substrate 110 .

Then, as shown in FIG. 3E, the second patterned circuit layer 140 on the release layer 60 is transferred to the upper surface 110a of the circuit substrate 110 along the direction of the arrow, and the same steps are repeated on the lower surface 110b of the circuit substrate 110. . In detail, before performing the above-mentioned transfer process, the release layer 60 can first align the second alignment pattern 62 with the first alignment pattern 112 on the circuit substrate 110 by, for example, image alignment. counterpoint. Next, the second patterned circuit layer 140 on the release layer 60 can be correspondingly arranged on the patterned adhesive layer 130, so that the second patterned circuit layer 140 is attached to the surface exposed to the first patterned circuit through the patterned adhesive layer 130. Part of the surface of the circuit substrate 110 between the circuits of the circuit layer 120 .

Next, as shown in FIG. 3F , the release layer 60 can be removed by heating or irradiating ultraviolet light. In this embodiment, since the adhesive force of the adhesive 10 of the patterned adhesive layer 130 to the second patterned circuit layer 140 is greater than the adhesive force between the release layer 60 and the second patterned circuit layer 140, therefore, the release The layer 60 can be easily removed from the surface of the second patterned circuit layer 140 after being heated or irradiated with ultraviolet light, and will not cause peeling of the second patterned circuit layer 140 on the surface of the circuit substrate 110 .

As shown in FIG. 3G , after the release layer 60 is removed, the fabrication of the first patterned circuit layer 120 and the second patterned circuit layer 140 on the upper surface 110 a and the lower surface 110 b of the circuit substrate 110 is completed.

In this embodiment, the first patterned wiring layer 120 and the second patterned wiring layer 140 with different line widths can be formed on the wiring substrate 110 through the above-mentioned manufacturing process, and the first patterned wiring layer 120 and the second patterned wiring layer The patterned circuit layer 140 is made of metal materials such as copper, for example. In detail, as shown in FIG. 1 and FIG. 3G , the ratio of the line width d3 of the second patterned circuit layer 140 to the line width d1 of the first patterned circuit layer 120 falls within the range of 0.8 to 1.2, for example, And the ratio of the thickness of the first patterned circuit layer 120 to the thickness of the second patterned circuit layer 140 falls within a range of 0.8 to 1.2, for example. In addition, the line width of the first patterned wiring layer 120 is, for example, less than 30 microns, and the gap between the first patterned wiring layer 120 and the second patterned wiring layer 140 is, for example, less than 20 microns. In other words, compared with the circuit layer formed by a single patterning process step, the process method of this embodiment can produce a circuit layer with a narrower line width and line space but still maintain a thicker line thickness (for example, greater than 50 microns). The metal circuit layer overcomes the disadvantage that the general improved semi-additive process is not conducive to the production of thick metal thin circuit layers.

Referring to FIG. 3H , a dielectric layer 150 may be further formed on the completed first patterned circuit layer 120 and the second patterned circuit layer 140 . The dielectric layer 150 covers the first patterned circuit layer 120 and the second patterned circuit layer 140 and fills the gap therebetween. In this embodiment, the material of the dielectric layer 150 is, for example but not limited to, photo imagable dielectric (PID) resin.

Next, as shown in FIG. 3I , in this embodiment, the dielectric layer 150 can be mechanically drilled or laser drilled to form a plurality of through holes corresponding to the first patterned circuit layer 120, and through the through holes. Processes such as electroplating and etching of the metal layer form the conductive via hole 170 . In addition, the third patterned circuit layer 160 can be formed on the dielectric layer 150 corresponding to the first patterned circuit layer 120 and the conductive via 170 . The first patterned circuit layer 120 is electrically connected to the third patterned circuit layer 160 through the conductive via 170 . In this embodiment, the above-mentioned process of the dielectric layer 150, the conductive via 170 and the third patterned conductive layer 160 can be repeatedly applied on the first patterned circuit layer 120 and the second patterned circuit layer 140, To form a circuit board 100 with a repeated stacked structure.

To sum up, in the manufacturing methods of circuit boards in various embodiments of the present invention, the first patterned circuit layer and the second patterned circuit layer are respectively formed on the circuit substrate by different process methods. The second patterned circuit layer can be formed on the circuit substrate with the manufactured first patterned circuit layer in a transfer printing manner. Since the second patterned circuit layer is formed on the circuit substrate by transfer printing, compared with the method of forming the patterned circuit layer by a single patterning process step, the gap between the first and the second patterned circuit layer can be with smaller line spacing. In addition, the circuit board manufacturing method of various embodiments of the present invention makes the line thickness of the first patterned circuit layer and the second patterned circuit layer not limited to the size of the line distance between them, so that the circuit structure of the circuit board has a line distance While shrinking, a thicker line thickness can still be maintained. Therefore, the circuit board manufacturing methods of the various embodiments of the present invention can be applied to the manufacture of circuit boards with thick metal thin circuit structures.

Although the present invention has been disclosed as above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the claims.

Claims (10)

1. A method for making a circuit board, characterized in that, comprising: forming a first patterned circuit layer on the surface of the circuit substrate, and the first patterned circuit layer exposes part of the surface of the circuit substrate; forming a patterned adhesive layer on a portion of the surface of the circuit substrate exposed by the first patterned circuit layer; and The second patterned circuit layer is transferred onto the corresponding patterned adhesive layer. 2. The method for manufacturing a circuit board according to claim 1, further comprising forming the second pattern before transferring the second patterned circuit layer on the corresponding patterned adhesive layer The circuit layer is on the release layer. 3. The manufacturing method of the circuit board according to claim 2, wherein the circuit substrate has a plurality of first alignment patterns, and the release layer has a plurality of second alignment patterns, and Before printing the second patterned circuit layer on the corresponding adhesive layer, the plurality of first alignment patterns and the plurality of second alignment patterns are aligned. 4. The method for manufacturing a circuit board according to claim 1, further comprising forming a dielectric layer on the circuit substrate, wherein the dielectric layer covers the first patterned circuit layer and the on the second patterned circuit layer and filled between the first patterned circuit layer and the second patterned circuit layer. 5 . The method for manufacturing a circuit board according to claim 1 , wherein the method for forming the patterned adhesive layer includes screen printing or inkjet. 6. The method for manufacturing a circuit board according to claim 1, wherein the ratio of the thickness of the first patterned circuit layer to the thickness of the second patterned circuit layer falls within the range of 0.8 to 1.2 within range. 7. The method for manufacturing a circuit board according to claim 1, wherein the ratio of the line width of the second patterned circuit layer to the line width of the first patterned circuit layer is between 0.8 and 0.8. 1.2 within the scope. 8. A circuit board structure, characterized in that, comprising: Circuit substrate; The first patterned circuit layer is arranged on the surface of the circuit substrate and exposes part of the surface of the circuit substrate; a patterned adhesive layer disposed on the surface of the circuit substrate exposed by the first patterned circuit layer; and The second patterned circuit layer is correspondingly arranged on the patterned adhesive layer, wherein the ratio of the line width of the second patterned circuit layer to the line width of the first patterned circuit layer is 0.8 to 0.8. 1.2 within the scope. 9. The circuit board structure according to claim 8, wherein the ratio of the thickness of the first patterned circuit layer to the thickness of the second patterned circuit layer falls within the range of 0.8 to 1.2 . 10. The wiring board structure according to claim 8, wherein the ratio of the line spacing between the lines of the first patterned wiring layer to the line width of the first patterned wiring layer is within on a scale of 1 to 5.