CN108597462A - A kind of gate driving circuit and electronic equipment - Google Patents

Abstract

The invention discloses a gate drive circuit and electronic equipment. The gate drive circuit includes a control module, an odd row drive module and an even row drive module, wherein the control module is connected to the odd row drive module to control the odd row drive module to generate Odd line drive signals for driving odd line pixels of the liquid crystal display area; the control module is connected to the even line drive module to control the even line drive module to generate even line drive signals for driving the even line pixels of the liquid crystal display area; wherein, The odd row driving module and the even row driving module alternately generate odd row driving signals and even row driving signals under the control of the odd row strobe signal and the even row strobe signal respectively. The structure of the gate driving circuit is simple, and it can perform interlaced scanning on the pixels in the liquid crystal display area, thereby increasing the refresh rate of the liquid crystal display, improving the display efficiency, and improving the display effect of the liquid crystal display panel.

Description

A gate drive circuit and electronic equipment

technical field

The invention relates to the field of display control of electronic equipment, in particular to a gate drive circuit and electronic equipment.

Background technique

At present, the LCD display panel (the liquid crystal display panel of the liquid crystal display) driven by GOA (Gate Driver on Array) is scanned line by line. . Although the progressive scan makes the picture quality of the liquid crystal display good, but the refresh rate of the progressive scan screen is relatively slow. The current LCD display PPI is getting higher and higher, and the refresh rate is indeed difficult to increase due to the limitation of pixel charging time, so it is more difficult to achieve a high refresh rate by progressive scanning. In addition, when the liquid crystal display is scanned line by line, when displaying the RG mixed color picture, due to the inconsistent charging status of the odd and even lines, there will be a difference in brightness between the odd and even lines, and bright and dark stripes can be seen during display, and the display effect is poor.

Contents of the invention

The purpose of the embodiments of the present invention is to provide a gate driving circuit and an electronic device. The gate driving circuit can perform interlaced scanning on the pixels in the liquid crystal display area, so as to increase the refresh rate of the liquid crystal display and improve the image quality.

In order to solve the above technical problems, the embodiments of the present invention adopt the following technical solution: a gate drive circuit, the gate drive circuit includes a control module, an odd row drive module and an even row drive module, wherein,

The control module is connected to the odd-row driving module to control the odd-row driving module to generate odd-row driving signals for driving odd-row pixels in the liquid crystal display area;

The control module is connected to the even-numbered row driving module to control the even-numbered row driving module to generate an even-numbered row driving signal for driving the even-numbered row pixels of the liquid crystal display area; wherein,

The odd row driving module and the even row driving module alternately generate the odd row driving signal and the even row driving signal under the control of the odd row gating signal and the even row gating signal respectively.

Preferably, the odd-numbered row driving module has an odd-numbered driving terminal for generating the odd-numbered row driving signal, the control module includes an odd-numbered row discharge branch, and the odd-numbered row discharge branch is connected to the odd-numbered driving terminal, Discharging the odd-numbered driving terminals, thereby eliminating the odd-numbered row driving signals;

The even-numbered row driving module has an even-numbered driving terminal for generating the even-numbered row driving signal, the control module includes an even-numbered row discharge branch, and the even-numbered row discharge branch is connected to the even-numbered driving terminal to The even-numbered driving terminals are discharged, thereby eliminating the even-numbered row driving signals.

Preferably, the odd row driving module includes an odd row input terminal and an odd row thin film transistor for inputting the odd row strobe signal, the odd row input terminal is connected to the drain of the odd row thin film transistor, so The sources of the odd-numbered thin film transistors are connected to the odd-numbered driving terminals;

The even-numbered row driving module includes an even-numbered row input terminal and an even-numbered row thin film transistor for inputting the even-numbered row strobe signal, the even-numbered row input terminal is connected to the drain of the even-numbered row thin film transistor, and the even-numbered row The sources of the thin film transistors are connected to the even-numbered driving terminals.

Preferably, the control module has a first control terminal, and the first control terminal is connected to the odd row driving module for driving the odd row driving module to generate the odd row driving signal; and

The first control terminal is connected to the even row driving module for driving the even row driving module to generate the even row driving signal.

Preferably, the control module includes a control input terminal and a control thin film transistor, the gate and drain of the control thin film transistor are both connected to the control input terminal, the source of the control thin film transistor is connected to the first Console connection.

Preferably, the control module has a second control terminal, and the second control terminal is connected to the odd row discharge branch for controlling the odd row discharge branch to perform a discharge operation on the odd drive terminal;

The second control terminal is connected to the even row discharge branch for controlling the even row discharge branch to perform a discharge operation on the even drive terminal.

Preferably, the odd row discharge branch includes an odd row discharge thin film transistor, the gate of the odd row discharge thin film transistor is connected to the second control terminal, so that the second control terminal controls the odd row discharge The thin film transistor discharges the odd-numbered driving terminals;

The even-numbered row discharge branch circuit includes an even-numbered row discharge thin film transistor, and the gate of the even-numbered row discharge thin film transistor is connected to the second control terminal, so that the second control terminal controls the even-numbered row discharge thin film transistor pair The even-numbered driving terminals perform a discharge operation.

Preferably, the gate drive circuit further includes a trigger reset module, the trigger reset module is connected to the control module to generate a trigger reset signal under the control of the control module, thereby triggering the The second pixel row is turned on, and the first pixel row among the display area pixels is reset.

Preferably, the trigger reset module has a trigger reset terminal to generate the trigger reset signal, and the control module includes a trigger reset discharge branch corresponding to the trigger reset module, and the trigger reset discharge branch is connected to the trigger reset discharge branch The trigger reset terminal is connected, and the trigger reset discharge branch discharges the trigger reset terminal under the control of the control module.

An embodiment of the present invention also provides a liquid crystal display, the liquid crystal display comprising the above-mentioned gate driving circuit.

The beneficial effect of the embodiments of the present invention is that the structure of the gate drive circuit is simple, and interlaced scanning can be performed on the pixels in the liquid crystal display area, the refresh rate of the liquid crystal display is improved, and the display efficiency is improved, and the color mixing picture that occurs in progressive scanning will not be generated. Phenomenon, that is, in the process of progressive scanning, when displaying the RG color mixing screen, there will be no difference in brightness between the odd and even lines due to the inconsistent charging status of the odd and even lines (the LCD panel will not display bright and dark stripes ), improving the display effect of the liquid crystal display panel.

Description of drawings

FIG. 1 is a schematic structural diagram of a gate drive circuit according to an embodiment of the present invention;

FIG. 2 is a structural diagram of a specific embodiment of the gate driving circuit of the embodiment of the present invention.

Explanation of reference signs

1-control module 2-odd row driver module 3-odd row pixel

4-Even row driver module 5-Even row pixel

Detailed ways

Various aspects and features of the invention are described herein with reference to the accompanying drawings.

It should be understood that various modifications may be made to the embodiments of the inventions herein. Accordingly, the above description should not be viewed as limiting, but only as exemplifications of embodiments. Those skilled in the art will envision other modifications within the scope and spirit of the invention.

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description of the invention given above and the detailed description of the embodiments given below, serve to explain the invention. principle.

These and other characteristics of the invention will become apparent from the following description of preferred forms of embodiment given as non-limiting examples with reference to the accompanying drawings.

It should also be understood that while the invention has been described with reference to a few specific examples, those skilled in the art can certainly implement many other equivalent forms of the invention, which have the features described in the claims and thus lie within the scope of the present invention. within the limited scope of protection.

The above and other aspects, features and advantages of the present invention will become more apparent in view of the following detailed description when taken in conjunction with the accompanying drawings.

Specific embodiments of the present invention are hereinafter described with reference to the accompanying drawings; however, it should be understood that the disclosed embodiments are merely examples of the invention, which may be embodied in various ways. Well-known and/or repetitive functions and constructions are not described in detail to avoid obscuring the invention with unnecessary or redundant detail. Therefore, specific structural and functional details of the invention herein are not intended to be limiting, but merely as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present invention in virtually any suitable detailed structure. invention.

This specification may use the phrases "in one embodiment," "in another embodiment," "in yet another embodiment," or "in other embodiments," which may refer to the same or one or more of the different embodiments.

A gate drive circuit in an embodiment of the present invention is applied in the display process of a liquid crystal panel, and can control the scanning mode of the liquid crystal panel for pixels, especially can control the liquid crystal panel to perform interlaced scanning. In this embodiment, the gate The driving circuit can respectively scan the odd-numbered lines and the even-numbered lines in the liquid crystal panel. As shown in FIG. 1 , the gate drive circuit includes a control module 1, an odd row drive module 2 and an even row drive module 4, wherein,

The control module 1 is connected to the odd-row driving module 2 to control the odd-row driving module 2 to generate odd-row driving signals for driving the odd-row pixels 3 in the liquid crystal display area. The control module 1 includes a variety of electronic components with different functions, capable of generating control signals to the odd row drive module 2, and the odd row drive module 2 may also be a combination of various electronic components. In one embodiment, the control module 1 has at least one odd-numbered row control terminal, and the odd-numbered row control terminal can send an odd-numbered row gating signal to control the odd-numbered row driving module 2 to generate an odd-numbered row driving signal, and the odd-numbered row driving signal can drive The pixels 3 in the odd rows of the liquid crystal display area display, but do not display the pixels 5 in the even rows at the same time. For example, the odd-numbered row driving signal can be used as a driving command to drive the odd-numbered row pixels 3 in the liquid crystal panel to display, and when the odd-numbered row driving signal stops outputting a high level, one or more rows of odd-numbered row pixels 3 are completed. show.

The control module 1 is connected with the even row driving module 4 to control the even row driving module 4 to generate even row driving signals for driving the even row pixels 5 in the liquid crystal display area. Similar to the odd row driving module 2, the even row driving module 4 can also be a combination of various electronic components. In one embodiment, the control module 1 has at least one even-numbered row control terminal, and the even-numbered row control terminal can send an even-numbered row gating signal to control the even-numbered row driving module 4 to generate an even-numbered row driving signal, and the even-numbered row driving signal can drive The even row pixels 5 in the liquid crystal display area display, but not the odd row pixels 3 at the same time, and the even row control terminal can be the same as the odd row control terminal, or different from the odd row control terminal, so that it is set independently in form. Similarly, the even-numbered row driving signal can also be used as a driving command with a high level to drive the even-numbered row pixels 5 in the liquid crystal panel for display, and when the even-numbered row driving signal stops outputting a high level, the even-numbered row of one or more rows is completed. Pixel 5 display.

Wherein, the odd row driving module 2 and the even row driving module 4 alternately generate the odd row driving signal and the even row driving signal under the control of the odd row gating signal and the even row gating signal respectively. The odd-numbered row driving signal and the even-numbered row driving signal are not generated simultaneously but alternately, so that the gate driving circuit can make the liquid crystal display panel display only odd-numbered rows or only even-numbered rows within a certain period of time, which improves the display of the liquid crystal display. Efficiency, that is, increased refresh rate. In one embodiment, the resolution of the liquid crystal display panel is relatively high, so when the liquid crystal display panel only displays odd or even lines, it will not affect the image quality of the displayed image in the user's perception. At the same time, the display efficiency is improved, and the color mixing picture phenomenon that occurs in progressive scanning will not occur (that is, during the progressive scanning process, when displaying RG color mixing pictures, the odd and even lines will have brightness due to the inconsistent charging status of the odd and even lines. difference, bright and dark stripes can be seen when displaying, and the display effect is poor), which improves the display effect of the liquid crystal display panel.

In one embodiment of the present invention, with reference to FIG. 2, the odd-numbered row drive module 2 has odd-numbered drive terminals for generating odd-numbered row drive signals, and the control module 1 includes an odd-numbered row discharge branch, and the odd-numbered row discharge branch and the odd-numbered drive terminal Connect to discharge the odd-numbered drive terminals, thereby eliminating the odd-numbered row drive signals. In one embodiment, the odd-numbered driving terminal (such as OUT_ODD in a specific embodiment) has the ability to drive the odd-numbered row pixels 3 of the liquid crystal display panel to display when it is not discharged, if the driven odd-numbered row pixels 3 display can be completed Discharge processing is carried out to the odd-numbered drive terminal OUT_ODD, while eliminating the odd-numbered row drive signal, preparations are made for the start of the even-numbered row drive terminal (such as OUT_EVEN in a specific embodiment. When the odd-numbered row pixels 3 are displayed and driven, they can be performed one by one. Drive, such as first driving the first odd-numbered line and then driving the second odd-numbered line, etc., since the odd-numbered line of the LCD panel is roughly half of the total number of display lines, so driving the odd-numbered line to complete the display can greatly improve the display speed of the LCD screen. Improve refresh rate.In addition, the odd-numbered row discharge branch of control module 1 also can be made of various types of electronic components and parts (as comprising M12A and M4A, be connected in odd-numbered driving terminal OUT_ODD, can come by making odd-numbered driving terminal grounding etc. A discharge operation is performed on the odd-numbered driving terminals OUT_ODD.

The even-numbered row driving module 4 has an even-numbered driving terminal for generating an even-numbered row driving signal, and the control module 1 includes an even-numbered row discharge branch, and the even-numbered row discharge branch is connected to the even-numbered driving terminal to discharge the even-numbered driving terminal, thereby eliminating the even-numbered row. line drive signal. Similar to the odd-numbered row driving module 2, in one embodiment, the even-numbered driving terminal OUT_EVEN has the ability to drive the even-numbered row of pixels 5 of the liquid crystal display panel to display when it is not discharged. If the driven even-numbered row of pixels 5 is displayed, it can be displayed The even-numbered driving terminal OUT_EVEN performs discharge processing, and prepares for starting the odd-numbered row driving terminal while eliminating the driving signal of the even-numbered row. When all the pixels 5 in the even rows are displayed, the display of the entire screen of the liquid crystal display panel is realized. Similar to the odd row discharge branch, the even row discharge branch of the control module 1 (such as including M11B, M12B and M4B) can also be composed of various types of electronic components, connected to the even drive terminal OUT_EVEN, and can be driven by even The even-numbered driving terminals are discharged by means of grounding the terminal OUT_EVEN to eliminate the driving signals of the even-numbered rows.

In one embodiment of the present invention, with reference to Fig. 2, the odd-numbered row driving module 2 includes an odd-numbered row input terminal (such as SCAN_ODD in a specific embodiment) and an odd-numbered row thin film transistor (such as a M3A) in the specific embodiment, the input terminals SCAN_ODD of the odd rows are connected to the drains of the thin film transistors M3A of the odd rows, and the sources of the thin film transistors of the odd rows are connected to the odd driving terminals. The thin film transistors have the function of switches. In one embodiment, the odd row thin film transistors have gate G, source S and drain D, and the control module 1 can operate the odd row thin film transistors by operating the gates of the odd row thin film transistors M3A M3A itself controls the conduction of the drain and source of the odd-numbered thin film transistor M3A, and further controls the input terminal SCAN_ODD of the odd-numbered row to output its signal to the odd-numbered driving terminal OUT_ODD, so that the odd-numbered driving terminal OUT_ODD drives the liquid crystal display panel The odd rows of pixels 3 are displayed.

The even row drive module 4 includes an even row input terminal (such as SCAN_EVEN in a specific embodiment and an even row thin film transistor (such as M3B in a specific embodiment) for inputting an even row strobe signal, and the even row input terminal SCAN_EVEN is connected to the even row input terminal SCAN_EVEN in a specific embodiment. The drains of row thin film transistors M3B are connected, and the source electrodes of even row thin film transistors are connected with even drive terminals.Similar to odd row driver module 2, even row thin film transistors also have gate G, source S and drain D, control module 1 The even-numbered thin-film transistor M3B itself can be operated by operating the gate of the even-numbered thin-film transistor M3B, thereby controlling the conduction of the drain and source of the even-numbered thin-film transistor M3B, and further, controlling the even-numbered input terminal SCAN_EVEN can turn it The signal is output to the even-numbered driving terminal OUT_EVEN, so that the even-numbered driving terminal OUT_EVEN drives the even-numbered rows of pixels 5 of the liquid crystal display panel to display.

In one embodiment of the present invention, with reference to Fig. 2, the control module 1 has a first control terminal (such as PU in a specific embodiment, the first control terminal PU is connected with the odd row driver module 2 for driving the odd row driver Module 2 generates odd row drive signals; and the first control terminal PU is connected to even row drive module 4 for driving even row drive module 4 to generate even row drive signals.Control module 1 can send control signals through the first control terminal, Form the control signal as by driving the change of the voltage of the first control terminal, and then drive the odd-numbered row driving module 2 to generate the odd-numbered row driving signal. For example, the first control terminal PU is connected to the odd-numbered row thin film transistor in the odd-numbered row driving module 2 (as specifically The gate of M3A) in the embodiment, when the first control terminal PU is at a high level, can turn on the drains and sources of the thin-film transistors M3A in odd rows, so that the drive module 2 for driving odd rows generates odd row drive signals. The same reason , the first control terminal PU is connected to the gates of the even-numbered thin-film transistors (such as M3B in the specific embodiment) in the even-numbered row driving module 4, and the even-numbered thin-film transistor M3B can be turned on when the first control terminal PU is at a high level The drain and the source of the drive module 4 for driving the even-numbered rows generate even-numbered row driving signals.

In one embodiment of the present invention, the control module 1 includes a control input terminal (such as INPUT in a specific embodiment and a control thin film transistor (such as M1 in a specific embodiment), and the gate and drain of the control thin film transistor M1 They are all connected to the control input terminal INPUT, and the source of the control thin film transistor is connected to the first control terminal PU. The control input terminal INPUT can carry out timing changes, such as when the control input terminal INPUT is at a high level, it will control the thin film transistor M1 to open. When the first control terminal PU is charged to a high level, the first control terminal PU can control the odd-numbered row driving modules 2 or the even-numbered row driving modules 4 connected thereto.

In one embodiment of the present invention, with reference to FIG. 2, the control module 1 has a second control terminal (such as PDA and PDB in a specific embodiment), and the second control terminal is connected to the discharge branches of odd rows for controlling odd rows. The row discharge branch performs a discharge operation on odd-numbered drive terminals (such as OUT_ODD in a specific embodiment). The control module 1 can send a control signal through the second control terminal (PDA and PDB), such as by driving the voltage of the second control terminal (PDA and PDB) to rise to form a control signal, and then drive and control the discharge branch of the odd row, so that the odd row The row discharging branch performs a discharge operation on the odd-numbered driving terminals OUT_ODD, so that the odd-numbered driving terminals OUT_ODD stop driving the odd-numbered row pixels 3 of the liquid crystal panel to display.

The second control terminals PDA and PDB are connected to the even row discharge branch for controlling the even row discharge branch to perform a discharge operation on the even drive terminal OUT_EVEN. Similar to the discharge branch of the odd row, the voltage of the second control terminal PDA and PDB is driven to rise to form a control signal, and then the discharge branch of the even row is driven and controlled, so that the discharge branch of the even row performs a discharge operation on the even drive terminal OUT_EVEN, thereby The even-numbered driving terminal OUT_EVEN stops driving the display of the even-numbered pixels 5 of the liquid crystal panel, or completes the display of one or more rows of even-numbered pixels 5 .

In one embodiment of the present invention, referring to FIG. 2 , the gate drive circuit further includes a trigger reset module, which is connected to the control module 1 to generate a trigger reset signal under the control of the control module 1, thereby triggering the pixels in the display area. The second pixel row in is turned on, and the first pixel row in the display area pixels is reset. In one embodiment, the trigger reset module includes a reset thin film transistor (such as M3C in a specific embodiment, a reset input terminal CLK, and a trigger reset terminal OUT_C). Wherein, the gate of the reset thin film transistor M3C is connected to the first control terminal PU of the control module 1, the drain of the reset thin film transistor M3C is connected to the reset input terminal CLK, and the source of the reset thin film transistor M3C is connected to the trigger reset terminal OUT_C. When the first control terminal PU of the control module 1 is at a high level, the reset thin film transistor M3C is turned on, and the reset input terminal CLK is output to the trigger reset terminal OUT_C, and the trigger reset terminal OUT_C is used to drive the first pixel in the display area pixel of the liquid crystal display panel. The second pixel row is turned on, and the first pixel row among the pixels in the display area is reset, wherein the first pixel row is first displayed with the second pixel row, that is, it has the function of triggering the next row to turn on and resetting the previous row.

Preferably, in conjunction with FIG. 2, the trigger reset module has a trigger reset terminal OUT_C to generate a trigger reset signal. The control module 1 includes a trigger reset discharge branch corresponding to the trigger reset module, and the trigger reset discharge branch is connected to the trigger reset terminal. The trigger reset discharge branch discharges the trigger reset terminal OUT_C under the control of the control module 1 . For further description in conjunction with the above embodiments, the trigger reset discharge branch includes a first trigger reset TFT M11C and a second trigger reset TFT M12C, the drain of the first trigger reset TFT M11C is connected to the trigger reset terminal OUT_C, and the second trigger reset TFT M11C is connected to the trigger reset terminal OUT_C. The drain of the reset TFT M12C is also connected to the trigger reset terminal OUT_C. The first control terminal PU of the control module 1 is connected to the gate of the first trigger reset TFT M11C. When the first control terminal PU is at high level, the first control terminal PU is turned on. Once the reset TFT M11C is triggered, the reset terminal OUT_C is triggered to discharge (which may be connected to the ground line VSS), thereby stopping the reset operation. The second control terminal PDB of the control module 1 is connected to the gate of the second trigger reset thin film transistor M12C. When the second control terminal PDB is at a high level, the second trigger reset thin film transistor M12C is turned on, which also causes the trigger reset terminal OUT_C to discharge ( can also be connected to ground VSS) to stop the reset operation. The structural structure of the first trigger reset thin film transistor M11C and the second trigger reset thin film transistor M12C of the trigger reset discharge branch realizes the separation of the output driving the display area of the liquid crystal display panel from the output responsible for trigger reset, and the circuit structure becomes simpler It is easy to implement, and realizes the function of interlaced scanning.

In one embodiment of the present invention, referring to FIG. 2 , the control module 1 includes a restart terminal RESET and at least one restart thin film transistor, which is used to realize the restart operation of the gate drive circuit or the control module 1 in the gate drive circuit, For example, the PU in the control module 1 is discharged to restart the control module 1 . In one embodiment, the restart thin film transistor includes M2, M10A, and M10B. When the reset terminal RESET is at a high level, M2 is turned on to discharge the first control terminal PU; in one embodiment, the PDA in the second control terminal is connected to M10A. Gate connection, when the PDA in the second control terminal is high level, the first control terminal PU is discharged; in another embodiment, the PDB in the second control terminal is connected to the gate of M10B, when the second control terminal When the PDB in is at a high level, the first control terminal PU is discharged. In addition, if the reset terminal RESET is at a high level, the thin film transistor M4A and the thin film transistor M4B are turned on, so that the even driving terminal OUT_EVEN and the odd driving terminal OUT_ODD can be discharged, thereby stopping displaying of pixels in the liquid crystal panel.

To further illustrate, when performing odd-numbered line scanning, when the control input terminal INPUT is at a high level pulse, the control thin film transistor M1 is turned on, the first control terminal PU is charged to a high level, and the reset input terminal CLK is output to trigger the reset terminal OUT_C, Then trigger the next row to turn on and reset the previous row; at the same time, the odd-numbered drive terminal OUT_ODD outputs the same waveform as the first control terminal PU (the frame of the odd-numbered row input terminal SCAN_ODD is high at the beginning), and the last pulse width of the first control terminal PU In one line time, odd-numbered line driving signals are output to the LCD panel, and a line of pixels is lit; when the signal from the reset terminal RESET comes, the first control terminal PU is discharged to VSS low level, and the thin-film transistor M3A in odd-numbered lines is turned off, and the odd-numbered line is driven Terminal OUT_ODD stops outputting high level to complete one line of scanning; at other times in one frame, the first control terminal PU is at low level, and the generated noise can be well controlled by PDA or PDB. In addition, the timing principle of even-numbered row scanning is the same as that of odd-numbered row scanning, and will not be described again.

In one embodiment of the present invention, referring to FIG. 2, the gate drive circuit further includes a noise reduction module, such as a first noise reduction branch and a second noise reduction branch, wherein the first noise reduction branch includes a first Noise reduction input (such as VDDA), at least one first noise reduction thin film transistor and corresponding first noise reduction discharge circuit (such as M8A and M6A); the second noise reduction branch includes a second noise reduction input (such as VDDB) , at least one second noise reduction thin film transistor and a corresponding second noise reduction discharge circuit (such as M8B and M6B). For example, the first noise reduction thin film transistor includes M9A and M5A, the gate and drain of M9A are connected to the first noise reduction input terminal VDDA, the source of M9A is connected to the gate of M5A, and M5A is used to connect the first noise reduction input terminal VDDA of the control module 1 The voltage of the second control terminal PDB is pulled high to perform noise reduction processing on the first control terminal PU. Similarly, the second noise reduction thin film transistor includes M9B and M5B, the gate and drain of M9B are connected to the second noise reduction input terminal VDDB, the source of M9B is connected to the gate of M5B, and M5B is used to connect the The voltage of the second control terminal PDA is pulled high to perform noise reduction processing on the first control terminal PU.

An embodiment of the present invention also provides a liquid crystal display, which includes the above-mentioned gate driving circuit. In addition, the liquid crystal display also has a liquid crystal display panel and corresponding accessories, and the gate drive circuit can drive the pixels in the liquid crystal display panel to perform alternate display of odd-numbered lines and even-numbered lines. The refresh rate and display effect of the liquid crystal display are improved. The liquid crystal display can be used as a display device of various electronic devices, such as a display of a desktop computer, a display of a notebook computer, and a display of equipment such as a television.

The above embodiments are only exemplary embodiments of the present invention, and are not intended to limit the present invention, and the protection scope of the present invention is defined by the claims. Those skilled in the art can make various modifications or equivalent replacements to the present invention within the spirit and protection scope of the present invention, and such modifications or equivalent replacements should also be deemed to fall within the protection scope of the present invention.

Claims (10)

1. A gate drive circuit, characterized in that, the gate drive circuit includes a control module, an odd row drive module and an even row drive module, wherein, The control module is connected to the odd-row driving module to control the odd-row driving module to generate odd-row driving signals for driving odd-row pixels in the liquid crystal display area; The control module is connected to the even-numbered row driving module to control the even-numbered row driving module to generate an even-numbered row driving signal for driving the even-numbered row pixels of the liquid crystal display area; wherein, The odd row driving module and the even row driving module alternately generate the odd row driving signal and the even row driving signal under the control of the odd row gating signal and the even row gating signal respectively. 2. The gate drive circuit according to claim 1, wherein The odd-numbered row driving module has an odd-numbered driving terminal for generating the odd-numbered row driving signal, and the control module includes an odd-numbered row discharge branch connected to the odd-numbered driving terminal to The odd-numbered driving terminals are discharged, thereby eliminating the odd-numbered row drive signals; The even-numbered row driving module has an even-numbered driving terminal for generating the even-numbered row driving signal, the control module includes an even-numbered row discharge branch, and the even-numbered row discharge branch is connected to the even-numbered driving terminal to The even-numbered driving terminals are discharged, thereby eliminating the even-numbered row driving signals. 3. The gate drive circuit according to claim 2, wherein The odd row drive module includes an odd row input terminal and an odd row thin film transistor for inputting the odd row strobe signal, the odd row input terminal is connected to the drain of the odd row thin film transistor, and the odd row The source of the thin film transistor is connected to the odd-numbered driving terminal; The even-numbered row driving module includes an even-numbered row input terminal and an even-numbered row thin film transistor for inputting the even-numbered row strobe signal, the even-numbered row input terminal is connected to the drain of the even-numbered row thin film transistor, and the even-numbered row The sources of the thin film transistors are connected to the even-numbered driving terminals. 4. The gate drive circuit according to claim 1, wherein The control module has a first control terminal, and the first control terminal is connected to the odd-row driving module for driving the odd-row driving module to generate the odd-row driving signal; and The first control terminal is connected to the even row driving module for driving the even row driving module to generate the even row driving signal. 5. The gate drive circuit according to claim 4, wherein The control module includes a control input terminal and a control thin film transistor, the gate and drain of the control thin film transistor are connected to the control input terminal, and the source of the control thin film transistor is connected to the first control terminal . 6. The gate drive circuit according to claim 2, wherein The control module has a second control terminal, and the second control terminal is connected to the odd row discharge branch for controlling the odd row discharge branch to perform a discharge operation on the odd drive terminal; The second control terminal is connected to the even row discharge branch for controlling the even row discharge branch to perform a discharge operation on the even drive terminal. 7. The gate drive circuit according to claim 6, wherein The odd row discharge branch circuit includes an odd row discharge thin film transistor, the gate of the odd row discharge thin film transistor is connected to the second control terminal, so that the second control terminal controls the odd row discharge thin film transistor pair The odd-numbered driving terminals perform a discharge operation; The even-numbered row discharge branch circuit includes an even-numbered row discharge thin film transistor, and the gate of the even-numbered row discharge thin film transistor is connected to the second control terminal, so that the second control terminal controls the even-numbered row discharge thin film transistor pair The even-numbered driving terminals perform a discharge operation. 8. The gate drive circuit according to claim 1, further comprising a trigger reset module connected to the control module to generate a trigger reset under the control of the control module signal, thereby triggering the second pixel row among the pixels in the display area to be turned on, and resetting the first pixel row among the pixels in the display area. 9. The gate drive circuit according to claim 8, the trigger reset module has a trigger reset terminal to generate the trigger reset signal, and the control module includes a trigger reset discharge branch corresponding to the trigger reset module The trigger reset discharge branch is connected to the trigger reset terminal, and the trigger reset discharge branch discharges the trigger reset terminal under the control of the control module. 10. A liquid crystal display, comprising the gate drive circuit according to any one of claims 1 to 9.