CN108710404B - a mixed signal generator - Google Patents

Abstract

The application discloses mixed signal generator includes: the device comprises a clock management module, a bus control module, a waveform data storage module and a mixed signal generation module, wherein the clock management module is respectively connected with the bus control module and the mixed signal generation module, receives a reference clock, and generates a high-speed clock and a working clock of the mixed signal generation module and working clocks required by the bus control module and the waveform data storage module; the bus control module is used for communication between the upper computer and the mixed signal generation module, and analyzing and processing instruction, address and waveform data sent to the mixed signal generation module by the upper computer in real time; the waveform data storage module is connected with the bus control module and stores data information of the waveform signals; the mixed signal generation module is connected with the waveform data storage module and outputs mixed signals based on the data information of the waveform signals stored by the waveform data storage module. The application can effectively output mixed signals.

Description

a mixed signal generator

technical field

The present application belongs to the technical field of signal generators, and in particular relates to a mixed signal generator.

Background technique

Signal generators play an important role in daily life and are widely used in wireless communication, radar, quantum computing and other fields. Control the frequency of reception and transmission in wireless communication, and realize the generation of various modulation signals; in the field of radar, it is necessary to generate frequency hopping signals with strong anti-interference ability; in the field of quantum computing, the manipulation of qubits requires the use of high frequency resolution , frequency adjustable signal.

Commonly used signal generators include signal generators based on PLL (Phase Locked Loop, phase-locked loop), signal generators using DDS (Direct Digital Synthesis, direct digital synthesis) chips, arbitrary waveform generators, and the like. The PLL-based signal generator uses closed-loop negative feedback control, combined with frequency multiplication and frequency division technology, so that the output signal frequency has a definite mathematical relationship with the reference signal frequency, and the phase of the output signal has a definite relationship with the reference signal, which can generate stable It is a single-frequency signal with high intensity and small phase noise, but there is also the problem that the frequency output cannot be adjusted accurately and quickly. The DDS chip constructs the digital waveform of the output signal in real time, and outputs the analog signal through the DAC (Digital-to-Analog Converter). The output signal frequency switching speed is fast and the frequency modulation bandwidth is large, but it is difficult to generate complex waveforms and store The number of switching frequencies is not large. The usual arbitrary waveform generator adopts the direct mode, and outputs the stored digital waveform to the DAC point by point to obtain an analog signal, which can generate almost any waveform signal, but the waveform length is limited by the storage capacity, with a sampling rate of 2.8GHz and a resolution of 14bit Taking the AD9129 as an example, the 4GB DDR3 storage capacity can only store about 2.285G samples and can play 0.816s. Nowadays, with the development of technology, some arbitrary waveform generators also have the ability to use DDS to generate some simple waveforms in real time.

At present, the AD9914 with a 3.5GHz sampling rate of DDS chip launched by Analog Devices provides monophonic mode, modulation mode, linear scanning mode, and frequency hopping mode. The internal registers meet 8 kinds of frequency/phase configurations, and support serial bus or high-speed parallel The port writes the frequency word to the frequency register inside the chip, and then sets the I/O_UPDATE pin to implement the update. Integrated DDS chip, the frequency switching speed is fast, and the waveform is continuous. However, the type of output signal is limited by the types of existing modes, and it is difficult to output complex waveforms. In addition, the signal generator under the framework of the arbitrary waveform generator disclosed in the prior art stores waveforms through SRAM (Static Random-Access Memory, static random access memory), realizes the output of arbitrary waveforms, and can output various user-defined functions. signal, but the waveform length is limited by the memory capacity.

SUMMARY OF THE INVENTION

In view of this, the present application provides a mixed signal generator, which can use parameters of a fixed storage space to describe a waveform, decode waveform data words in real time to generate a mixed waveform, and then output a mixed signal, which can compress and store the required digital waveforms. space, and try to avoid the problem that the waveform length is limited by the storage capacity when the arbitrary waveform generator outputs.

The application provides a mixed signal generator, including: a clock management module, a bus control module, a waveform data storage module and a mixed signal generation module, wherein:

The clock management module is respectively connected with the bus control module and the mixed signal generation module, and is used for receiving a reference clock, generating a high-speed clock and a working clock of the mixed signal generation module, as well as the bus control module and the waveform data. The working clock required by the memory module;

The bus control module is respectively connected with the host computer and the mixed signal generation module, and is used for the communication between the host computer and the mixed signal generation module, and analyzes and processes the instructions and addresses sent by the host computer to the mixed signal generation module in real time. and waveform data;

The waveform data storage module is connected to the bus control module, and is used for storing data information of the waveform signal;

The mixed signal generating module is connected to the waveform data storage module, and is configured to output a mixed signal based on the data information of the waveform signal stored in the waveform data storage module.

Preferably, the mixed signal generation module includes: a mixed waveform generation module and a high-speed digital-to-analog conversion module; wherein:

The mixed waveform generation module is connected with the bus control module, the waveform data storage module and the high-speed digital-to-analog conversion module, and is used for decoding the data information of the waveform signal stored in the waveform data storage module to generate the mixed signal in real time. waveform;

The high-speed digital-to-analog conversion module is configured to output the mixed signal based on the waveform of the mixed signal generated by the mixed waveform generation module.

Preferably, the high-speed digital-to-analog conversion module includes: a parallel-to-serial conversion module and a digital-to-analog converter, wherein:

the parallel-serial conversion module, for encoding the waveform of the mixed signal to a higher frequency and sending it to the digital-to-analog converter;

The digital-to-analog converter is configured to output a mixed signal based on the received waveform of the mixed signal.

Preferably, the waveform data storage module is a data storage module based on FPGA internal BRAM and external DDR3.

Preferably, the mixed waveform generation module includes: a plurality of single-frequency waveform generation modules with adjustable amplitude, frequency and phase.

Preferably, the single-frequency waveform generation module includes: a DDS unit and a DSP multiplication unit.

Preferably, the DDS unit includes: a phase accumulator, a phase adder and a phase-amplitude look-up table.

To sum up, the present application discloses a mixed signal generator, comprising: a clock management module, a bus control module, a waveform data storage module and a mixed signal generation module, wherein: the clock management module is respectively connected with the bus control module and the mixed signal to generate The module is connected to receive the reference clock to generate the high-speed clock and working clock of the mixed signal generation module, as well as the working clock required by the bus control module and the waveform data storage module; the bus control module is respectively connected with the host computer and the mixed signal generation module. It is used for communication between the host computer and the mixed signal generation module, and analyzes and processes the instructions, addresses and waveform data sent by the host computer to the mixed signal generation module in real time; the waveform data storage module is connected to the bus control module and is used to store waveform signals. The mixed signal generating module is connected with the waveform data storage module, and is used for outputting the mixed signal based on the data information of the waveform signal stored in the waveform data storage module. It can use the parameters of fixed storage space to describe the waveform, decode the waveform data in real time to generate a mixed waveform, and then output the mixed signal, which can compress the space required for storing the corresponding digital waveform, and avoid the limitation of the waveform length when the arbitrary waveform generator outputs as much as possible. on storage capacity issues.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.

FIG. 1 is a schematic structural diagram of Embodiment 1 of a mixed signal generator disclosed in the application;

2 is a schematic structural diagram of Embodiment 2 of a mixed signal generator disclosed in the application;

3 is a schematic structural diagram of a mixed signal generating module disclosed in the present application;

4 is a schematic diagram of a waveform data word of a single-frequency waveform disclosed in the application;

5 is a schematic structural diagram of a single-frequency waveform generation module disclosed in the application;

6 is a schematic structural diagram of a single-frequency waveform generation sub-module disclosed in the application;

FIG. 7 is a schematic diagram illustrating the phase-amplitude look-up table disclosed in the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

As shown in FIG. 1 , which is a schematic structural diagram of Embodiment 1 of a mixed signal generator disclosed in this application, the mixed signal generator may include a clock management module, a bus control module, a waveform data storage module and a mixed signal generation module, wherein :

The clock management module is respectively connected with the bus control module and the mixed signal generation module, and is used to receive the reference clock, generate the high-speed clock and the working clock of the mixed signal generation module, and the working clock required by the bus control module and the waveform data storage module;

The bus control module is respectively connected with the host computer and the mixed signal generation module, and is used for the communication between the host computer and the mixed signal generation module, and analyzes and processes the instructions, addresses and waveform data sent by the host computer to the mixed signal generation module in real time;

The waveform data storage module is connected with the bus control module, and is used for storing the data information of the waveform signal;

The mixed signal generating module is connected with the waveform data storage module, and is used for outputting the mixed signal based on the data information of the waveform signal stored in the waveform data storage module.

The working principle of the mixed signal generator disclosed in the above embodiment is:

In the initial state of step (1), the mixed signal generator does not perform any operation in this state, and waits for the host computer to send an instruction to enter step (2), otherwise stay in step (1);

Step (2) Accept the control command sent by the host computer, enter the command judgment, if it is judged to be an incorrect command, return to step (1), judge that it is a waveform data write command, enter step (3), and judge that it is a playback preset command. Then enter step (4), judge to play waveform then enter step (5);

Step (3) writes the waveform data received from the host computer into the waveform data storage module 13, after the writing is completed, the data is read back for inspection, if the inspection result is correct, then return to step (1), if wrong, then Enter step (3) again;

Step (4) carries out the preset of playing, is divided into two parts, one is to select trigger mode or continuous play mode, the two is the setting of the segment of stored data in the waveform data storage module 13, the waveform data decoding mode;

Step (5) playback starts, the process will automatically read the playback preset in step (4), and then read the stored data written in step (3) according to the decoding method in the preset, and generate in real time. The digital waveform is passed through the mixed signal generating module 14 to output the mixed signal. During the playback process, if a new command is entered or the playback content has been played, it will return to step (1).

To sum up, in the above-mentioned embodiment, the parameters of the fixed storage space can be used to describe the waveform, the waveform data can be decoded in real time to generate a mixed waveform, and then the mixed signal can be output, which can compress the space required for storing the corresponding digital waveform, as much as possible. Avoid the problem that the waveform length is limited by the storage capacity when the arbitrary waveform generator outputs.

As shown in FIG. 2, which is a schematic structural diagram of Embodiment 2 of a mixed signal generator disclosed in the application, the mixed signal generator may include a clock management module, a bus control module, a waveform data storage module and a mixed signal generation module, wherein : The mixed signal generation module includes: a mixed waveform generation module and a high-speed digital-to-analog conversion module; the high-speed digital-to-analog conversion module includes: a parallel-to-serial conversion module and a digital-to-analog converter, wherein:

The clock management module is respectively connected with the bus control module and the mixed signal generation module, and is used to receive the reference clock, generate the high-speed clock and the working clock of the mixed signal generation module, and the working clock required by the bus control module and the waveform data storage module;

The bus control module is respectively connected with the host computer and the mixed signal generation module, and is used for the communication between the host computer and the mixed signal generation module, and analyzes and processes the instructions, addresses and waveform data sent by the host computer to the mixed signal generation module in real time;

The waveform data storage module is connected with the bus control module, and is used for storing the data information of the waveform signal;

The mixed signal generating module is connected with the waveform data storage module, and is used for outputting the mixed signal based on the data information of the waveform signal stored in the waveform data storage module;

The mixed waveform generation module is connected with the bus control module, the waveform data storage module and the high-speed digital-to-analog conversion module, and is used for decoding the data information of the waveform signal stored in the waveform data storage module to generate the waveform of the mixed signal in real time;

A high-speed digital-to-analog conversion module is used to output the mixed signal based on the waveform of the mixed signal generated by the mixed waveform generation module;

Parallel-to-serial conversion module, used to encode the waveform of the mixed signal to a higher frequency and send it to the digital-to-analog converter;

A digital-to-analog converter for outputting a mixed signal based on the waveform of the received mixed signal.

Specifically, in the above embodiment, the bus control module may be: a USB bus control module, a PCI bus control module, a PXI bus control module or a network port bus control module, and the like.

Specifically, one of the structural diagrams of the mixed-signal generation module in the above embodiment is shown in FIG. 3 . Taking Virtex-7FPGA as an example, the frequency of the system operating clock is limited to within 400MHz. When the DAC sampling rate reaches GHz, The waveform data generated under the FPGA system clock needs to be converted from parallel to serial, encoded to a higher frequency, and then transmitted to the DAC.

The mixed-signal generation module is the core technology of the present application. As shown in Figure 3, multiple single-frequency waveform generation modules with adjustable amplitude, frequency, and phase are used to generate single-frequency waveforms in real time, and add them to generate a mixture of multiple frequency components. The generated digital waveform is encoded to a higher frequency by the parallel-serial conversion module and sent to the DAC, and then the DAC outputs the mixed signal.

The parameters L, N, K in the figure, L is the number of frequency components, N is the resolution of the DAC, and K is the ratio of the sampling rate of the DAC to the system operating clock. For the parallel-to-serial conversion module, K or K/2 is its conversion ratio, and the DAC architecture needs to be considered. When the DAC uses the alternate sampling method to obtain waveform data (such as AD9129), there will be two sets of N bit data inputs. It is the parallel-to-serial conversion ratio of K/2; when the DAC has only one set of N-bit data input (such as AD9139, AD9161/2), the parallel-to-serial conversion ratio of K is used at this time. In the implementation of the present invention, AD9129 is used as the DAC, and the three parameters are set as: L is 4, N is 14, K is 16, and the parallel-to-serial conversion ratio is 8. In this application, the frequency of the high-speed clock is 700MHz, and the frequency of the system clock is 175MHz.

Specifically, in the above-mentioned embodiment, the schematic diagram of the waveform data word of the single-frequency waveform is shown in FIG. 4 . For a single frequency component, its valid information is: amplitude, frequency, initial phase, and playback time, wherein the amplitude, frequency and The initial phase is the waveform shape parameter, and the playback time is the waveform length parameter. These four parameters can completely describe a sine wave waveform. The waveform data word of the single-frequency waveform is shown in Figure 4. Each frequency component occupies 128bit (ie 16B) of data: 16bit amplitude, 32bit frequency and initial phase, and the range of frequency and initial phase is 0 to 2π represented by 32bit , used for the generation of the sine wave waveform within the playback time; the lowest bit of the 48bit playback time corresponds to one clock cycle of the DAC sampling clock, which is 357ps in the implementation of the present invention, so the maximum playback time can reach 256T DAC sampling clocks The clock cycle is 27 hours and 54 minutes.

Specifically, in the above-mentioned embodiment, the structure diagram of the single-frequency waveform generation module is shown in Figure 5, and the data rate of the DAC is the DAC sampling rate × N bit. Obviously, in the application of high-speed DAC, the system clock within 400MHz One clock cycle generates only one N bit of data, which cannot meet the data rate requirement of the DAC. Therefore, it is necessary to generate K×N bits of data at the same time in one system clock cycle. Through the parallel processing of K single-frequency waveform generating sub-modules, one clock cycle generates K×N bit data.

Specifically, in the above embodiment, the structure diagram of the single-frequency waveform generation sub-module is shown in FIG. 6 . In the generated waveform data, the playback time parameter controls the time when three parameters of amplitude, frequency and initial phase take effect. These three parameters The parameters only need to pass through the pipelined DDS unit and DSP multiplication unit to obtain K N-bit digital waveforms. The functions of the two modules are: the DDS unit uses the frequency and phase to generate the DDS waveform; the multiplication unit uses the DSP to multiply the DDS waveform and the amplitude control word to achieve adjustable amplitude and truncate the output digital waveform to match the DAC. number of digits.

Specifically, as shown in FIG. 7 , which is an illustration of the phase-amplitude look-up table disclosed in the application, inside the DDS unit, it is divided into three parts: a phase accumulator, a phase adder, and a phase-amplitude look-up table. The three parts work together to realize the frequency , Real-time transformation from initial phase to sinusoidal waveform. The phase accumulator accumulates the frequency control word to generate the accumulated result of the frequency; the phase adder adds the accumulated result of the frequency and the initial phase to generate the current phase; as shown in Figure 7, the phase-amplitude lookup table is Transform the current phase to obtain the amplitude value of the sine function corresponding to the current phase, and the current phase is accumulated in each clock cycle, and the obtained amplitude also corresponds to a sine function curve. In addition, it should be noted that the sine function used in the above-mentioned phase-amplitude look-up table is only one of the implementation manners of the present application, and the phase-amplitude look-up table may also be in other functional forms, for example, the truncated logarithm and Exponential function, Gaussian white noise function, triangle wave, sawtooth wave, etc. That is, the implementation of the phase-amplitude lookup table is not limited to the mixed output of multiple adjustable and rapidly switchable sine waves.

In summary, this application implements a mixed signal generator on Virtex-7FPGA and AD9129, which can be applied in nuclear magnetic, radar, electrical impedance imaging, quantum computing and other occasions. In this application, through the high performance and parallel processing mode of Virtex-7FPGA, the high resolution and high sampling rate of AD9129 high-speed DAC, the amplitude, frequency, phase and playback time of frequency components can be generated in real time, and the mixed waveform can be adjusted and output. Get a mixed signal.

Compared with the usual arbitrary waveform generator, the real-time waveform generation mechanism and the parameters of the fixed storage space can compress the space required to store the corresponding digital waveform in general. In the implementation of this application, a mixture of 4 frequency components is used. Signal, under 48bit playback time, 64B storage space can generate up to 448TB of data, that is, 256T samples, which can be played for 27 hours and 54 minutes. Good scalability, the increase in the number of frequency components of mixed signals and the increase in the number of bits of waveform data words can be achieved through the flexibility of FPGA reconfigurable configuration. The amplitude, frequency, phase and playback time of frequency components can be adjusted. The switching speed of frequency components is fast, and the minimum update interval is in the sub-ns order. The frequency component update minimum interval is the clock cycle of the system clock, which is 357ps in the implementation of the present invention. The frequency components have high frequency resolution and wide frequency modulation bandwidth.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments can be referred to each other. As for the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant part can be referred to the description of the method.

Professionals may further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two, in order to clearly illustrate the possibilities of hardware and software. Interchangeability, the above description has generally described the components and steps of each example in terms of functionality. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

The steps of a method or algorithm described in conjunction with the embodiments disclosed herein may be directly implemented in hardware, a software module executed by a processor, or a combination of the two. A software module can be placed in random access memory (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other in the technical field. in any other known form of storage medium.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, this application is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (6)

1. a mixed signal generator, is characterized in that, comprises: clock management module, bus control module, waveform data storage module and mixed signal generation module, wherein: The clock management module is respectively connected with the bus control module and the mixed signal generation module, and is used for receiving a reference clock, generating a high-speed clock and a working clock of the mixed signal generation module, as well as the bus control module and the waveform data. The working clock required by the memory module; The bus control module is respectively connected with the host computer and the mixed signal generation module, and is used for the communication between the host computer and the mixed signal generation module, and analyzes and processes the instructions and addresses sent by the host computer to the mixed signal generation module in real time. and waveform data; The waveform data storage module is connected to the bus control module, and is used for storing data information of the waveform signal; The mixed signal generating module is connected to the waveform data storage module, and is configured to output a mixed signal based on the data information of the waveform signal stored in the waveform data storage module; Wherein, the mixed signal generation module includes: a mixed waveform generation module and a high-speed digital-to-analog conversion module, wherein: The mixed waveform generation module is connected with the bus control module, the waveform data storage module and the high-speed digital-to-analog conversion module, and is used for decoding the data information of the waveform signal stored in the waveform data storage module to generate the mixed signal in real time. waveform; The high-speed digital-to-analog conversion module is configured to output the mixed signal based on the waveform of the mixed signal generated by the mixed waveform generation module. 2. The mixed-signal generator according to claim 1, wherein the high-speed digital-to-analog conversion module comprises: a parallel-to-serial conversion module and a digital-to-analog converter, wherein: the parallel-serial conversion module, for encoding the waveform of the mixed signal to a higher frequency and sending it to the digital-to-analog converter; The digital-to-analog converter is configured to output a mixed signal based on the received waveform of the mixed signal. 3 . The mixed signal generator according to claim 2 , wherein the waveform data storage module is a data storage module based on the internal BRAM of the FPGA and the external DDR3. 4 . 4 . The mixed signal generator according to claim 3 , wherein the mixed waveform generation module comprises: a plurality of single frequency waveform generation modules with adjustable amplitude, frequency and phase. 5 . 5 . The mixed signal generator according to claim 4 , wherein the single-frequency waveform generation module comprises: a DDS unit and a DSP multiplication unit. 6 . 6. The mixed signal generator according to claim 5, wherein the DDS unit comprises: a phase accumulator, a phase adder and a phase-amplitude lookup table.

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