CN108768389B - Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop - Google Patents
Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop Download PDFInfo
- Publication number
- CN108768389B CN108768389B CN201810388303.3A CN201810388303A CN108768389B CN 108768389 B CN108768389 B CN 108768389B CN 201810388303 A CN201810388303 A CN 201810388303A CN 108768389 B CN108768389 B CN 108768389B
- Authority
- CN
- China
- Prior art keywords
- frequency band
- frequency
- controlled oscillator
- phase
- locked loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
本发明涉及一种用于锁相环中的多频带两级环形振荡器，属于集成电路设计领域。本发明提出的环形振荡器由两级延迟单元构成，利用额外的锁存器增加延迟来维持振荡，由尾电流源控制振荡频率。相比于一般结构，本发明通过额外增加一组开关，增加了(2n‑1)条频带(n为开关级数)。增加的频带能够更好适应工艺偏差、电源、温度的变化，使得锁相环总能锁定到所需的频点。开关控制信号可由额外数字电路(例如频率自动校准电路)提供。
The invention relates to a multi-band two-stage ring oscillator used in a phase-locked loop, and belongs to the field of integrated circuit design. The ring oscillator proposed by the present invention is composed of two-stage delay units, additional latches are used to increase the delay to maintain oscillation, and the oscillation frequency is controlled by a tail current source. Compared with the general structure, the present invention increases ( 2n -1) frequency bands (n is the number of switch stages) by adding an additional set of switches. The increased frequency band can better adapt to changes in process deviation, power supply, and temperature, so that the phase-locked loop can always lock to the required frequency point. The switch control signals may be provided by additional digital circuits such as frequency auto-calibration circuits.
Description
技术领域technical field
本发明属于集成电路设计技术领域，特别涉及一种用于锁相环中的多频带两级环形压控振荡器。The invention belongs to the technical field of integrated circuit design, in particular to a multi-band two-stage ring voltage-controlled oscillator used in a phase-locked loop.
背景技术Background technique
环形压控振荡器(Ring Voltage-controlled Oscillator，Ring VCO)相比电感-电容振荡器可以节省大量芯片面积，从而实现低代价的振荡器，因此在集成电路中具有广泛的应用。Compared with the inductor-capacitor oscillator, a Ring Voltage-controlled Oscillator (Ring VCO) can save a lot of chip area, thereby realizing a low-cost oscillator, and thus has a wide range of applications in integrated circuits.
图1是两级环形压控振荡器原理图，图2为其晶体管级电路图。一般的两级振荡器无法振荡，这里通过增加一组锁存器，引入额外的延迟时间，可以实现两级环形振荡器的振荡，减少级数的好处是节省功耗和面积，同时还能降低相位噪声。该VCO为电流饥饿型工作模式，由尾电流源控制VCO的振荡频率。尾电流源分为固定电流源和细调电流源，引入固定电流源可以降低VCO的增益，有利于减小锁相环输出的杂散功率。细调电流源的控制电压由前级电荷泵输出经过低通滤波器得到，实现对VCO振荡频率的精确控制。Ring-VCO输出频率会随工艺、电源电压、温度(PVT)等显著变化，因此单一频带的Ring-VCO可能会出现频率偏移，导致锁相环无法锁定。为此，需要VCO能够输出多个频带，尤其在多频点的锁相环应用中。Figure 1 is a schematic diagram of a two-stage ring voltage-controlled oscillator, and Figure 2 is a transistor-level circuit diagram. A general two-stage oscillator cannot oscillate. Here, by adding a set of latches and introducing additional delay time, the two-stage ring oscillator can be oscillated. The advantage of reducing the number of stages is to save power consumption and area, and at the same time reduce the phase noise. The VCO operates in a current starvation mode, and the oscillation frequency of the VCO is controlled by a tail current source. The tail current source is divided into a fixed current source and a fine-tuned current source. The introduction of a fixed current source can reduce the gain of the VCO, which is beneficial to reduce the stray power output by the phase-locked loop. The control voltage of the fine-tuned current source is obtained by the output of the front-stage charge pump through a low-pass filter, so as to realize the precise control of the oscillation frequency of the VCO. The output frequency of the Ring-VCO varies significantly with process, power supply voltage, temperature (PVT), etc. Therefore, the Ring-VCO of a single frequency band may have a frequency offset, which will cause the phase-locked loop to fail to lock. For this reason, the VCO is required to be able to output multiple frequency bands, especially in multi-frequency PLL applications.
发明内容SUMMARY OF THE INVENTION
为了克服上述现有技术的缺点，本发明的目的在于提供一种用于锁相环中的多频带两级环形压控振荡器。In order to overcome the above disadvantages of the prior art, the purpose of the present invention is to provide a multi-band two-stage ring voltage controlled oscillator used in a phase locked loop.
为了实现上述目的，本发明采用的技术方案是：In order to achieve the above object, the technical scheme adopted in the present invention is:
一种用于锁相环中的多频带两级环形压控振荡器，在两级环形压控振荡器的控制电压Vctrl和固定偏置电压VB上同时接入用于控制灌入VCO的电流的一组频带控制信号，所述频带控制信号有多位，每位频带控制信号均由独立的MOS开关管控制，每种频带控制信号组合对应一个频带，通过频带控制信号组合使两级环形压控振荡器工作在具体某一频带上，再由Vctrl对两级环形压控振荡器的振荡频率进行精确控制。A multi-band two-stage ring voltage-controlled oscillator used in a phase-locked loop, the control voltage V ctrl and the fixed bias voltage VB of the two-stage ring voltage-controlled oscillator are simultaneously connected to control the current flowing into the VCO A set of frequency band control signals, the frequency band control signals have multiple bits, each frequency band control signal is controlled by an independent MOS switch, each combination of frequency band control signals corresponds to a frequency band, and the two-stage ring pressure is made by the combination of frequency band control signals. The controlled oscillator works on a specific frequency band, and then the oscillation frequency of the two-stage ring voltage controlled oscillator is precisely controlled by V ctrl .
所述频带控制信号由外部数字电路(如频率自动校准电路)给出。The frequency band control signal is given by an external digital circuit (such as a frequency automatic calibration circuit).
所述频带控制信号为二进制编码，每一位频带控制信号对应一个开关管，二进制编码从低位到高位所对应的开关尺寸逐位成倍增大。The frequency band control signal is a binary code, each bit of the frequency band control signal corresponds to a switch, and the size of the switch corresponding to the binary code from low to high is doubled bit by bit.
所述频带控制信号组合共有(2n-1)种，即，共增加了(2n-1)条频带，其中n为开关级数。There are (2 n -1) types of frequency band control signal combinations, that is, (2 n -1) frequency bands are added in total, where n is the number of switching stages.
与现有技术相比，本发明的有益效果是通过使用简单的开关管实现VCO多个频带，开关管尺寸都不会很大，在输出端引入的相位噪声较小。Compared with the prior art, the beneficial effect of the present invention is that multiple frequency bands of the VCO can be realized by using a simple switch tube, the size of the switch tube will not be large, and the phase noise introduced at the output end is small.
附图说明Description of drawings
图1是单频带两级压控振荡器原理图。Figure 1 is a schematic diagram of a single-band two-stage voltage-controlled oscillator.
图2是单频带两级压控振荡器电路图。Figure 2 is a circuit diagram of a single-band two-stage voltage-controlled oscillator.
图3是多频带两级压控振荡器电路图。Figure 3 is a circuit diagram of a multi-band two-stage voltage-controlled oscillator.
图4是一种自动频率控制电路。Figure 4 is an automatic frequency control circuit.
具体实施方式Detailed ways
下面结合附图，对优选实施例作详细说明。应该强调的是，下述说明仅仅是示例性的，而不是为了限制本发明的范围及其应用。The preferred embodiments will be described in detail below with reference to the accompanying drawings. It should be emphasized that the following description is exemplary only, and is not intended to limit the scope of the invention and its application.
本发明采用开关管控制的一种具有多个频带的两级Ring-VCO，环形振荡器由两级延迟单元构成，利用额外的锁存器增加延迟来维持振荡，由尾电流源控制振荡频率。电路图如图3所示，Vctrl为VCO控制电压，控制VCO振荡频率；VB为固定偏置电压，提升振荡频率的同时保持振荡器的增益KVCO不会太大以抑制锁相环参考杂散；在此之外，加了一组开关给振荡器注入额外电流，来提升振荡频率。图中S0、S1……为频带控制信号，控制灌入VCO的电流，进而控制VCO的振荡频率；每位频带控制信号均由独立的MOS开关管控制，每种频带控制信号组合对应一个频带，每种组合对应的电流源开关也相当于粗调电流源，使VCO工作在具体某一频带上，再由Vctrl对VCO振荡频率进行精确控制。The present invention adopts a two-stage Ring-VCO with multiple frequency bands controlled by a switch tube. The ring oscillator is composed of two-stage delay units. Additional latches are used to increase delay to maintain oscillation, and the oscillation frequency is controlled by a tail current source. The circuit diagram is shown in Figure 3, Vctrl is the VCO control voltage, which controls the VCO oscillation frequency; VB is a fixed bias voltage, which increases the oscillation frequency while keeping the oscillator gain KVCO not too large to suppress the phase-locked loop reference spurs; In addition, a set of switches was added to inject additional current into the oscillator to increase the oscillation frequency. In the figure, S0, S1... are the frequency band control signals, which control the current injected into the VCO, and then control the oscillation frequency of the VCO; each frequency band control signal is controlled by an independent MOS switch tube, and each frequency band control signal combination corresponds to a frequency band, The current source switch corresponding to each combination is also equivalent to a rough adjustment of the current source, so that the VCO works in a specific frequency band, and then the VCO oscillation frequency is precisely controlled by V ctrl .
其中，频带控制信号由外部数字电路给出，采用二进制编码，所以开关尺寸应逐级成倍增大。相比于一般结构，本发明通过增加一组开关，每一组开关组合控制码对应一条频带，共增加了(2n-1)条频带(n为开关级数)。增加的频带能够更好适应工艺偏差、电源、温度的变化，使得锁相环总能锁定到所需的频点。Among them, the frequency band control signal is given by the external digital circuit and uses binary coding, so the size of the switch should be doubled step by step. Compared with the general structure, the present invention adds (2n-1) frequency bands (n is the number of switch stages) by adding a group of switches, and each group of switch combination control codes corresponds to a frequency band. The increased frequency band can better adapt to changes in process deviation, power supply, and temperature, so that the phase-locked loop can always lock to the required frequency point.
图4给出了提供频带控制信号的一种方式，频带控制信号通过AFC给出，AFC工作时需要先进行复位，例如复位为000…，同时VCO控制电压与电荷泵输出断开，固定在一定值(一般取电源电压一半)，由此得到VCO子频带的中间频率，经分频器分频后和参考频率进行比对，找到最合适的频带，并产生对应的控制码值，提供给VCO的S0、S1…控制端，然后AFC电路保持该控制码不变，同时将电荷泵的输出电压接回到环路中，PLL正式开始工作，PLL环路将调节Vctrl电压，以使VCO工作在更准确的频率上。Figure 4 shows a way to provide the frequency band control signal. The frequency band control signal is given by the AFC. When the AFC is working, it needs to be reset first, for example, reset to 000.... At the same time, the VCO control voltage is disconnected from the charge pump output and fixed at a certain value. value (usually half of the power supply voltage), from which the intermediate frequency of the VCO sub-band is obtained. After frequency division by the frequency divider, it is compared with the reference frequency to find the most suitable frequency band, and the corresponding control code value is generated, which is provided to the VCO The S0, S1... control terminals of the AFC circuit, and then the AFC circuit keeps the control code unchanged, and at the same time connects the output voltage of the charge pump back to the loop, the PLL officially starts to work, and the PLL loop will adjust the Vctrl voltage to make the VCO work at more accurate frequency.
以上所述，仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。The above description is only a preferred embodiment of the present invention, but the protection scope of the present invention is not limited to this. Substitutions should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims (5)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810388303.3A CN108768389B (en) | 2018-04-26 | 2018-04-26 | Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810388303.3A CN108768389B (en) | 2018-04-26 | 2018-04-26 | Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108768389A CN108768389A (en) | 2018-11-06 |
| CN108768389B true CN108768389B (en) | 2020-06-05 |
Family
ID=64012059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810388303.3A Active CN108768389B (en) | 2018-04-26 | 2018-04-26 | Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108768389B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113037218B (en) * | 2021-03-19 | 2024-12-03 | 清华大学 | A voltage controlled oscillator |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09246865A (en) * | 1996-03-14 | 1997-09-19 | Nippon Telegr & Teleph Corp <Ntt> | Voltage controlled quadrature oscillator |
| US5686867A (en) * | 1995-06-22 | 1997-11-11 | Marvell Semiconductor, Inc. | Regulated supply for voltage controlled oscillator |
| CN101136630A (en) * | 2006-08-30 | 2008-03-05 | 上海华虹Nec电子有限公司 | Frequency synthesizer |
| CN102843131A (en) * | 2011-06-21 | 2012-12-26 | 中国科学院微电子研究所 | Annular voltage-controlled oscillator |
| CN103117706A (en) * | 2013-02-03 | 2013-05-22 | 南京邮电大学 | High-tuning-linearity wide-tuning-range voltage-controlled ring oscillator |
| CN104300972A (en) * | 2014-09-30 | 2015-01-21 | 杭州电子科技大学 | A Ring Voltage Controlled Oscillator Circuit Combining Coarse Tuning and Fine Tuning |
| CN104753496A (en) * | 2015-04-09 | 2015-07-01 | 西安电子科技大学 | Frequency band self-tuning three-level complex band-pass filter |
| JP5783098B2 (en) * | 2012-03-19 | 2015-09-24 | 富士通株式会社 | PLL circuit, control method of PLL circuit, and digital circuit |
| CN105515576A (en) * | 2015-12-18 | 2016-04-20 | 河北新华北集成电路有限公司 | Ring voltage-controlled oscillator with coarse tuning and fine tuning, and phase-locked loop |
| CN107743025A (en) * | 2017-11-27 | 2018-02-27 | 常州欣盛微结构电子有限公司 | A kind of ultralow pressure two-stage annular voltage controlled oscillator for chip circuit |
| CN208797912U (en) * | 2018-08-14 | 2019-04-26 | 武汉芯泰科技有限公司 | A kind of low phase noise broadband circular type shaker |
-
2018
- 2018-04-26 CN CN201810388303.3A patent/CN108768389B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5686867A (en) * | 1995-06-22 | 1997-11-11 | Marvell Semiconductor, Inc. | Regulated supply for voltage controlled oscillator |
| JPH09246865A (en) * | 1996-03-14 | 1997-09-19 | Nippon Telegr & Teleph Corp <Ntt> | Voltage controlled quadrature oscillator |
| CN101136630A (en) * | 2006-08-30 | 2008-03-05 | 上海华虹Nec电子有限公司 | Frequency synthesizer |
| CN102843131A (en) * | 2011-06-21 | 2012-12-26 | 中国科学院微电子研究所 | Annular voltage-controlled oscillator |
| JP5783098B2 (en) * | 2012-03-19 | 2015-09-24 | 富士通株式会社 | PLL circuit, control method of PLL circuit, and digital circuit |
| CN103117706A (en) * | 2013-02-03 | 2013-05-22 | 南京邮电大学 | High-tuning-linearity wide-tuning-range voltage-controlled ring oscillator |
| CN104300972A (en) * | 2014-09-30 | 2015-01-21 | 杭州电子科技大学 | A Ring Voltage Controlled Oscillator Circuit Combining Coarse Tuning and Fine Tuning |
| CN104753496A (en) * | 2015-04-09 | 2015-07-01 | 西安电子科技大学 | Frequency band self-tuning three-level complex band-pass filter |
| CN105515576A (en) * | 2015-12-18 | 2016-04-20 | 河北新华北集成电路有限公司 | Ring voltage-controlled oscillator with coarse tuning and fine tuning, and phase-locked loop |
| CN107743025A (en) * | 2017-11-27 | 2018-02-27 | 常州欣盛微结构电子有限公司 | A kind of ultralow pressure two-stage annular voltage controlled oscillator for chip circuit |
| CN208797912U (en) * | 2018-08-14 | 2019-04-26 | 武汉芯泰科技有限公司 | A kind of low phase noise broadband circular type shaker |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108768389A (en) | 2018-11-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8145171B2 (en) | Clock clean-up phase-locked loop (PLL) | |
| CN110445491B (en) | A Phase Locked Loop Based on Preset Frequency and Dynamic Loop Bandwidth | |
| CN212231423U (en) | Phase frequency detector and phase-locked loop circuit | |
| CN102332915A (en) | A Subharmonic Injection Locked Voltage Controlled Oscillator with Wide Locking Range | |
| CN112242841B (en) | A Phase-Locked Loop Circuit with High Power Supply Noise Rejection Ratio | |
| Chen et al. | A 0.18-$\mu $ m CMOS Dual-Band Frequency Synthesizer With Spur Reduction Calibration | |
| Huang et al. | An 82–107.6-GHz Integer-$ N $ ADPLL Employing a DCO With Split Transformer and Dual-Path Switched-Capacitor Ladder and a Clock-Skew-Sampling Delta–Sigma TDC | |
| Huang et al. | Low-noise fractional-N PLL with a high-precision phase control in the phase synchronization of multichips | |
| CN108768389B (en) | Multi-band two-stage annular voltage-controlled oscillator for phase-locked loop | |
| US9088285B2 (en) | Dynamic divider having interlocking circuit | |
| CN112234981A (en) | Data and Clock Recovery Circuitry | |
| CN103916124B (en) | A kind of injection locking frequency dividing structure of band automatic frequency verifying function | |
| US9385688B2 (en) | Filter auto-calibration using multi-clock generator | |
| Kharalkar et al. | A compact, low-phase noise fractional-N PLL for global navigation receiver | |
| CN106961273B (en) | Charge pump circuit based on stable anti-creeping protection and current sink control technology | |
| Wang et al. | A 3.37-7.18 GHz Wideband PLL with Multi-core VCO in 180-nm CMOS | |
| CN113541683B (en) | A Phase-Locked Loop Automatic Frequency Calibrator Based on Programmable Three-Frequency Divider | |
| CN112953528B (en) | High-frequency broadband high-precision phase-locked loop performance enhancement technology | |
| CN212258936U (en) | Phase frequency detector, charge pump and phase-locked loop circuit | |
| Qin et al. | Low noise frequency synthesizer with self-calibrated voltage controlled oscillator and accurate AFC algorithm | |
| CN112882529B (en) | Swing detection circuit with DC offset elimination function | |
| Benabdeljelil et al. | Comparison between RTW VCO and LC QVC 12 GHz PLLs | |
| Huang et al. | A 2.4-GHz fractional-N PLL frequency synthesizer with a low power full-modulus-range programmable frequency divider | |
| Wang et al. | A 100 MHz–3.2 GHz 5.1 mW area-efficient PLL clock generator | |
| Li et al. | A fast-settling fractional-N PLL with presetting frequency and dynamic bandwidth control |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |