[go: up one dir, main page]

CN108880298B - PFC circuit with variable output voltage - Google Patents

PFC circuit with variable output voltage Download PDF

Info

Publication number
CN108880298B
CN108880298B CN201810756386.7A CN201810756386A CN108880298B CN 108880298 B CN108880298 B CN 108880298B CN 201810756386 A CN201810756386 A CN 201810756386A CN 108880298 B CN108880298 B CN 108880298B
Authority
CN
China
Prior art keywords
resistor
output
network
input
input voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810756386.7A
Other languages
Chinese (zh)
Other versions
CN108880298A (en
Inventor
何垒
刘湘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mornsun Guangzhou Science and Technology Ltd
Original Assignee
Mornsun Guangzhou Science and Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mornsun Guangzhou Science and Technology Ltd filed Critical Mornsun Guangzhou Science and Technology Ltd
Priority to CN201810756386.7A priority Critical patent/CN108880298B/en
Publication of CN108880298A publication Critical patent/CN108880298A/en
Application granted granted Critical
Publication of CN108880298B publication Critical patent/CN108880298B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4258—Arrangements for improving power factor of AC input using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The invention provides a PFC circuit with variable output voltage, which comprises a rectifying network 101, a BOOST converter 102, an output voltage sampling network 106,The output voltage of the BOOST converter of the present invention is a variable output voltage, which controls the IC and the input voltage comparison network 107. The AC input voltage is detected by the input voltage comparison network 107, and when the input voltage is lower, the output voltage of the BOOST converter is VO1When the input voltage is higher, the output voltage of the BOOST converter is VO2。

Description

PFC circuit with variable output voltage
Technical Field
The present invention relates to the field of switching converters, and in particular to active power factor corrected AC-DC converters.
Background
With the rapid development of modern industry, the nonlinear load of the power system is increasing. Harmonic current generated by the nonlinear loads is injected into a power grid, so that the voltage waveform of the public power grid is distorted, the environment of the power grid is seriously polluted, and the safe operation of various electrical equipment in the power grid is threatened. In order to eliminate or minimize the hazards of grid harmonics, it is often desirable to limit the harmonics generated by the equipment, and therefore the power factor. At present, the switching power supplies with the consumption power more than 75W all have power factor requirements, namely the working current waveform of the circuit is required to be basically the same as the voltage waveform.
To reduce and eliminate harmonics, Power Factor Correction (PFC) should be performed to improve the power factor of the device. Currently, the mainstream power factor correction technology is mainly classified into a passive correction technology (hereinafter referred to as passive PFC) and an active correction technology (hereinafter referred to as active PFC). The passive PFC technology is to filter partial order harmonic waves by using a network consisting of passive devices such as an inductor and a capacitor; in the active PFC technology, a first-stage power conversion structure is added between a rectifier circuit and a load through a switching device (such as a MOSFET, a power diode, or the like), so that the phase of an input current tracks the phase of an input voltage. The passive PFC circuit has the advantages of simplicity, low cost and good reliability, but has poor correction effect, difficulty in obtaining high power factor, large volume and small use at present. The active PFC circuit has a small size, can obtain a very high power factor and a very low current harmonic distortion, and is widely used in various switching power supplies at present.
The BOOST topology is usually selected to be implemented in the existing active PFC circuit. For example, the critical mode active BOOST _ PFC is shown in fig. 1. An active BOOST _ PFC circuit for a conventional regulated output generally includes a rectifying network 101, a BOOST converter 102, a zero-crossing detection network 103, a current sampling network 104, a driving network 105, an output voltage sampling network 106, and a PFC control chip IC.
PFC control IC pin functions are generally as follows:
ZCD: a zero current detection pin;
MULT is the input pin of the multiplier inside the chip;
VCC is the power supply pin of the chip;
GND is a reference ground pin of the chip;
COMP is a compensation pin of the chip voltage ring;
INV is a feedback pin for outputting voltage;
GATE is a driving pin of the chip;
CS: a current sampling pin.
The circuit scheme passes through a reference voltage V of an INV pinrefThe output voltage of the BOOST converter is stabilized at a fixed voltage value by the output voltage sampling network 106, the inductive current is detected by the zero-crossing detection network 103, when the inductive current is equal to zero, a GATE pin of the control chip outputs a high level, the switching tube is conducted, the voltage on the sampling resistor R2 of the current sampling network 104 is compared with a half-sine signal output by a multiplier inside the control chip, so that the input current is basically in the same phase with the input voltage, and a higher power factor value is obtained.
The prior art active BOOST _ PFC technique shown in fig. 1 is characterized by boosting the ac input voltage through the BOOST converter to a fixed voltage level, typically up to 400V and above. However, when a wide voltage range input is realized, especially when the input voltage is at a low voltage (such as 85VAC), the prior art scheme has the disadvantages of large magnetic core volume, low efficiency, reduced overall reliability of the power supply and influenced service life of the power supply.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the PFC circuit, so that the output voltage of the BOOST is variable. The input voltage is detected by the input voltage comparison network 107, and when the input voltage is lower, the output voltage of the BOOST converter is VO1When the input voltage is higher, the output voltage of the BOOST converter is VO2And V isO1＜VO2。
The PFC circuit with variable output voltage comprises a rectification network 101 and a BOOST converter 102, output voltage sampling network 106 and control IC, input end of rectifying network 101 is connected with AC input voltage VinThe output positive terminal and the output negative terminal of the rectifier network 101 are respectively connected to two input terminals of the BOOST converter 102, and the output terminal of the BOOST converter 102 is the output positive terminal VOAnd an output GND, the output voltage sampling network 106 is connected to the output positive terminal VOAnd the output GND, the control IC controls the on and off of a switch tube in the BOOST converter 102;
the voltage regulator further comprises an input voltage comparison network 107, wherein a first input end of the input voltage comparison network 107 is connected with an output positive end of the rectification network 101, a second input end of the input voltage comparison network 107 is connected with a sampling voltage of the output voltage sampling network 106 and an output voltage feedback pin INV of the control IC, a power supply end of the input voltage comparison network 107 is connected with a power supply voltage VCC, and an output end of the input voltage comparison network 107 is connected with an output GND; the input voltage comparison network 107 is internally provided with two threshold voltages Vth1And Vth2，Vth1＜Vth2，Vth2And Vth1The difference voltage of (A) is a hysteresis voltage when the input voltage V isin＜Vth1The output voltage of the BOOST converter 102 is VO1When V isin＞Vth2The output voltage of the BOOST converter 102 is VO2。
Preferably, the input voltage comparison network 107 includes a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a capacitor C4, a capacitor C5, a transistor Q1, a transistor Q2, a transistor Q3, and a diode D2; one end of the resistor R8 is connected to the positive output terminal of the rectifier network 101 as the first input end of the input voltage comparison network 107; the other end of the resistor R8 is respectively connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is respectively connected with one end of a capacitor C5, one end of a resistor R10, the base electrode of the triode Q1 and the collector electrode of the triode Q2; the other end of the capacitor C4, the other end of the capacitor C5, the other end of the resistor R10 and an emitter of the triode Q1 are connected with an output GND; the collector of the triode Q1 is respectively connected with the base of the triode Q2, one end of the resistor R12 and the cathode of the diode D2; an emitter of the triode Q2 is connected with one end of the resistor R11; the other end of the resistor R11 is connected with the other end of the resistor R12 and serves as a power supply end of the input voltage comparison network 107; the anode of the diode D2 is connected with the base of the triode Q3; the collector of the triode Q3 is connected with the output GND; an emitter of the triode Q3 is connected with one end of the resistor R13; the other end of the resistor R13 serves as a second input terminal of the input voltage comparison network 107.
Preferably, the input voltage comparison network 107 includes a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a capacitor C4, a capacitor C5, a MOS transistor Q1, a MOS transistor Q2, and a MOS transistor Q3; one end of the resistor R8 is connected to the positive output terminal of the rectifier network 101 as the first input end of the input voltage comparison network 107; the other end of the resistor R8 is respectively connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is respectively connected with one end of a capacitor C5, one end of a resistor R10, one end of a resistor R11 and the gate of the MOS transistor Q1; the other end of the capacitor C4, the other end of the capacitor C5, the other end of the resistor R10 and the source electrode of the MOS transistor Q1 are connected with an output GND; the drain electrode of the MOS transistor Q1 is respectively connected with the gate electrode of the MOS transistor Q2, the gate electrode of the MOS transistor Q3 and one end of the resistor R12; the drain electrode of the MOS transistor Q2 is connected with the other end of the resistor R11; the source of the MOS transistor Q2 is connected to the other end of the resistor R12 and serves as the power supply terminal of the input voltage comparison network 107; the drain electrode of the MOS transistor Q3 is connected with one end of a resistor R13; the other end of the resistor R13 is connected with the output GND; the source of the MOS transistor Q3 is used as the second input terminal of the input voltage comparison network 107.
Preferably, the output voltage sampling network 106 includes a resistor R5, a resistor R6, and a resistor R7; one end of the resistor R5 and the positive output end VOConnecting; the other end of the resistor R5 is connected with one end of a resistor R6; the other end of the resistor R6 is connected to one end of the resistor R7, the other end of the resistor R7 is connected to the output GND, and the connection point of the resistor R6 and the resistor R7 is used as a voltage sampling point to be connected to the second input terminal of the input voltage comparison network 107.
Preferably, when Vin＞Vth2Then, the input current of the second input terminal of the input voltage comparison network 107 is greater than 0; when V isin＜Vth1The input current at the second input of the input voltage comparison network 107 is equal to 0.
Compared with the prior art, the invention has the following beneficial effects:
1. the volume of the inductor is reduced, which is beneficial to the small volume of the product;
2. when the voltage is input in a wide range, the efficiency of low-voltage input is improved, and the application range and the reliability of the product are favorably improved.
Drawings
FIG. 1 is a prior art circuit diagram;
FIG. 2 is a circuit diagram of a first embodiment of the present invention;
FIG. 3 compares the voltage characteristics over the input voltage range of the prior art and the present invention;
FIG. 4 is a circuit diagram of a second embodiment of the present invention.
Detailed Description
Example one
Fig. 2 is a circuit diagram according to a first embodiment of the present invention.
The input end of the rectifier network 101 is connected with an alternating current input; the positive output terminal of the rectifier network 101 is connected with one end of an input capacitor C1 and a primary synonym terminal (one end with a black punctuation mark is a synonym terminal, and the other end without the black punctuation mark is a synonym terminal) of the transformer T1; the output negative terminal of the rectifier network 101 is connected with the other end of the input capacitor C1 and the output GND; the primary dotted terminal of the transformer T1 is connected with the anode of the diode D1 and the drain of the switching tube TR 1; the cathode of the diode D1, one end of the output capacitor C2 and the positive output terminal VOConnecting; the source electrode of the switching tube TR1 is connected with the CS pin of the control chip IC, one end of a resistor R2 in the current sampling network 104 and one end of a resistor R3 in the driving network 105; the gate of the switching tube TR1 is connected to one end of the resistor R4 and the other end of the resistor R3 in the driving network 105; the other end of the resistor R4 is connected with a GATE pin of the control chip IC; the other end of the resistor R2 is connected to the other end of the output capacitor C2 and the output GND.
The same-name end of the secondary winding of the transformer T1 in the current detection network 103 is connected with one end of a resistor R1; the other end of the resistor R1 is connected with a ZCD pin of the control chip IC; the synonym terminal of the secondary winding of the transformer T1 is connected to the output GND.
One end of the resistor R5 in the output voltage sampling network 106 and the output positive terminal VOConnecting; the other end of the resistor R5 is connected with one end of a resistor R6; the other end of the resistor R6 is connected with one end of a resistor R7 and an INV pin of the control chip IC; the other end of the resistor R7 is connected with the output GND; a VCC pin of the control chip IC is connected with one end of a capacitor C3 and an auxiliary power supply VCC; and a GND pin of the control chip IC is connected with the other end of the capacitor C3 and an output GND.
One end of a resistor R8 in the input voltage comparison network 107 is connected with the positive output end of the rectification network 101; the other end of the resistor R8 is connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is connected with one end of a capacitor C5, one end of a resistor R10, the base electrode of an NPN triode Q1 and the collector electrode of a PNP triode Q2; the other end of the capacitor C4 is connected with the other end of the capacitor C5, the other end of the resistor R10, an emitting electrode of the NPN triode Q1 and an output GND; the collector of the NPN triode Q1 is connected with the base of the PNP triode Q2, one end of the resistor R12 and the cathode of the diode D2; an emitter of the PNP triode Q2 is connected with one end of the resistor R11; the other end of the resistor R11 is connected with the other end of the resistor R12 and an auxiliary power supply VCC; the anode of the diode D2 is connected with the base of the PNP triode Q3; the collector of the PNP triode Q3 is connected with the output GND; an emitter of the PNP triode Q3 is connected with one end of the resistor R13; the other end of the resistor R13 is connected with an INV pin of the control chip IC.
The AC input voltage is rectified by the rectifier network 101 to obtain a half-sine voltage signal, and the half-sine voltage signal is rectified by the filter network composed of the resistor R8, the capacitor C4, the resistor R9, the capacitor C5 and the resistor R10 in the input voltage comparison network 107 to obtain a DC voltage V proportional to the AC input voltageb1。
When the input voltage Vin＜Vth1At this time, the input voltage value is lower, and the DC voltage V isb1Is also lower if Vb1When the emitter junction of NPN transistor Q1 cannot be forward biased (normally, the forward bias voltage of the emitter junction of NPN transistor is about 0.6V-0.7V), NPN transistor Q1 is in the off state and flows through NPN transistor Q1The collector current of the transistor Q1 is zero, and the collector voltage of the NPN triode Q1 is equal to the auxiliary power supply voltage VCC (VCC voltage is usually about 12V-15V, which is greater than the internal reference voltage V of the pin INV of the control chipref) Then, the emitter current of the PNP transistor Q2 is zero, the diode D2 is in the off state, and the emitter current flowing through the PNP transistor Q3 is zero. At this time, the internal reference voltage V passes through the control chip INVrefError amplification is carried out on the sampling voltage of the output voltage sampling network, so that the output voltage value is stabilized at VO1The half-sine output signal of the multiplier inside the control chip is compared with the voltage of the resistor R2 in the current sampling network 104, so that the input current and the input voltage are basically in the same phase, and a higher power factor value is ensured. When the AC input voltage is low, the output voltage VO1Satisfy the requirement of
Figure GDA0002215100240000051
When the AC input voltage is stepped up from low voltage, the DC voltage V proportional to the input voltageb1And also gradually increases. When the input voltage Vin＞Vth2When, Vb1The voltage of the NPN triode Q1 can make the emitting junction of the NPN triode Q1 forward biased, the NPN triode Q1 is conducted, the collector voltage of the NPN triode Q1 is reduced, the PNP triode Q2 is conducted, the collector current flowing through the PNP triode provides positive feedback current for the conduction of the NPN triode Q1, the NPN triode Q1 is made to be in saturated conduction, and V isb1The voltage is clamped by the emitter junction voltage of NPN transistor Q1, the collector voltage of NPN transistor Q1 is reduced to about zero, PNP transistor Q3 is turned on, and the current through PNP transistor Q3 is
Figure GDA0002215100240000052
Vbe3Is the emitter junction voltage drop, V, of the PNP triode Q3D2Is the conduction voltage drop, V, of diode D2th1And Vth2For the threshold voltage values set in the input voltage comparison network 107.
At the moment, the INV pin passes through the control chipThe internal reference voltage and the output sampling network 106 carry out error amplification, the duty ratio is adjusted to stabilize the output voltage, and the output voltage VO2Satisfy the requirement of
Figure GDA0002215100240000061
When the AC input voltage is stepped down from high voltage, if Vin＜Vth1When, Vb1When the voltage can not maintain the positive bias of the emitting junction of the NPN triode Q1, the NPN triode Q1, the PNP triode Q2 and the PNP triode Q3 are all cut off, the current of the emitting electrode flowing through the PNP triode Q3 is zero, and the output voltage is VO1. Since the PNP transistor Q2 has a positive feedback compensation current as its collector current when it is turned on, which promotes the on-state of the NPN transistor Q1, the corresponding input voltage threshold V when the NPN transistor Q1 is turned offth1＜Vth2。
Vth2And Vth1The voltage difference value of (2) is called as a hysteresis voltage, and the existence of the hysteresis voltage is beneficial to improving the anti-interference capability of the system.
Taking the input voltage of 85 VAC-264 VAC and the output power of 120W as an example, the prior art is compared with the invention.
Figure GDA0002215100240000062
As can be seen from the above table, compared with the prior art, the input efficiency of the low voltage is obviously improved by about 1.58-1.86% when the voltage is input in a wide range.
Example two
Fig. 4 is a diagram of a second embodiment of the present invention, which is different from the first embodiment in that the transistor in the input voltage comparison network 107 is replaced by a MOS transistor, which is beneficial to reducing the temperature versus the current IQ3The stability of the output voltage is improved.
One end of a resistor R8 in the input voltage comparison network 107 is connected with the positive output end of the rectification network 101; the other end of the resistor R8 is connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is connected with one end of a capacitor C5, one end of a resistor R10, one end of a resistor R11 and the gate of an N-MOS transistor Q1; the other end of the capacitor C4 is connected with the other end of the capacitor C5, the other end of the resistor R10, the source of the N-MOS transistor Q1 and the output GND; the drain electrode of the N-MOS transistor Q1 is connected with the grid electrode of the P-MOS transistor Q2, the grid electrode of the P-MOS transistor Q3 and one end of the resistor R12; the drain electrode of the P-MOS tube Q2 is connected with the other end of the resistor R11; the source electrode of the P-MOS transistor Q2 is connected with the other end of the resistor R12 and the auxiliary power supply VCC; the drain electrode of the P-MOS transistor Q3 is connected with one end of a resistor R13; the other end of the resistor R13 is connected with the output GND; the source of the P-MOS tube Q3 is connected with the INV pin of the control chip IC.
When the AC input voltage is lower, the grid-source voltage V of the N-MOS transistor Q1GS＜VGS(th)(VGS(th)Is the turn-on threshold voltage of the N-MOS transistor Q1), the N-MOS transistor Q1 is in the off-state. At this time, the output voltage VO1Satisfy the requirement of
Figure GDA0002215100240000071
When the input voltage is gradually increased, the grid-source voltage of the N-MOS transistor Q1 is gradually increased. Input voltage Vin＞Vth2Time VGS＞VGS(th)If the voltage of the drain of the N-MOS transistor Q1 is turned on, the voltage of the drain of the N-MOS transistor Q1 is reduced, the P-MOS transistor Q2 is turned on, and the current flowing through the P-MOS transistor Q2 further increases the voltage of the gate and the source of the N-MOS transistor Q1, so as to provide a positive feedback effect for the turn-on of the N-MOS transistor, and finally reduce the voltage of the drain of the N-MOS transistor Q1 to zero. The P-MOS transistor Q3 is turned on, the drain-source voltage thereof is reduced to zero, and the current flowing through the P-MOS transistor Q3 satisfies the requirement
Figure GDA0002215100240000072
At the moment, error amplification is carried out through the internal reference voltage of the INV pin of the control chip and the output sampling network 106, the duty ratio is adjusted to stabilize the output voltage, and the output voltage V isO2Satisfy the requirement of
Figure GDA0002215100240000073
When the input voltage is gradually reduced, the input voltage Vin＜Vth1Time VGS＜VGS(th)When the N-MOS transistor Q1 works in a cut-off state, the drain voltage of the N-MOS transistor Q1 rises, the P-MOS transistor Q1 and the P-MOS transistor Q2 are both cut off, the current flowing through the P-MOS transistor Q3 is zero, and the output voltage is V at the momentO1. Because the current flowing through the P-MOS transistor Q2 is positive feedback current when the P-MOS transistor Q2 is switched on and has a promoting effect on the switching on of the N-MOS transistor, the corresponding input voltage threshold V is switched off when the N-MOS transistor is switched offth1＜Vth2。
The above disclosure is only a preferred embodiment of the present invention, but the present invention is not limited thereto, such as being applied to an active PFC circuit in a continuous mode. Any modifications of the invention which can be made by a person skilled in the art without departing from the core idea of the invention shall fall within the scope of the claims of the present invention.

Claims (5)

1. A PFC circuit with variable output voltage comprises a rectification network 101, a BOOST converter 102, an output voltage sampling network 106 and a control IC, wherein the input end of the rectification network 101 is connected with an alternating input voltage VinThe output positive terminal and the output negative terminal of the rectifier network 101 are respectively connected to two input terminals of the BOOST converter 102, and the output terminal of the BOOST converter 102 is the output positive terminal VOAnd an output GND, the output voltage sampling network 106 is connected to the output positive terminal VOAnd the output GND, the control IC controls the on and off of a switch tube in the BOOST converter 102;
the method is characterized in that: the voltage regulator further comprises an input voltage comparison network 107, wherein a first input end of the input voltage comparison network 107 is connected with an output positive end of the rectification network 101, a second input end of the input voltage comparison network 107 is connected with a sampling voltage of the output voltage sampling network 106 and an output voltage feedback pin INV of the control IC, a power supply end of the input voltage comparison network 107 is connected with a power supply voltage VCC, and an output end of the input voltage comparison network 107 is connected with an output GND; the input voltage comparison network 107 is internally provided with two threshold voltages Vth1And Vth2，Vth1＜Vth2，Vth2And Vth1The difference voltage of (A) is a hysteresis voltage when the input voltage V isin＜Vth1The output voltage of the BOOST converter 102 is VO1When V isin＞Vth2The output voltage of the BOOST converter 102 is VO2。
2. The PFC circuit of claim 1, wherein: the input voltage comparison network 107 comprises a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a capacitor C4, a capacitor C5, a triode Q1, a triode Q2, a triode Q3 and a diode D2; one end of the resistor R8 is connected to the positive output terminal of the rectifier network 101 as the first input end of the input voltage comparison network 107; the other end of the resistor R8 is respectively connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is respectively connected with one end of a capacitor C5, one end of a resistor R10, the base electrode of the triode Q1 and the collector electrode of the triode Q2; the other end of the capacitor C4, the other end of the capacitor C5, the other end of the resistor R10 and an emitter of the triode Q1 are connected with an output GND; the collector of the triode Q1 is respectively connected with the base of the triode Q2, one end of the resistor R12 and the cathode of the diode D2; an emitter of the triode Q2 is connected with one end of the resistor R11; the other end of the resistor R11 is connected with the other end of the resistor R12 and serves as a power supply end of the input voltage comparison network 107; the anode of the diode D2 is connected with the base of the triode Q3; the collector of the triode Q3 is connected with the output GND; an emitter of the triode Q3 is connected with one end of the resistor R13; the other end of the resistor R13 serves as a second input terminal of the input voltage comparison network 107.
3. The PFC circuit of claim 1, wherein: the input voltage comparison network 107 comprises a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a capacitor C4, a capacitor C5, a MOS transistor Q1, a MOS transistor Q2 and a MOS transistor Q3; one end of the resistor R8 is connected to the positive output terminal of the rectifier network 101 as the first input end of the input voltage comparison network 107; the other end of the resistor R8 is respectively connected with one end of a resistor R9 and one end of a capacitor C4; the other end of the resistor R9 is respectively connected with one end of a capacitor C5, one end of a resistor R10, one end of a resistor R11 and the gate of the MOS transistor Q1; the other end of the capacitor C4, the other end of the capacitor C5, the other end of the resistor R10 and the source electrode of the MOS transistor Q1 are connected with an output GND; the drain electrode of the MOS transistor Q1 is respectively connected with the gate electrode of the MOS transistor Q2, the gate electrode of the MOS transistor Q3 and one end of the resistor R12; the drain electrode of the MOS transistor Q2 is connected with the other end of the resistor R11; the source of the MOS transistor Q2 is connected to the other end of the resistor R12 and serves as the power supply terminal of the input voltage comparison network 107; the drain electrode of the MOS transistor Q3 is connected with one end of a resistor R13; the other end of the resistor R13 is connected with the output GND; the source of the MOS transistor Q3 is used as the second input terminal of the input voltage comparison network 107.
4. A PFC circuit according to claim 2 or 3, wherein: the output voltage sampling network 106 comprises a resistor R5, a resistor R6 and a resistor R7; one end of the resistor R5 and the positive output end VOConnecting; the other end of the resistor R5 is connected with one end of a resistor R6; the other end of the resistor R6 is connected to one end of the resistor R7, the other end of the resistor R7 is connected to the output GND, and the connection point of the resistor R6 and the resistor R7 is used as a voltage sampling point to be connected to the second input terminal of the input voltage comparison network 107.
5. A PFC circuit according to claim 2 or 3, wherein: when V isin＞Vth2Then, the input current of the second input terminal of the input voltage comparison network 107 is greater than 0; when V isin＜Vth1The input current at the second input of the input voltage comparison network 107 is equal to 0.
CN201810756386.7A 2018-07-11 2018-07-11 PFC circuit with variable output voltage Active CN108880298B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810756386.7A CN108880298B (en) 2018-07-11 2018-07-11 PFC circuit with variable output voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810756386.7A CN108880298B (en) 2018-07-11 2018-07-11 PFC circuit with variable output voltage

Publications (2)

Publication Number Publication Date
CN108880298A CN108880298A (en) 2018-11-23
CN108880298B true CN108880298B (en) 2020-03-17

Family

ID=64300744

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810756386.7A Active CN108880298B (en) 2018-07-11 2018-07-11 PFC circuit with variable output voltage

Country Status (1)

Country Link
CN (1) CN108880298B (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6998732B2 (en) * 2002-07-23 2006-02-14 Lite-On Technology Corporation Power system for supplying stable power
KR100544186B1 (en) * 2003-06-12 2006-01-23 삼성전자주식회사 Power supply
TWI328149B (en) * 2006-01-09 2010-08-01 System General Corp A power converter for activating a pfc circuit with feed-forward voltage compensation
KR20100005486A (en) * 2008-07-07 2010-01-15 페어차일드코리아반도체 주식회사 Switch control device and converter comprising the same
JP5217808B2 (en) * 2008-09-08 2013-06-19 富士電機株式会社 Switching power supply
CN102332836B (en) * 2011-06-14 2013-09-11 茂硕电源科技股份有限公司 PFC boost follower circuit
US9590501B2 (en) * 2013-04-25 2017-03-07 Fairchild Semiconductor Corporation Fast load transient response power supply system using dynamic reference generation
CN205753986U (en) * 2016-06-16 2016-11-30 深圳市越宏普照照明科技有限公司 PFC segmentation booster circuit and Switching Power Supply
CN106059336B (en) * 2016-08-01 2019-03-22 成都芯源系统有限公司 Integrated circuit for a switching converter circuit and method for providing a supply voltage for an integrated circuit

Also Published As

Publication number Publication date
CN108880298A (en) 2018-11-23

Similar Documents

Publication Publication Date Title
CN102263492B (en) Semiconductor device and supply unit
TWI485958B (en) Control circuit for switching power supply and associated method
TWI466426B (en) Method and circuit for changing power consumption
US10834793B2 (en) Power supply circuit and LED driving circuit
TWI389437B (en) A power supply with improved light load efficiency
CN101783595B (en) Overpower compensating method and device for wide voltage-input flyback power supply
US12244223B2 (en) Control circuit of power factor improvement circuit and semiconductor integrated circuit device
US20120201065A1 (en) Power factor correction circuit
US11264915B2 (en) AC-DC converter and AC-DC rectifier
TW201433071A (en) Step-down switching mode power supply and control methods thereof
CN103298215B (en) Control circuit of flyback LED (Light Emitting Diode) driver
CN103944416A (en) Multi-output switch direct current voltage stabilizing power source with simple circuit
CN106211468B (en) A kind of LED drive circuit
CN207218539U (en) A double-transistor forward constant current power supply
CN114899802A (en) An LED drive power supply with overvoltage protection circuit
CN101847937A (en) Power module
CN108880298B (en) PFC circuit with variable output voltage
CN210640810U (en) High-voltage BUCK switch converter and related integrated circuit
CN101534064A (en) Power-taking circuit of AC-DC converter
CN101969723B (en) A two-stage LED driver circuit without optocoupler with high power factor
CN206024166U (en) A kind of LED drive circuit
CN204721240U (en) Switching power supply circuit
CN110768215B (en) Output overvoltage protection control circuit of switching power supply and control method thereof
CN110535362B (en) Current detection method
CN106712487A (en) Constant-current output power factor correction converter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant