CN109328392B - Substrate processing method and boron-doped silicon removal method - Google Patents
Substrate processing method and boron-doped silicon removal method Download PDFInfo
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- CN109328392B CN109328392B CN201780037107.5A CN201780037107A CN109328392B CN 109328392 B CN109328392 B CN 109328392B CN 201780037107 A CN201780037107 A CN 201780037107A CN 109328392 B CN109328392 B CN 109328392B
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 38
- 239000010703 silicon Substances 0.000 title claims abstract description 38
- 239000000758 substrate Substances 0.000 title claims abstract description 19
- 238000003672 processing method Methods 0.000 title claims abstract description 9
- 238000000034 method Methods 0.000 title claims description 46
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims description 33
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims abstract description 73
- 229910052796 boron Inorganic materials 0.000 claims abstract description 41
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 39
- 239000011737 fluorine Substances 0.000 claims abstract description 39
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 37
- 239000007789 gas Substances 0.000 claims description 104
- 229910021529 ammonia Inorganic materials 0.000 claims description 15
- 229910052736 halogen Inorganic materials 0.000 claims description 14
- 150000002367 halogens Chemical class 0.000 claims description 14
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 claims description 3
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052794 bromium Inorganic materials 0.000 claims description 3
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 claims 2
- 239000007795 chemical reaction product Substances 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 238000005530 etching Methods 0.000 abstract description 75
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 42
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 25
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 22
- 229910052786 argon Inorganic materials 0.000 description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 17
- 229910001873 dinitrogen Inorganic materials 0.000 description 17
- 229910052814 silicon oxide Inorganic materials 0.000 description 17
- 229920005591 polysilicon Polymers 0.000 description 16
- 238000006243 chemical reaction Methods 0.000 description 13
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 11
- 230000006870 function Effects 0.000 description 8
- -1 silicon halide Chemical class 0.000 description 8
- 238000003860 storage Methods 0.000 description 8
- 238000012545 processing Methods 0.000 description 7
- 238000000859 sublimation Methods 0.000 description 7
- 230000008022 sublimation Effects 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 239000006227 byproduct Substances 0.000 description 5
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910015900 BF3 Inorganic materials 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000010926 purge Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
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Abstract
The application provides a substrate processing method capable of properly etching boron doped silicon. A wafer W having a SiB layer 40 formed of SiB is exposed to fluorine gas and ammonia gas, and the wafer W mounted on a stage 12 is heated.
Description
Technical Field
The present application relates to a substrate processing method for etching boron-doped silicon without using plasma and a method for removing boron-doped silicon.
Background
In recent years, boron doped silicon (Boron doped Silicon) (hereinafter referred to as "sibs") has been actively used in the manufacturing process of semiconductor devices. Particularly, since the gap filling characteristics of sibs are good, for example, filling of via holes and trenches used in three-dimensional mounting devices is being studied. In this case, the residual sibs oozing from the via hole and trench need to be etched and removed.
However, a material to which boron is generally added is known to be a difficult-to-etch material. For example, a technique of etching a silicon oxide film not doped with boron at a high selectivity to a silicon oxide film doped with boron using Hydrogen Fluoride (HF) gas has been proposed in that a silicon oxide film doped with boron is a difficult-to-etch material (for example, see patent literature 1.).
As a method for etching a material to which boron is added, for example, a method using HF gas and ammonia (NH 3 ) Gas is used as a cleaning gas to remove unwanted adhesion film of BSG film (boron glass film) formed by TEOSA method (for example, refer to patent document 2).
Prior art literature
Patent literature
Patent document 1: japanese patent application laid-open No. 2011-192776
Patent document 2: japanese patent No. 4325473
Disclosure of Invention
Problems to be solved by the application
However, the methods of patent documents 1 and 2 have a problem that it is difficult to properly etch sibs.
The purpose of the present application is to provide a substrate processing method and a boron-doped silicon removal method that can properly etch boron-doped silicon.
Solution for solving the problem
In order to achieve the above object, according to the present application, there is provided a substrate processing method in which a substrate having a layer to be processed formed of boron-doped silicon is placed on a stage, heated, and the layer to be processed is exposed to halogen gas and ammonia gas.
In order to achieve the above object, according to the present application, there is provided a method for removing boron-doped silicon, comprising heating a layer to be treated formed of boron-doped silicon to expose the layer to halogen gas and NH 3 And (3) air.
ADVANTAGEOUS EFFECTS OF INVENTION
According to the present application, a substrate having a layer to be processed formed of boron-doped silicon is placed on a stage and heated, and the layer to be processed is exposed to halogen gas and ammonia gas. At this time, the boron-doped silicon reacts with the halogen gas to generate silicon halide and boron halide, and these silicon halide and boron halide sublimate, whereby the boron-doped silicon is etched (removed), and the boron-containing by-product that inhibits the reaction of the boron-doped silicon with the halogen gas is also heated to sublimate. This can suppress the inhibition of the reaction of the new boron-doped silicon with the halogen gas by the boron-containing by-product. As a result, the production of silicon halide and boron halide and sublimation continue, and the boron-doped silicon can be etched appropriately.
Drawings
Fig. 1 is a cross-sectional view schematically showing the configuration of an etching apparatus for carrying out a substrate processing method according to an embodiment of the present application.
Fig. 2A to 2C are partial enlarged cross-sectional views of a wafer subjected to a sibs removal process, which is a boron-doped silicon removal method according to an embodiment of the present application.
Fig. 3A to 3D are flowcharts showing a sibs removal process as a boron doped silicon removal method according to an embodiment of the present application.
Fig. 4 is a graph showing etching amounts of the polysilicon layer and the sibs layer when the stage temperature is 80 ℃.
Fig. 5 is a graph showing etching amounts of the polysilicon layer and the sibs layer in the case where the stage temperature is 90 ℃.
Fig. 6 is a graph showing the etching amount of the sibs layer to which boron is added by about 5% when the stage temperature and the partial pressure of ammonia are changed.
Fig. 7 is a graph showing etching amounts of the polysilicon layer and the sibs layer in the case where the stage temperature is 120 ℃.
Detailed Description
The present inventors have made intensive studies to achieve the above object, and as a result, have found that boron-doped silicon can be etched appropriately when a substrate having a layer to be processed made of boron-doped silicon is placed on a stage and heated, and the layer to be processed is exposed to halogen gas and ammonia gas. The present application has been made based on the above-described findings.
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.
Fig. 1 schematically shows a configuration of an etching apparatus for performing a substrate processing method according to an embodiment of the present application.
In fig. 1, the etching apparatus 10 includes: the chamber 11 as a processing chamber, the stage 12 as a mounting table disposed inside the chamber 11, the showerhead 13 disposed at an upper portion of the chamber 11 opposite to the stage 12, and the exhaust unit 14 for exhausting gas inside the chamber 11. The etching device 10 pair has a shape of SiBThe wafer W (substrate) of the processed layer is etched, and the wafer W is mounted on the stage 12. The head 13 has a plate-like body and has a buffer chamber 15 therein. The buffer chamber 15 communicates with the interior of the chamber 11 via a plurality of gas vents 16. The showerhead 13 is connected to a fluorine gas supply system 18, an ammonia gas supply system 19, an argon (Ar) gas supply system 20, and nitrogen (N) gas via a gas supply pipe 17 2 ) The gas supply system 21 is connected.
In the etching apparatus 10, the fluorine gas supply system 18 includes: a fluorine gas supply pipe 22 connected to the gas supply pipe 17, a fluorine gas valve 23 disposed in the fluorine gas supply pipe 22, and a fluorine gas supply section 24 connected to the fluorine gas supply pipe 22. The ammonia gas supply system 19 includes: an ammonia gas supply pipe 25 connected to the gas supply pipe 17, an ammonia gas valve 26 disposed in the ammonia gas supply pipe 25, and an ammonia gas supply portion 27 connected to the ammonia gas supply pipe 25. The argon gas supply system 20 includes: an argon gas supply pipe 28 connected to the gas supply pipe 17, an argon gas valve 29 disposed in the argon gas supply pipe 28, and an argon gas supply portion 30 connected to the argon gas supply pipe 28. The nitrogen gas supply system 21 has: a nitrogen gas supply pipe 31 connected to the gas supply pipe 17, a nitrogen gas valve 32 arranged in the nitrogen gas supply pipe 31, and a nitrogen gas supply section 33 connected to the nitrogen gas supply pipe 31.
The fluorine gas supply system 18 supplies fluorine gas to the buffer chamber 15 through the gas supply pipe 17, and adjusts the flow rate of the fluorine gas supplied at this time. The fluorine gas valve 23 freely cuts off and communicates the fluorine gas supply pipe 22. The ammonia gas supply system 19 supplies ammonia gas to the buffer chamber 15 via the gas supply pipe 17 and adjusts the flow rate of the ammonia gas supplied at this time. The ammonia valve 26 freely cuts off/communicates the ammonia gas supply pipe 25. The argon gas supply system 20 supplies argon gas to the buffer chamber 15 through the gas supply pipe 17, and adjusts the flow rate of the argon gas supplied at this time. The argon gas valve 29 freely cuts off and communicates with the argon gas supply pipe 28. The nitrogen gas supply system 21 supplies nitrogen gas to the buffer chamber 15 via the gas supply pipe 17 and adjusts the flow rate of the nitrogen gas supplied at this time. The nitrogen valve 32 freely performs shutoff/communication of the nitrogen gas supply pipe 31. Argon and nitrogen supplied from the argon supply system 20 and the nitrogen supply system 21 are used as purge gases and dilution gases.
The showerhead 13 supplies fluorine gas, ammonia gas, argon gas, and nitrogen gas supplied to the buffer chamber 15 into the chamber 11 through the gas vent holes 16. The stage 12 is disposed at the bottom of the chamber 11. A temperature regulator 34 for regulating the temperature of the stage 12 is provided inside the stage 12. The temperature regulator 34 is constituted by, for example, a heater, and heats the wafer W placed on the stage 12.
The etching apparatus 10 further includes a control unit 35 for controlling each component of the etching apparatus 10. The control unit 35 includes: a process controller having a microprocessor (computer) and a memory unit composed of a memory. The storage part stores processing procedures and various databases, etc., wherein the processing procedures are as follows: a control program for realizing supply of various gases used in a desired process performed in the etching apparatus 10, exhaust of the interior of the chamber 11, and the like by control of the process controller; control program for causing each component of the etching apparatus 10 to execute a predetermined process according to the process conditions. The control unit 35 retrieves a processing procedure or the like from the storage unit and causes the process controller to execute a desired process, for example, a sibs removal process described later.
Fig. 2A to 2C are partial enlarged cross-sectional views of a wafer subjected to a sibs removal process as a boron-doped silicon removal method according to an embodiment of the present application.
The wafer W has a silicon oxide layer 37 formed by a thermal oxidation process on a silicon substrate 36, and an amorphous silicon layer 39 is formed at the bottom of a trench 38 formed by photolithography or the like on the silicon oxide layer 37 (fig. 2A). In the three-dimensional mounting device manufactured from the wafer W, the wafer W is subjected to a film forming process to fill the inside of the trench 38 with the sibs. Since the inside of the trench 38 is completely filled with the sibs during the film formation process, the sibs ooze out of the trench 38, and the remaining sibs form a sibs layer 40 (fig. 2B) as a layer to be processed. The sibs 40 hinder the lamination process of the three-dimensional mounted device, and are removed by a sibs removal process (fig. 2C) described later.
Fig. 3A to 3D are flowcharts showing a sibs removal process as a boron doped silicon removal method according to an embodiment of the present application.
First, a wafer W is placed on a stage 12 in a chamber 11 of an etching apparatus 10, and fluorine gas is supplied theretoThe system 18, the ammonia gas supply system 19, the argon gas supply system 20, and the nitrogen gas supply system 21 supply fluorine gas, ammonia gas, argon gas, and nitrogen gas as halogen gas into the chamber 11 through the showerhead 13 (fig. 3A). At this time, the fluorine gas chemically reacts with the SiB of the SiB layer 40 as shown in the following formula (1) to generate silicon tetrafluoride (SiF) 4 ) Boron tetrafluoride (BF) 4 ). The ammonia gas acts as a catalyst to promote the chemical reaction represented by the following formula (1).
SiB+4F 2 +NH 3 →SiF 4 ↑+BF 4 ↑+NH 3 …(1)
Here, silicon tetrafluoride and boron tetrafluoride sublimate, and are discharged from the inside of the chamber 11 by the exhaust unit 14, with the result that the sibs are removed.
In addition, a part of the ammonia gas and the fluorine gas chemically react as shown in the following formula (2) to generate a hydrogen fluoride gas. "F" in the following formula (2) * "means a fluorine radical.
7F 2 +2NH 3 →2NF 3 +2F * +6HF…(2)
The generated hydrogen fluoride gas chemically reacts with sublimated silicon tetrafluoride and ammonia gas as shown in the following formula (3), and silicon tetrafluoride (hereinafter, referred to as "AFS") is generated as a silicon-containing by-product.
SiF 4 +2HF+2NH 3 →(NH 4 ) 2 SiF 4 …(3)
The generated hydrogen fluoride gas chemically reacts with sublimated boron tetrafluoride and ammonia gas as shown in the following formula (4), and boron trifluoride (hereinafter, referred to as "AFB") is generated as a boron-containing by-product.
BF 4 +2HF+2NH 3 →(NH 4 ) 2 BF 4 …(4)
The AFS is relatively easy to decompose and sublimate, and therefore is less likely to remain, and the AFB layer 41 remains so as to cover the unetched sibs layer 40, because the AFB is less likely to decompose and sublimate than the AFS (fig. 3B). The AFB layer 41 prevents the fluorine gas from contacting the sibs layer 40, and prevents new chemical reaction between the sibs and the fluorine gas (see formula (1) above) (fig. 3C).
In this process, the wafer W mounted on the stage 12 is heated by the temperature regulator 34 of the stage 12. At this time, the chemical reaction shown in the following formula (5) is performed by using thermal energy, and the AFB of the AFB layer 41 is decomposed into boron tetrafluoride, ammonia gas, and hydrogen fluoride gas, and sublimated (fig. 3D). As a result, AFB layer 41 is removed, and new chemical reaction between sibs and fluorine gas (see formula (1) above) is promoted.
(NH 4 ) 2 BF 4 →BF 4 +2HF+2NH 3 …(5)
Then, the present process ends.
According to the process of fig. 3A to 3D, the wafer W having the sibs layer 40 formed of sibs is exposed to fluorine gas and ammonia gas. At this time, the sibs react with fluorine gas to generate silicon tetrafluoride, boron tetrafluoride, and silicon tetrafluoride, boron tetrafluoride sublimate, whereby the sibs are etched, but AFB is simultaneously generated as a by-product, which hinders new chemical reaction of the sibs with fluorine gas. In contrast, in the process of fig. 3A to 3D, the wafer W is heated by the temperature regulator 34, and therefore the AFB that inhibits the reaction of the sibs with the fluorine gas is heated and sublimated. This can inhibit AFB from blocking the reaction between new sibs and fluorine gas. As a result, the formation and sublimation of silicon tetrafluoride and boron tetrafluoride continue, and therefore, the sibs can be etched appropriately.
Next, an embodiment of the present application will be described.
First, the present inventors prepared a test piece (hereinafter referred to as a "polycrystalline silicon wafer") having a polycrystalline silicon layer formed on a substrate having a silicon oxide layer formed by a thermal oxidation treatment, and prepared a test piece (hereinafter referred to as a "1% sibs") having a sibs layer (hereinafter referred to as a "1% sibs") to which about 1% boron was added on the same substrate, and further prepared a test piece (hereinafter referred to as a "5% sibs") having a sibs layer (hereinafter referred to as a "5% sibs") to which about 5% boron was added on the same substrate.
Next, etching amounts of the polycrystalline silicon wafer, the polycrystalline silicon layer, and the sibs layer in the 1% sibs and 5% sibs were measured by adjusting the temperature of the stage 12 in the etching apparatus 10 to 80 ℃ by the temperature adjuster 34 and by supplying fluorine gas, ammonia gas, argon gas, and nitrogen gas into the chamber 11, and the etching amounts were compared. The etching amount of the silicon oxide layer in each test piece was also measured. At this time, when the flow rate of the ammonia gas is set to 15sccm and 25sccm, and the partial pressure is converted into a partial pressure in consideration of the inside of the chamber 11, the partial pressure of the ammonia gas is set to 2 levels of 17.3mTorr and 28.8 mTorr. Further, the measurement results of the respective etching amounts are shown in the graph of fig. 4. In the graph of fig. 4, the solid line indicates the etching amount of the sibs layer in the 1% sibs sheet (hereinafter, referred to as "1% sibs etching amount"), the broken line indicates the etching amount of the sibs layer in the 5% sibs sheet (hereinafter, referred to as "5% sibs etching amount"), the thin broken line indicates the etching amount of the polysilicon layer in the polysilicon sheet (hereinafter, referred to as "polysilicon etching amount"), and the dash-dot line indicates the etching amount of the silicon oxide layer (hereinafter, referred to as "silicon oxide etching amount").
As can be seen from the graph of fig. 4, the etching amount of 1% sibs was higher than that of polysilicon at a partial pressure of ammonia of 17.3 mTorr. In the case where the partial pressure of ammonia gas is 28.8mTorr, the polysilicon etching amount is higher than the 1% sibs etching amount in the graph of fig. 4, but in practice, since overetching occurs in the 1% sibs sheet, it is assumed that the 1% sibs etching amount is also higher than the polysilicon etching amount in this case. Here, it is understood that the smaller the amount of boron added to the sibs layer, the smaller the amount of AFB generated, the more reliably the removal by sublimation of AFB is performed to promote the etching of sibs, and further, the higher the temperature of the stage 12, the more the sublimation of AFB is promoted to promote the etching of sibs as well, and therefore, in order to properly etch the sibs layer in which the amount of boron added is 1% or less, the temperature of the stage 12 may be set to at least 80 ℃ while exposing the layer to fluorine gas or ammonia gas. It was confirmed that the etching amount of silicon oxide was very small at any level of the partial pressure of ammonia, and the selection ratio of the 1% SiB layer to the silicon oxide layer was 100 or more.
On the other hand, at any level of partial pressure of ammonia, the 5% SiB etch is lower than the polysilicon etch. This is presumably because the amount of boron added in the sibs layer increases, and the AFB produced increases, so that even when the temperature of the stage 12 is set to 80 ℃, the AFB cannot be sublimated entirely, and the AFB layer remains, thereby inhibiting new chemical reaction between the sibs and fluorine gas. Therefore, it was found that even when the temperature of the stage 12 was set to 80 ℃, it was difficult to properly etch the 5% sibs layer.
Next, etching amounts of the polycrystalline silicon wafer, the polycrystalline silicon layer, and the sibs layer in the 1% sibs and 5% sibs were measured by adjusting the temperature of the stage 12 in the etching apparatus 10 to 90 ℃ by the temperature adjuster 34 and supplying fluorine gas, ammonia gas, argon gas, and nitrogen gas into the chamber 11, and the etching amounts were compared. At this time, the flow rate of ammonia gas was set at 5 levels of 1sccm, 10sccm, 15sccm, 25sccm, and 35sccm (the partial pressure of ammonia gas was set at 1.2mTorr, 11.6mTorr, 17.3mTorr, 28.8mTorr, and 40.6 mTorr). Further, the measurement results of the respective etching amounts are shown in the graph of fig. 5. In the graph of fig. 5, the solid line and "∈" indicate a 1% sibs etching amount, the broken line and "∈" indicates a 5% sibs etching amount, the thin broken line and "■" indicate a polysilicon etching amount, and the broken line and "×" indicate a silicon oxide etching amount.
As can be seen from the graph of fig. 5, at any level of partial pressure of ammonia, the 1% sibs etching amount is higher than the polysilicon etching amount. Therefore, it is understood that when the temperature of the stage 12 is at least 90 ℃, the partial pressure of ammonia gas may be set to at least 1.2mTorr in order to properly etch the sibs layer having 1% or less boron added.
In addition, in the ammonia flow rate range of 1 sccm-12 sccm, namely, the ammonia partial pressure range of 1.2 mTorr-13.9 mTorr, the 5% SiB etching amount is higher than the polysilicon etching amount. Therefore, when the temperature of the stage 12 is 90 ℃ or higher, the partial pressure of ammonia gas may be set to a range of 1.2mTorr to 13.9mTorr in order to properly etch the SiB layer in which boron is added to be 5% or less. Here, when the temperature of the stage 12 is changed from 80 ℃ to 90 ℃, it is possible to appropriately etch the sibs layer containing 5% or less of boron added, presumably because sublimation of the AFBs is promoted by increasing the temperature of the stage 12, the AFBs layer does not remain, and new chemical reactions between the sibs and fluorine gas are not hindered.
It was confirmed that the etching amount of silicon oxide was very small at any level of the partial pressure of ammonia, and the selection ratio of the 1% SiB layer and the 5% SiB layer to the silicon oxide layer was 100 or more.
Next, the 5% sib etching amount in the 5% sib sheet when the temperature of the stage 12 in the etching apparatus 10 was set to 3 levels of 80 ℃, 90 ℃ and 120 ℃ by the temperature regulator 34 and fluorine gas, ammonia gas, argon gas and nitrogen gas were supplied into the chamber 11 was measured, and the measurement results of the respective etching amounts are shown in the graph of fig. 6. At this time, the flow rate of ammonia gas was set at 5 levels of 1sccm, 10sccm, 15sccm, 25sccm, and 35sccm (the partial pressure of ammonia gas was set at 1.2mTorr, 11.6mTorr, 17.3mTorr, 28.8mTorr, and 40.6 mTorr).
As can be seen from the graph of fig. 6, for example, when the partial pressure of ammonia gas is 17.3mTorr, the 5% sibs etching amount increases rapidly when the temperature of the stage 12 exceeds 90 ℃; when the partial pressure of ammonia gas is 28.8mTorr, the 5% SiB etching amount increases sharply when the temperature of the stage 12 exceeds 120 ℃. That is, it was confirmed that when the temperature of the stage 12 was increased, sublimation of the AFB was promoted, and etching of the sibs was promoted.
On the other hand, it was confirmed that, for example, the 5% SiB etching amount was decreased as the partial pressure of ammonia was increased in both the case where the temperature of the stage 12 was 80℃and the case where the temperature was 90 ℃. This is presumably because, as the partial pressure of ammonia increases, the amount of AFB layer remaining increases, thereby further impeding new chemical reactions of sibs with fluorine gas. Since overetching occurs at any level of partial pressure of ammonia when the temperature of the stage 12 is 120 ℃, it is assumed that the 5% sibs etching amount decreases as the partial pressure of ammonia increases, as in the case of 80 ℃ and 90 ℃ of the stage 12, although the 5% sibs etching amount does not decrease.
Finally, the time change in etching amounts of the polysilicon layer and the SiB layer in the 1% SiB wafer and the 5% SiB wafer was measured by adjusting the temperature of the stage 12 in the etching apparatus 10 to 120℃by the temperature adjuster 34 and supplying fluorine gas, ammonia gas, argon gas and nitrogen gas into the chamber 11. At this time, the flow rate of ammonia gas was set to 25sccm (the partial pressure of ammonia gas was set to 28.8 mTorr). Further, the measurement results of the time change of each etching amount are shown in the graph of fig. 7. In the graph of fig. 7, solid lines and "+% represent the 1% sibs etching amount, broken lines and" ∈ "represent the 5% sibs etching amount, thin broken lines and" ■ "represent the polysilicon etching amount, and dash-dot lines and" × "represent the silicon oxide etching amount.
As can be seen from the graph of fig. 7, during the continued etching, the etching amounts of 1% and 5% sibs are higher than the etching amount of polysilicon. In particular, if the etching time exceeds 60 seconds, overetching of the sibs occurs not only in the 1% sibs sheet but also in the 5% sibs sheet. Therefore, it is understood that in order to properly etch a SiB layer having 5% or less of boron added, the temperature of the stage 12 may be set to at least 120 ℃ while exposing the layer to fluorine gas or ammonia gas. When the temperature of the stage 12 is set to at least 120 ℃, it is possible to properly etch a SiB layer containing 5% or less of boron added, it is assumed that the sublimation of AFB is promoted by the temperature increase of the stage 12, and the AFB layer is not left at all, and a new chemical reaction between SiB and fluorine gas is not hindered at all. It was confirmed that the etching amount of silicon oxide was very small during the continuous etching, and the selection ratio of the 1% SiB layer and the 5% SiB layer to the silicon oxide layer was 100 or more.
The embodiments of the present application have been described above, but the present application is not limited to the above embodiments.
For example, in the above-described sibs removal treatment, fluorine gas is used as the halogen gas, but as the halogen gas, any gas may be used as long as it chemically reacts with sibs to generate silicon halide or boron halide; chlorine (Cl) 2 ) Gas, bromine (Br) 2 ) And (3) air.
In addition, the object of the present application can be achieved as follows: the process controller included in the control unit 35 is supplied with a storage unit in which program codes of software for realizing the functions of the above-described embodiments are recorded, and a CPU of the process controller reads and executes the program codes stored in the storage unit.
In this case, the program code itself read from the storage unit realizes the functions of the above-described embodiments, and the program code and the storage unit storing the program code constitute the present application.
The storage unit may be, for example, an optical disk such as a RAM, NV-RAM, floppy (registered trademark) disk, hard disk, magneto-optical disk, CD-ROM, CD-R, CD-RW, DVD (DVD-ROM, DVD-RAM, DVD-RW, dvd+rw), magnetic tape, nonvolatile memory card, or other ROM, which is capable of storing the program code. Alternatively, the program codes may be supplied to the process controller by being downloaded from a computer, database, or the like, not shown, connected to the internet, a commercial network, a local area network, or the like.
The functions of the above embodiments are realized not only by executing the program codes read by the process controller, but also by executing part or all of actual processing by an OS (operating system) or the like running on the CPU based on instructions of the program codes.
Further, the following cases are included: after the program codes read from the storage unit are written into the function expansion board inserted into the process controller and the memory provided in the function expansion unit connected to the process controller, the CPU or the like provided in the function expansion board and the function expansion unit performs part or all of the actual processing based on the instruction of the program codes, and the functions of the above-described embodiments are realized by this processing.
The program code may be formed by object code, program code executed by an interpreter, script data supplied to an OS, or the like.
The present application claims priority based on Japanese patent No. 2016-117950 applied in the year 2016, 6 and 14, and the entire contents described in this Japanese patent are incorporated into the present application.
Description of the reference numerals
W wafer
10. Etching device
12. Object stage
34. Temperature regulator
40 SiB layer
41 AFB layer
Claims (3)
1. A substrate processing method is characterized in that a substrate having a processed layer formed of boron-doped silicon is placed on a placing table, heated, and the processed layer is processedThe treatment layer is exposed to halogen gas and ammonia (NH) 3 ) Forming a reaction product on the treated layer of the substrate by a mixture of gases, wherein the halogen gas is one gas selected from the group consisting of fluorine gas, chlorine gas, and bromine gas;
wherein the stage is heated to 80 ℃ or higher when the boron added to the boron-doped silicon constituting the layer to be treated is 1% or less; when boron is added to the boron-doped silicon constituting the layer to be treated at 5% or less, the stage is heated to 90 ℃ or higher.
2. The method according to claim 1, wherein the stage is heated to 120 ℃ or higher when boron added to the boron-doped silicon constituting the layer to be processed is 5% or lower.
3. A method for removing boron-doped silicon, characterized in that a layer to be treated formed of boron-doped silicon is heated to expose the layer to halogen gas and NH 3 A mixture of gases to form a reaction product in the layer to be treated, the halogen gas being one gas selected from the group consisting of fluorine gas, chlorine gas, bromine gas,
wherein when the boron added to the boron-doped silicon constituting the layer to be treated is 1% or less, the stage is heated to 80 ℃ or higher; when boron is added to the boron-doped silicon constituting the layer to be treated at 5% or less, the stage is heated to 90 ℃ or higher.
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| Application Number | Priority Date | Filing Date | Title |
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| JP2016-117950 | 2016-06-14 | ||
| JP2016117950A JP6607827B2 (en) | 2016-06-14 | 2016-06-14 | Substrate treatment method and boron-added silicon removal method |
| PCT/JP2017/014299 WO2017217087A1 (en) | 2016-06-14 | 2017-03-30 | Substrate processing method and method for removing boron-added silicon |
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| CN109328392A CN109328392A (en) | 2019-02-12 |
| CN109328392B true CN109328392B (en) | 2023-09-05 |
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| JP2022184730A (en) * | 2021-05-31 | 2022-12-13 | 東京エレクトロン株式会社 | Substrate processing method and substrate processing apparatus |
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| KR910005371B1 (en) * | 1988-08-17 | 1991-07-29 | 재단법인 한국전자통신연구소 | Manufacturing method of super speed semiconductor |
| JPH06151390A (en) * | 1992-11-13 | 1994-05-31 | Sony Corp | Post-treatment method of dry etching |
| JPH08195381A (en) * | 1995-01-17 | 1996-07-30 | Fujitsu Ltd | Method for manufacturing semiconductor device |
| JP4325473B2 (en) | 2003-04-22 | 2009-09-02 | 東京エレクトロン株式会社 | Cleaning method for heat treatment apparatus |
| KR100588812B1 (en) * | 2004-05-07 | 2006-06-09 | 테크노세미켐 주식회사 | Silicon oxide film etching composition and silicon oxide film etching method using the same |
| US7968441B2 (en) * | 2008-10-08 | 2011-06-28 | Applied Materials, Inc. | Dopant activation anneal to achieve less dopant diffusion (better USJ profile) and higher activation percentage |
| TW201140866A (en) * | 2009-12-07 | 2011-11-16 | Applied Materials Inc | Method of cleaning and forming a negatively charged passivation layer over a doped region |
| JP2011192776A (en) | 2010-03-15 | 2011-09-29 | Toshiba Corp | Method of manufacturing semiconductor device |
| US8808563B2 (en) * | 2011-10-07 | 2014-08-19 | Applied Materials, Inc. | Selective etch of silicon by way of metastable hydrogen termination |
| US9190471B2 (en) | 2012-04-13 | 2015-11-17 | Globalfoundries U.S.2 Llc | Semiconductor structure having a source and a drain with reverse facets |
| KR20140007609A (en) * | 2012-07-09 | 2014-01-20 | 삼성전자주식회사 | Method of manufacturing semiconductor devices |
| WO2015171335A1 (en) * | 2014-05-06 | 2015-11-12 | Applied Materials, Inc. | Directional treatment for multi-dimensional device processing |
| US9406523B2 (en) * | 2014-06-19 | 2016-08-02 | Applied Materials, Inc. | Highly selective doped oxide removal method |
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| KR20190004782A (en) | 2019-01-14 |
| US20190157093A1 (en) | 2019-05-23 |
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