Method and device for encoding and decoding polarization code
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a method and an apparatus for encoding and decoding a polarization code.
Background
At present, with 4G (the 4)thGeneration mobile communication technology, fourth Generation mobile communication technology) enters a commercial scale stage, and is oriented to the fifth Generation mobile communication technology 5G (5G)thGeneration, fifth Generation) has become a hotspot in global research and development. The establishment of a unified 5G concept and the establishment of a globally unified 5G standard have become a common call in the industry. Polar Codes (Polar Codes) as an Enhanced mobile BroadBand (eMBB) scene control channel coding scheme of 5G are novel Codes capable of achieving binary symmetric channel capacityEncoding mode and excellent decoding performance.
In order to improve the performance of Polar decoding, a sequential deletion list (SCL) decoding algorithm is mainly used. Typically, N additional Check bits, which may be, for example, Cyclic Redundancy Check (CRC) Check bits, are appended to the last N positions of the transmitted information sequence for error detection (error detection). For each decoding path, after all bits on the decoding path need to be decoded, the decoding success and failure of the decoding path can be determined, which consumes more time and requires more computing resources.
Disclosure of Invention
The embodiment of the invention discloses a method and a device for encoding and decoding a polarization code, which are used for reducing decoding time delay and saving resources.
In order to achieve the above object, an embodiment of the present invention discloses a polarization code encoding method, where the method includes:
determining a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, wherein a second target position exists behind at least one first target position in the target interleaving pattern, the first target position is used for transmitting bits of a Cyclic Redundancy Check (CRC) sequence, and the second target position is used for transmitting bits of the information sequence;
and interleaving the information sequence subjected to the CRC coding by adopting the target interleaving pattern, and sending the information sequence after coding.
Further, the predetermined interleaving pattern is determined according to a maximum length of a preset information sequence and a generator matrix of a CRC polynomial 0X 9013F.
Further, the determining a target interleaving pattern for transmission according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern includes:
sequentially judging a first numerical value of each position in the interweaving pattern, and if the first numerical value of the position is smaller than the value of the first length, determining a second numerical value of a second target position in the target interweaving pattern according to the first numerical value; if the first value of the position is not less than the value of the maximum length, determining a second value of a first target position in the target interlace pattern based on the first value, the value of the maximum length, and the value of the first length.
Further, the interleaving pattern is:
2 5 8 10 11 13 15 18 19 25 29 33 34 37 38 39 40 43 44 47 49 52 54 5758 59 65 66 68 70 72 73 74 76 78 79 84 86 90 93 94 96 101 105 106 107 111 120121 125 127 129 131 136 138 140 141 142 146 147 149 150 154 159 162 163 168172 173 176 177 178 180 181 183 184 185 186 187 191 192 193 195 197 199 200 14 7 9 12 14 17 24 28 32 36 42 46 48 51 53 56 64 67 69 71 75 77 83 85 89 92 95100 104 110 119 124 126 128 130 135 137 139 145 148 153 158 161 167 171 175179 182 190 194 196 198 201 0 3 6 16 23 27 31 35 41 45 50 55 63 82 88 91 99103 109 118 123 134 144 152 157 160 166 170 174 189 202 22 26 30 62 81 87 98102 108 117 122 133 143 151 156 165 169 188 203 21 61 80 97 116 132 155 164204 20 60 115 205 114 206 113 207 112 208 209 210 211 212 213 214 215 216 217218。
the embodiment of the invention discloses a polar code decoding method, which comprises the following steps:
decoding a continuous deletion list SCL of the received sequence coded by the polarization code;
for each path, decoding one bit, and judging whether the bit is transmitted to be a first target position in a target interleaving pattern according to the determined target interleaving pattern for transmission; if yes, generating a second Cyclic Redundancy Check (CRC) bit by adopting all or part of the decoded information sequence, and checking a first CRC bit transmitted at the first target position; and if the check is not passed, determining that the path decoding fails, wherein the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern.
Further, the predetermined interleaving pattern is determined according to a maximum length of a preset information sequence and a generator matrix of a CRC polynomial 0X 9013F.
Further, the interleaving pattern is:
2 5 8 10 11 13 15 18 19 25 29 33 34 37 38 39 40 43 44 47 49 52 54 5758 59 65 66 68 70 72 73 74 76 78 79 84 86 90 93 94 96 101 105 106 107 111 120121 125 127 129 131 136 138 140 141 142 146 147 149 150 154 159 162 163 168172 173 176 177 178 180 181 183 184 185 186 187 191 192 193 195 197 199 200 14 7 9 12 14 17 24 28 32 36 42 46 48 51 53 56 64 67 69 71 75 77 83 85 89 92 95100 104 110 119 124 126 128 130 135 137 139 145 148 153 158 161 167 171 175179 182 190 194 196 198 201 0 3 6 16 23 27 31 35 41 45 50 55 63 82 88 91 99103 109 118 123 134 144 152 157 160 166 170 174 189 202 22 26 30 62 81 87 98102 108 117 122 133 143 151 156 165 169 188 203 21 61 80 97 116 132 155 164204 20 60 115 205 114 206 113 207 112 208 209 210 211 212 213 214 215 216 217218。
the embodiment of the invention discloses a polarization code encoding device, which comprises:
a determining module, configured to determine a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, where at least one first target position in the target interleaving pattern is followed by a second target position, where the first target position is used to transmit a bit of a Cyclic Redundancy Check (CRC) sequence, and the second target position is used to transmit a bit of the information sequence;
and the polar code interleaver is used for interleaving the information sequence after the CRC coding by adopting the target interleaving pattern and sending the information sequence after the coding.
Further, the determining module is further configured to determine the interleaving pattern according to the maximum length of the preset information sequence and the generator matrix of the CRC polynomial 0X 9013F.
Further, the determining module is specifically configured to sequentially determine a first numerical value of each position in the interleaved pattern, and if the first numerical value of the position is smaller than the first length value, determine a second numerical value of a second target position in the target interleaved pattern according to the first numerical value; if the first value of the position is not less than the value of the maximum length, determining a second value of a first target position in the target interlace pattern based on the first value, the value of the maximum length, and the value of the first length.
The embodiment of the invention provides a polar code decoding device, which comprises:
the polar code decoder is used for decoding the received sequence coded by the polar code by the continuous deletion list SCL;
the check sequence decoder is used for judging whether the bit transmitted is the first target position in the target interleaving pattern according to the determined target interleaving pattern for transmission when decoding one bit for each path; if yes, generating a second Cyclic Redundancy Check (CRC) bit by adopting all or part of the decoded information sequence, and checking a first CRC bit transmitted at the first target position; and if the check is not passed, determining that the path decoding fails, wherein the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern.
Further, the apparatus further comprises:
and the determining module is used for determining the interleaving pattern according to the maximum length of the preset information sequence and the generating matrix of the CRC polynomial 0X 9013F.
The embodiment of the invention discloses a method and a device for encoding and decoding a polarization code, wherein the method comprises the following steps: determining a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, wherein a second target position exists behind at least one first target position in the target interleaving pattern, the first target position is used for transmitting bits of a Cyclic Redundancy Check (CRC) sequence, and the second target position is used for transmitting bits of the information sequence; and interleaving the information sequence subjected to the CRC coding by adopting the target interleaving pattern, and sending the information sequence after coding. Since in the embodiment of the present invention, in the determined target interleaving pattern for transmission, after the first target position of at least one bit for transmitting the CRC sequence, there is a second target position of the bit for transmitting the information sequence, when decoding, each bit is decoded, if the bit is transmitted as the first target position in the target interleaving pattern; the bit may be checked; if the check is not passed, the decoding of the path is determined to be failed, and all bits on the path are not required to be decoded. Therefore, the ET function is realized, and the decoding time delay and the required operation resources are reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a polar code encoding process according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a decoding process of a polar code according to embodiment 4 of the present invention;
FIG. 3 is a schematic diagram of a decoding process of a polar code according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of early stop gains corresponding to information sequences of different lengths according to an embodiment of the present invention;
fig. 5 is a structural diagram of a polar code encoding apparatus according to embodiment 6 of the present invention;
fig. 6 is a structural diagram of a polar code decoding apparatus according to embodiment 7 of the present invention;
fig. 7 is a sending end device according to embodiment 8 of the present invention;
fig. 8 is a receiving end device according to embodiment 9 of the present invention.
Detailed Description
In order to effectively save decoding resources and improve decoding efficiency, the embodiment of the invention provides a method and a device for encoding and decoding a polarization code.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1:
fig. 1 is a schematic diagram of a polar code encoding process provided in embodiment 1 of the present invention, where the process includes the following steps:
s101: determining a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, wherein a second target position exists after at least one first target position in the target interleaving pattern, the first target position is used for transmitting bits of a CRC sequence, and the second target position is used for transmitting bits of the information sequence.
The polarization code encoding method provided by the embodiment of the invention can be applied to a sending end, and the sending end can be a base station or UE.
In the process of simulation, the information sequence can be randomly generated by the simulation equipment, and in the process of actual data transmission, the information sequence carries the data to be transmitted. The length of the information sequence is determined by the code length of the polarization code and the code rate. For example, in the process of simulation, the code length of the polarization code is 96 bits, the code rate is 1/3, the length of the information sequence is 32 bits, the simulation device randomly generates an information sequence with the length of 32 bits, and the information sequence is used as the information sequence to be transmitted.
In addition, when the information sequence is transmitted, in order to ensure the accuracy of the transmitted data, a check sequence is also transmitted, and the receiving end is used for checking whether the information sequence is accurate through the check sequence, wherein the check sequence may be a CRC check sequence.
In order to realize the Early Termination (ET) function of SCL decoding, the information sequence and the CRC check sequence may be interleaved, that is, bits of the CRC sequence are inserted into bits of the information sequence, if a certain path fails decoding, the decoding may be stopped after all decoding paths fail decoding, and the ET function is realized, thereby reducing the decoding delay and the required operation resources.
Therefore, in the embodiment of the present invention, the sending end determines and stores the interleaving pattern in advance, and when the information sequence to be transmitted exists, the target interleaving pattern for transmission may be determined according to the first length of the information sequence to be transmitted and the predetermined interleaving pattern. The target interleaving pattern comprises corresponding positions for transmitting bits of the CRC sequence and bits of the information sequence such that the bits of the CRC sequence can be inserted into the bits of the information sequence, i.e. at least one first target position for transmitting the bits of the CRC sequence followed by a second target position for transmitting the bits of the information sequence in the target interleaving pattern.
S102: and interleaving the information sequence subjected to the CRC coding by adopting the target interleaving pattern, and sending the information sequence after coding.
And the transmitting end carries out CRC coding on the information sequence to be transmitted, after a target interleaving pattern for transmission is determined, the target interleaving pattern is adopted to interleave the information sequence subjected to the CRC coding, the sequence subjected to interleaving processing is subjected to polarization code coding, and then the information sequence is transmitted to the receiving end.
The process of interleaving the CRC-encoded information sequence according to the interleaving pattern belongs to the prior art, and is not described in detail in the embodiment of the present invention.
Since in the embodiment of the present invention, in the determined target interleaving pattern for transmission, after the first target position of at least one bit for transmitting the CRC sequence, there is a second target position of the bit for transmitting the information sequence, when decoding, each bit is decoded, if the bit is transmitted as the first target position in the target interleaving pattern; the bit may be checked; if the check is not passed, the decoding of the path is determined to be failed, and all bits on the path are not required to be decoded. Therefore, the ET function is realized, and the decoding time delay and the required operation resources are reduced.
Example 2:
in order to achieve similar frame Error Rate (WER) and False Alarm Rate (FAR) performances as those achieved when no interleaving is performed, in the embodiment of the present invention, the predetermined interleaving pattern is determined according to the maximum length of the preset information sequence and the generation matrix of the CRC polynomial 0X9013F on the basis of the above-mentioned embodiment.
In the embodiment of the present invention, the CRC polynomial 0X9013F is stored in the sending end, and the maximum length of the information sequence to be transmitted is stored, and when determining the interleaving pattern, the maximum length may be determined according to the preset maximum length of the information sequence and the generator matrix of the CRC polynomial 0X 9013F.
If the maximum length of the information sequence to be transmitted is 200, the interleaving pattern is:
2 5 8 10 11 13 15 18 19 25 29 33 34 37 38 39 40 43 44 47 49 52 54 5758 59 65 66 68 70 72 73 74 76 78 79 84 86 90 93 94 96 101 105 106 107 111 120121 125 127 129 131 136 138 140 141 142 146 147 149 150 154 159 162 163 168172 173 176 177 178 180 181 183 184 185 186 187 191 192 193 195 197 199 200 14 7 9 12 14 17 24 28 32 36 42 46 48 51 53 56 64 67 69 71 75 77 83 85 89 92 95100 104 110 119 124 126 128 130 135 137 139 145 148 153 158 161 167 171 175179 182 190 194 196 198 201 0 3 6 16 23 27 31 35 41 45 50 55 63 82 88 91 99103 109 118 123 134 144 152 157 160 166 170 174 189 202 22 26 30 62 81 87 98102 108 117 122 133 143 151 156 165 169 188 203 21 61 80 97 116 132 155 164204 20 60 115 205 114 206 113 207 112 208 209 210 211 212 213 214 215 216 217218。
the interleaving pattern can perform interleaving processing on information sequences with the length not exceeding 200 bits, that is, the information sequences with the length not exceeding 200 bits can determine a target interleaving pattern for transmission through the interleaving pattern. The length of a CRC check sequence subjected to interleaving processing by the interleaving pattern is 19 bits.
Example 3:
on the basis of the foregoing embodiments, in an embodiment of the present invention, the determining, according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern, a target interleaving pattern for transmission includes:
sequentially judging a first numerical value of each position in the interweaving pattern, and if the first numerical value of the position is smaller than the value of the first length, determining a second numerical value of a second target position in the target interweaving pattern according to the first numerical value; if the first value of the position is not less than the value of the maximum length, determining a second value of a first target position in the target interlace pattern based on the first value, the value of the maximum length, and the value of the first length.
In the embodiment of the present invention, each position in the interlace pattern is referred to as a first position, and each value is referred to as a first value; each position in the target interleaving pattern is referred to as a target position, each value is referred to as a second value, the target position is referred to as a first target position if the target position is used for transmitting bits of a CRC sequence, and the target position is referred to as a second target position if the target position is used for transmitting bits of an information sequence.
And for the interleaving pattern, sequentially aiming at the first numerical value on each first position from the first position to the last position of the interleaving pattern, judging whether the first numerical value on the first position is smaller than the value of the first length of the information sequence to be transmitted.
And if the first numerical value is smaller than the value of the first length, determining a second numerical value of a second target position in the target interleaving pattern according to the first numerical value, namely, taking the first numerical value as the second numerical value in the target interleaving pattern, wherein the target position of the second numerical value is the second target position for transmitting the information sequence in the target interleaving pattern.
If the first value is not smaller than the value of the first length, determining whether the first value is not smaller than a value of a maximum length of a preset information sequence, if the first value is not smaller than the value of the maximum length, determining a second value of a first target position in the target interleaving pattern according to the first value, the value of the maximum length and the value of the first length, specifically, determining a difference value between the first value and the value of the maximum length, then determining a sum of the difference value and the value of the first length, taking the sum as the second value in the target interleaving pattern, and taking a target position where the second value is located as the first target position in the target interleaving pattern for transmitting the CRC sequence.
If the maximum length Kmax of the information sequence is 200 and the length of the CRC sequence is 19, the length of the interleaving pattern is 219, that is, there are 219 positions in the interleaving pattern, and the interleaving pattern is specifically referred to the above embodiment. According to the interleaving pattern and the first length K of the information sequence to be transmitted, the code for determining the target interleaving pattern to be transmitted is as follows:
where K is the first length, a (K) is a first value at a kth position in the interleaving pattern, count is a corresponding target position in the target interleaving pattern, and a' (count) is a second value at the kth target position in the target interleaving pattern.
Specifically, if each position in the target interlace pattern is referred to as a second position, the following steps may be taken in determining the target interlace pattern:
A. for any second position in the target interweaving pattern, sequentially aiming at the first value of each remaining first position in the interweaving pattern, judging whether the first value of the first position is smaller than the value of the first length;
B. if so, taking the first numerical value as a second numerical value of the second position in the target interweaving pattern, filtering the first position in the interweaving pattern, taking the position behind the second position in the target interweaving pattern as a second position, and returning to A;
C. if not, judging whether the first value of the first position is not less than the maximum length, if so, determining a second value of a second position in the target interweaving pattern according to the first value, the maximum length and the first length, filtering the first position in the interweaving pattern, taking the position behind the second position in the target interweaving pattern as the second position, returning to A, if not, filtering the first position in the interweaving pattern, and returning to A.
The process of determining the target interlace pattern described above will be described below with the interlace pattern provided in this embodiment 2, the first length K being 32.
For the first and second positions in the target interleaving pattern, because each position in the interleaving pattern is not filtered at this time, the first and second positions are sequentially determined, the value of the first position is 2 and is less than 32, so that 2 can be used as the first and second position in the target interleaving pattern, and the second position is a bit position for transmitting the information sequence.
And filtering a first position in the interleaving pattern, and then determining a second position in the target interleaving pattern, wherein the first position in the interleaving pattern is filtered at the moment, so that the judgment is sequentially carried out on each position in the remaining unfiltered interleaving patterns, the second first position is judged, the value of the first position is 5 and is less than 32, and therefore, 5 can be taken as the second position in the target interleaving pattern, and the second position is a second target position of the bit for transmitting the information sequence.
Filtering the second first location in the interleaved pattern and then determining a third second location in the target interleaved pattern, again using the process described above, the values of the first 11 second positions in the target interlace pattern, 2581011131518192529 respectively, when determining the value of the 12 th second position, the remaining positions in the interleaved pattern are each positions comprising after the 12 th first position, the value of the 12 th first position is 33, 33 is greater than 32, and less than 200, and then filtering each first location in the interleaved pattern, in turn, using the method described above, until a first location having a value of 200, since the first location has a value of 200, the difference between this value and 200, and the sum of this difference and the first length, is 32, so the value of the 12 th second position in the target interlace pattern is 32, this 12 th position is used to transmit the first target position of the bits of the CRC check sequence.
Then, sequentially adopting the above modes, the determined target interweaving pattern is as follows: {25810111315181925293214791214172428330361623273134222630352136203738394041424344454647484950}. Wherein the position with value 32333435363738394041424344454647484950 in the target interleaving pattern is a first target position, the first target position is used for transmitting bits of the CRC check sequence, and the positions with the rest values are second target positions, the second target positions are used for transmitting bits of the information sequence.
Example 4:
fig. 2 is a schematic diagram of a decoding process of a polar code according to embodiment 4 of the present invention, where the process includes the following steps:
s201: and SCL decoding the received sequence coded by the polarization code.
S202: for each path, decoding one bit, and judging whether the bit is transmitted to be a first target position in a target interleaving pattern according to the determined target interleaving pattern for transmission; if yes, generating a second CRC bit by adopting all or part of the decoded information sequence, and checking a first CRC bit transmitted at the first target position; and if the check is not passed, determining that the path decoding fails, wherein the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern.
The polarization code coding method provided by the embodiment of the invention is applied to a base station and UE.
The process of SCL decoding a sequence encoded by a received polarization code belongs to the prior art, and is not described in detail in the embodiments of the present invention.
When the sequence encoded by the polarization code is decoded by the SCL, a plurality of decoding paths are provided, and each decoding path comprises the sequence encoded by the corresponding polarization code.
When the receiving end starts the decoding of the SCL, the path number is 1, and the path number is multiplied every time one bit is decoded. The receiving end stores a target interleaving pattern for transmission corresponding to the transmitting end, namely which bit is the bit of the information sequence and which bit is the bit of the CRC sequence, and the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern. And the receiving end stores the method for generating CRC bit corresponding to the transmitting end.
For each path, each time a bit is decoded, whether the bit is transmitted to a first target position in the target interleaving pattern is judged, that is, whether the bit is transmitted to a CRC sequence is judged, if so, a second CRC bit is generated by adopting all or part of the decoded information sequence, and the second CRC bit is adopted to check the first CRC bit transmitted to the first target position, that is, whether the value on the first CRC bit is the same as the value on the second CRC bit is judged.
If the check fails, i.e., the value on the first CRC bit is different from the value on the second CRC bit, the path decoding is determined to fail.
In the embodiment of the invention, when decoding, each bit is decoded, if the bit is transmitted as the first target position in the target interleaving pattern, all or part of the decoded information sequence is adopted to generate a second CRC bit, and the bit can be checked; if the check is not passed, the decoding of the path is determined to be failed, and all bits on the path are not required to be decoded. Therefore, the ET function is realized, and the decoding time delay and the required operation resources are reduced.
Example 5:
in order to achieve similar frame error rate and false alarm rate performance as when there is no interleaving, on the basis of the above embodiment 4, in the embodiment of the present invention, the predetermined interleaving pattern is determined according to the maximum length of the preset information sequence and the generator matrix of the CRC polynomial 0X 9013F.
In the embodiment of the present invention, the CRC polynomial 0X9013F is stored in the receiving end, and the maximum length of the information sequence to be transmitted is stored in the receiving end, and when the interleaving pattern is determined, the maximum length may be determined according to the preset maximum length of the information sequence and the generator matrix of the CRC polynomial 0X 9013F.
If the maximum length of the information sequence to be transmitted is 200, the interleaving pattern is:
2 5 8 10 11 13 15 18 19 25 29 33 34 37 38 39 40 43 44 47 49 52 54 5758 59 65 66 68 70 72 73 74 76 78 79 84 86 90 93 94 96 101 105 106 107 111 120121 125 127 129 131 136 138 140 141 142 146 147 149 150 154 159 162 163 168172 173 176 177 178 180 181 183 184 185 186 187 191 192 193 195 197 199 200 14 7 9 12 14 17 24 28 32 36 42 46 48 51 53 56 64 67 69 71 75 77 83 85 89 92 95100 104 110 119 124 126 128 130 135 137 139 145 148 153 158 161 167 171 175179 182 190 194 196 198 201 0 3 6 16 23 27 31 35 41 45 50 55 63 82 88 91 99103 109 118 123 134 144 152 157 160 166 170 174 189 202 22 26 30 62 81 87 98102 108 117 122 133 143 151 156 165 169 188 203 21 61 80 97 116 132 155 164204 20 60 115 205 114 206 113 207 112 208 209 210 211 212 213 214 215 216 217218。
the interleaving pattern can perform interleaving processing on information sequences with the length not exceeding 200 bits, that is, the information sequences with the length not exceeding 200 bits can determine a target interleaving pattern for transmission through the interleaving pattern. The length of a CRC check sequence subjected to interleaving processing by the interleaving pattern is 19 bits.
Fig. 3 is a schematic diagram of a process of encoding and decoding a polar code according to an embodiment of the present invention, in which an interleaving pattern is determined according to a maximum length of a preset information sequence and a generator matrix of a CRC polynomial 0X 9013F; and determining a target interweaving pattern to be transmitted according to the length of the information sequence to be transmitted and the predetermined interweaving pattern. After the target interleaving pattern is determined, aiming at the information source of the CRC code, namely the information sequence after the CRC code, the target interleaving pattern is adopted to carry out interleaving processing on the information sequence after the CRC code, and the sequence after the interleaving processing is carried out polarization code coding and then is sent to a receiving end through a channel.
The receiving end knows the length of the received information sequence and also stores an interleaving pattern, determines a target interleaving pattern in the same way as the sending end, performs polar code decoding on the sequence coded by the received polar code, decodes one bit each time, generates a second CRC bit by using all or part of the decoded information sequence if the bit is transmitted as a first target position for transmitting a CRC sequence in the target interleaving pattern, and checks the first CRC bit transmitted at the first target position, and determines that the path decoding fails if the check fails.
Fig. 4 is a schematic diagram of early-stop gains corresponding to information sequences of different lengths according to an embodiment of the present invention, where the abscissa is the length of the information sequence, the ordinate is ET gain TSCCR (Total Saved Computational complexity ratio), R is code rates, where the code rates are 1/2, 1/3, 1/6, and 2/3, respectively, and the lengths of the information sequences are 32, 48, 64, 80, 120, and 200, respectively. As shown in fig. 4, the polar code encoding and decoding method according to the embodiment of the present invention can provide a certain early-stop gain at different code rates and at different lengths K of the information sequence.
Example 6:
fig. 5 is a structural diagram of a polar code encoding apparatus provided in embodiment 6 of the present invention, which is applied to a transmitting end, and the apparatus includes:
a determining module 51, configured to determine a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, where at least one first target position in the target interleaving pattern is followed by a second target position, where the first target position is used to transmit a bit of a cyclic redundancy check, CRC, sequence, and the second target position is used to transmit a bit of the information sequence;
and a polar code interleaver 52 for interleaving the CRC-coded information sequence with the target interleaving pattern and transmitting the encoded information sequence.
The determining module 51 is further configured to determine an interleaving pattern according to the maximum length of the preset information sequence and the generator matrix of the CRC polynomial 0X 9013F.
The determining module 51 is specifically configured to sequentially determine a first numerical value of each position in the interleaved pattern, and if the first numerical value of the position is smaller than the first length value, determine a second numerical value of a second target position in the target interleaved pattern according to the first numerical value; if the first value of the position is not less than the value of the maximum length, determining a second value of a first target position in the target interlace pattern based on the first value, the value of the maximum length, and the value of the first length.
Example 7:
fig. 6 is a structural diagram of a polar code decoding apparatus according to embodiment 7 of the present invention, which is applied to a receiving end, and the apparatus includes:
a polar code decoder 61, configured to decode the received sequence encoded by the polar code by using the continuous deletion list SCL;
a check sequence decoder 62, configured to, for each path, decode one bit each time, and according to the determined target interleaving pattern for transmission, determine whether the bit to be transmitted is a first target position in the target interleaving pattern; if yes, generating a second Cyclic Redundancy Check (CRC) bit by adopting all or part of the decoded information sequence, and checking a first CRC bit transmitted at the first target position; and if the check is not passed, determining that the path decoding fails, wherein the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern.
The device further comprises:
and the determining module is used for determining the interleaving pattern according to the maximum length of the preset information sequence and the generating matrix of the CRC polynomial 0X 9013F.
Example 8:
based on the same inventive concept, the embodiment of the present invention further provides a sending end device, and because the principle of solving the problem of the sending end device is similar to the method of the polarization code encoding, the implementation of the sending end device may refer to the implementation of the method, and repeated parts are not described again.
The sending end device may be a base station or a UE.
As shown in fig. 7, which is a schematic structural diagram of a sending end device according to an embodiment of the present invention, the sending end device includes: a processor 71, a memory 72, a transceiver 73 and a bus interface. Wherein in fig. 7 the bus architecture may include any number of interconnected buses and bridges, with one or more processors represented by processor 71 and various circuits of memory represented by memory 72 being linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further herein. The bus interface provides an interface. The transceiver 73 may be a number of elements, including a transmitter and a transceiver, providing a means for communicating with various other apparatus over a transmission medium. The processor 71 is responsible for managing the bus architecture and general processing, and the memory 72 may store data used by the processor 71 in performing operations.
In the sending-end device provided in the embodiment of the present invention:
the processor 71 is configured to read the program in the memory 72, and execute the following processes: determining a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, wherein a second target position exists behind at least one first target position in the target interleaving pattern, the first target position is used for transmitting bits of a Cyclic Redundancy Check (CRC) sequence, and the second target position is used for transmitting bits of the information sequence; interweaving the information sequence after CRC coding by adopting the target interweaving pattern, and coding a polarization code;
the transceiver 73 is configured to transmit the encoded sequence under the control of the processor 71.
The processor 71 is further configured to determine an interleaving pattern according to the maximum length of the preset information sequence and the generator matrix of the CRC polynomial 0X 9013F.
The processor 71 is specifically configured to sequentially determine a first numerical value of each position in the interleaved pattern, and determine a second numerical value of a second target position in the target interleaved pattern according to the first numerical value if the first numerical value of the position is smaller than the first length value; if the first value of the position is not less than the value of the maximum length, determining a second value of a first target position in the target interlace pattern based on the first value, the value of the maximum length, and the value of the first length.
Example 9:
based on the same inventive concept, the embodiment of the present invention further provides a receiving end device, and since the principle of the base station for solving the problem is similar to the method for decoding the polarization code, the implementation of the receiving end device may refer to the implementation of the method, and repeated details are not repeated.
The receiving end device may be a base station or a UE.
As shown in fig. 8, which is a schematic structural diagram of a receiving end device according to an embodiment of the present invention, the receiving end device includes: a processor 81, a memory 82, a transceiver 83 and a bus interface. Wherein in fig. 8 the bus architecture may include any number of interconnected buses and bridges, with one or more processors represented by processor 81 and various circuits of memory represented by memory 82 being linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further herein. The bus interface provides an interface. The transceiver 83 may be a number of elements, including a transmitter and a transceiver, providing a means for communicating with various other apparatus over a transmission medium. The processor 81 is responsible for managing the bus architecture and general processing, and the memory 82 may store data used by the processor 81 in performing operations.
In the receiving end device provided in the embodiment of the present invention:
the transceiver 83 is configured to receive, under the control of the processor 71, a sequence encoded by a polarization code sent by a sending end device;
the processor 81 is configured to read the program in the memory 82, and execute the following processes: the decoding device is used for decoding the continuous deletion list SCL of the received sequence coded by the polarization code; for each path, decoding one bit, and judging whether the bit is transmitted to be a first target position in a target interleaving pattern according to the determined target interleaving pattern for transmission; if yes, generating a second Cyclic Redundancy Check (CRC) bit by adopting all or part of the decoded information sequence, and checking a first CRC bit transmitted at the first target position; and if the check is not passed, determining that the path decoding fails, wherein the target interleaving pattern is determined according to the first length of the information sequence to be transmitted and a predetermined interleaving pattern.
The processor 81 is configured to determine an interleaving pattern according to the maximum length of the preset information sequence and the generator matrix of the CRC polynomial 0X 9013F.
The embodiment of the invention discloses a method and a device for encoding and decoding a polarization code, wherein the method comprises the following steps: determining a target interleaving pattern for transmission according to a first length of an information sequence to be transmitted and a predetermined interleaving pattern, wherein a second target position exists behind at least one first target position in the target interleaving pattern, the first target position is used for transmitting bits of a Cyclic Redundancy Check (CRC) sequence, and the second target position is used for transmitting bits of the information sequence; and interleaving the information sequence subjected to the CRC coding by adopting the target interleaving pattern, and sending the information sequence after coding. Since in the embodiment of the present invention, in the determined target interleaving pattern for transmission, after the first target position of at least one bit for transmitting the CRC sequence, there is a second target position of the bit for transmitting the information sequence, when decoding, each bit is decoded, if the bit is transmitted as the first target position in the target interleaving pattern; the bit may be checked; if the check is not passed, the decoding of the path is determined to be failed, and all bits on the path are not required to be decoded. Therefore, the ET function is realized, and the decoding time delay and the required operation resources are reduced.
For the system/apparatus embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for relevant points.
It is to be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or operation from another entity or operation without necessarily requiring or implying any actual such relationship or order between such entities or operations.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely application embodiment, or an embodiment combining application and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart block or blocks and/or flowchart block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.