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CN109449197A - A kind of gallium nitride modulation-doped FET with height grid and more grooves - Google Patents

A kind of gallium nitride modulation-doped FET with height grid and more grooves Download PDF

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CN109449197A
CN109449197A CN201811284888.0A CN201811284888A CN109449197A CN 109449197 A CN109449197 A CN 109449197A CN 201811284888 A CN201811284888 A CN 201811284888A CN 109449197 A CN109449197 A CN 109449197A
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grid
gallium nitride
groove
barrier layer
modulation
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晋超超
朱天成
侯俊马
王晓璐
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Tianjin Jinhang Computing Technology Research Institute
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Tianjin Jinhang Computing Technology Research Institute
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503Nitride Group III-V materials, e.g. AlN or GaN

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Abstract

本发明公开了一种具有高低栅及多凹槽的氮化镓调制掺杂场效应晶体管,属于场效应晶体管技术领域,其结构自下而上分别为蓝宝石衬底、氮化铝成核层、氮化镓沟道层、铝镓氮势垒层。在源极区域和漏极区域的上表面分别具有源电极和漏电极。在铝镓氮势垒层上方中部靠近源极处具有栅电极,栅电极中部为高栅,高栅两侧为左低栅和右低栅。在氮化镓沟道层与铝镓氮势垒层的界面形成异质结沟道,沟道处形成二维电子气。在氮化镓沟道层上表面,左低栅和右低栅的正下方具有凹陷形成的第一凹槽和第二凹槽。使调制掺杂场效应晶体管具有下述效果:①获得较大的电流密度;②削弱电流崩塌效应;③提高栅电极的控制能力;④提高器件的击穿电压。The invention discloses a gallium nitride modulation doped field effect transistor with high and low gate and multi-groove, belonging to the field of field effect transistor technology, and the structure thereof is a sapphire substrate and an aluminum nitride nucleation layer from bottom to top, respectively. a gallium nitride channel layer, an aluminum gallium nitride barrier layer. A source electrode and a drain electrode are respectively provided on the upper surfaces of the source region and the drain region. There is a gate electrode near the source in the middle of the aluminum gallium nitride barrier layer, a high gate in the middle of the gate electrode, and a left low gate and a right low gate on both sides of the high gate. A heterojunction channel is formed at an interface between the gallium nitride channel layer and the aluminum gallium nitride barrier layer, and a two-dimensional electron gas is formed at the channel. On the upper surface of the gallium nitride channel layer, a first groove and a second groove formed by depressions are formed directly under the left low gate and the right low gate. The modulation doped field effect transistor has the following effects: 1 obtaining a larger current density; 2 attenuating the current collapse effect; 3 improving the control ability of the gate electrode; 4 increasing the breakdown voltage of the device.

Description

A kind of gallium nitride modulation-doped FET with height grid and more grooves
Technical field
The invention belongs to field effect transistor technical fields, relate to a kind of gallium nitride tune with height grid and more grooves Doped field effect transistor processed.
Background technique
Phase at the end of the 20th century, gallium nitride is with its biggish forbidden bandwidth, higher electron saturation velocities, high-breakdown-voltage and resists The features such as irradiation, becomes current Deep trench termination and systematic research hot spot.And in wide bandgap semiconductor device, modulation is mixed Miscellaneous field effect transistor (MODFET) has the advantages such as high-frequency, high power density, high-breakdown-voltage and higher efficiency, because This is widely used in the national defence such as commercial communication, Internet of Things, oil exploration, aerospace, radar system, civil field Prospect.
Now in high power device application, the gallium nitride modulation-doped FET of traditional structure can not expire The present high performance demands of foot.Currently, most of documents are dedicated to gallium nitride modulation-doped FET using periphery Circuit is regulated and controled and is compensated to transistor, and this kind of research does not optimize improvement from the internal structure of transistor, this kind of Design frequently can lead to the problems such as transistor breakdown characteristics situation is undesirable, mutual conductance ability of regulation and control is not strong enough, the output to device The important performances such as power, power added efficiency generate extreme influence.
Summary of the invention
Present invention aims at improve conventional gallium nitride modulation-doped FET, make it have 1. obtain it is biggish Current density;2. weakening current collapse effect;3. improving the control ability of gate electrode;4. it is excellent to improve breakdown voltage of device etc. Point meets at present the needs of for large power semiconductor device.A kind of gallium nitride tune with height grid and more grooves is provided Doped field effect transistor processed.
The technical solution that the present invention is disclosed directly below realizes above-mentioned target.
A kind of gallium nitride modulation-doped FET with height grid and more grooves, structure are distinguished from bottom to top For Sapphire Substrate, aluminium nitride (AlN) nucleating layer, gallium nitride (GaN) channel layer, aluminum gallium nitride (n-AlGaN) barrier layer;In gallium aluminium Nitrogen barrier layer upper left and right side are respectively provided with source region and drain region, in the upper surface of source region and drain region It is respectively provided with source electrode and drain electrode;There is gate electrode, gate electrode middle part at source electrode in aluminum gallium nitride barrier layer upper center For high grid, high grid two sides are the low grid in a left side and right low grid of gate electrode, and the high grid are in table in aluminum gallium nitride barrier layer for bottom The middle part of the gate electrode in face;The low grid in a left side are that the bottom on the left of high grid is electric lower than the grid of the upper surface of aluminum gallium nitride barrier layer The left side of pole;The low grid in the right side, the right side for the bottom on the right side of high grid lower than the gate electrode of the upper surface of aluminum gallium nitride barrier layer; Hetero-junctions channel is formed at the interface of gallium nitride (GaN) channel layer and aluminum gallium nitride barrier layer, forms two-dimensional electron gas at channel;? The first groove and second that there is recess to be formed for the underface of gallium nitride (GaN) channel layer upper surface, left low grid and right low grid are recessed Slot.
Preferably, the low grid in a left side and right low grid in gate electrode, are to be formed by aluminum gallium nitride barrier layer surface by chemical wet etching After groove, by the Schottky contacts of metal and semiconductor, formed in aluminum gallium nitride barrier layer groove.
Preferably, the high grid in gate electrode are metals by carrying out schottky junctions after touch with aluminum gallium nitride barrier layer upper surface It is formed.
Preferably, the first groove and the second groove of gallium nitride channel layer upper surface, is passed through in gallium nitride channel layer Chemical wet etching is formed.
Preferably, the transverse width of entire device is 6 μm;Aluminum gallium nitride barrier layer both ends with a thickness of 30nm;Gallium nitride Channel layer both ends with a thickness of 2.5 μm.
Preferably, the width of high grid is 0.5-0.7 μm;The width of left low grid and right low grid is 0.2-0.5 μm;Left low grid and Right low grid are 2-5nm lower than the depth of high grid bottom;The width of first groove and the second groove is 0.3-0.7 μm;First groove Depth with the second groove is 1-4nm.
Preferably, the width of high grid is 0.5 μm;The width of left low grid and right low grid is 0.25 μm;Left low grid and right low grid Depth lower than high grid bottom is 5nm;The width of first groove and the second groove is 0.6 μm;First groove and the second groove Depth is 4nm.
Preferably, the equivalent width of the distance between the second groove and the first groove and high grid.
Preferably, the width of the second groove and the first groove is greater than or equal to the width of left low grid left low grid and right low grid.
A kind of gallium nitride modulation-doped FET with height grid and more grooves disclosed by the invention, have with Lower usefulness:
1. obtaining biggish current density
N-AlGaN barrier layer 4 under high grid 10 is thicker, by theory it is found that the DC current density of transistor and gate electrode 9 Under 4 thickness correlation of n-AlGaN barrier layer, therefore the presence of high grid 10 can obtain biggish current density (phase For gate electrode structure not of the invention).
2. weakening current collapse effect
More just due to 9 voltage of gate electrode, 4 depletion region of n-AlGaN barrier layer can be made to extend, when positively biased reaches a certain level When, depletion region can reach GaN channel layer 3, reduce 13 concentration of two-dimensional electron gas, to reduce maximum saturation leakage current, form electricity Flow pull-in effect.The presence of high grid 10 increases the effective thickness of n-AlGaN barrier layer 4, to reduce depletion layer to GaN The extension of channel layer 3 weakens current collapse effect.
3. improving the control ability of gate electrode
4 thickness of n-AlGaN barrier layer under left low grid 11 and right low grid 12 is smaller, compared to high grid 10, left low 11 He of grid 4 thinner thickness of n-AlGaN barrier layer under right low grid 12, therefore under identical voltage range, left low grid 11 and right low grid 12 Control reference voltage it is stronger.Under the collective effect of high grid 10, left low grid 11 and right low grid 12, field-effect of the present invention Transistor not only has biggish current density, and gate electrode 9 also has biggish current regulation ability.
4. improving the breakdown voltage of device
Due to the presence of left low grid 11, right low grid 12, the first groove 14 and the second groove 15,9 test leakage of gate electrode can be improved Electric field concentration effect.When drain-to-gate voltage is larger, the distribution of electric field will be modulated, i.e., in left low grid 11, right low grid 12, first 15 test leakage of groove 14 and the second groove (if figure is right side to recessed) apex forms multiple electric field peaks, can by Poisson's equation Know, under breakdown conditions, the size of breakdown voltage is definite integral of the electric field from source electrode 7 to from drain electrode 8, more due to producing The distribution at a electric field peak, electric field is modulated, and therefore, the breakdown voltage of the structure transistor is improved.
The gallium nitride modulation-doped FET of the structure has following usefulness:
1. obtaining biggish current density;2. weakening current collapse effect;3. improving the control ability of gate electrode;4. improving The breakdown voltage of device.
Detailed description of the invention
Fig. 1 is the gallium nitride modulation-doped FET schematic diagram with height grid and groove structure.
1 it is Sapphire Substrate, 2 be aluminium nitride (AlN) nucleating layer, 3 be gallium nitride (GaN) channel layer, 4 is aluminum gallium nitride (n- AlGaN) barrier layer, 5 be source electrode, 6 be drain electrode, 7 be source electrode, 8 be drain electrode, 9 be gate electrode, 10 be high grid, 11 be left low Grid, 12 be right low grid, 13 be two-dimensional electron gas, 14 be the first groove, 15 be the second groove.
Specific embodiment
In order to obtain with biggish current density, smaller current pull-in effect, higher gate electrode control ability, compared with The gallium nitride modulation-doped field effect crystal for wearing voltage hit greatly below carries out technical solution in the embodiment of the present invention clear Chu is fully described by.Obviously, described embodiment is only the embodiment of a part of the invention, instead of all the embodiments. Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts all Other embodiments should fall within the scope of the present invention.
Embodiment 1
The structure of improved GaN high electron mobility transistor is as follows.
In the present embodiment, a kind of gallium nitride modulation-doped FET with height grid and more grooves.Knot Structure is respectively Sapphire Substrate 1, AlN (aluminium nitride) nucleating layer 2, GaN (gallium nitride) channel layer 3, n-AlGaN (aluminium from bottom to top Gallium nitrogen) barrier layer 4.6 regions of 5 region of source electrode and drain electrode are respectively provided in 4 upper left of n-AlGaN barrier layer and right side, in source The upper surface in 6 regions of 5 region of pole and drain electrode is respectively provided with source electrode 7 and drain electrode 8.It is leaned in 4 upper center of n-AlGaN barrier layer There is gate electrode 9 at nearly source electrode 5, be high grid 10 in the middle part of gate electrode, high 10 two sides of grid are left low grid 11 and right low grid 12, described High grid are in the middle part of the gate electrode of 4 upper surface of aluminum gallium nitride barrier layer for bottom;The low grid in a left side, are the bottom on the left of high grid Left side of the portion lower than the gate electrode of the upper surface of aluminum gallium nitride barrier layer 4;The low grid in the right side are that the bottom on the right side of high grid is lower than aluminium The right side of the gate electrode of the upper surface of gallium nitrogen barrier layer 4;The bottom of high grid i.e. in the middle part of gate electrode is in aluminum gallium nitride barrier layer 4 Surface, left low grid 11, right low grid 12 are respectively the left side for being located at high grid, the gate electrode on right side, and are somebody's turn to do positioned at left side, the right side of high grid (upper surface that is lower than aluminum gallium nitride barrier layer 4) of the bottom of the gate electrode of side lower than the high grid bottom at middle part.In GaN (nitridation Gallium) interface of channel layer 3 and n-AlGaN barrier layer 4 forms hetero-junctions channel, two-dimensional electron gas 13 is formed at channel.In GaN The first groove 14 that there is recess to be formed for the underface of 3 upper surface of (gallium nitride) channel layer, left low grid 11 and right low grid 12 and the Two grooves 15.
2. the aforementioned gallium nitride modulation-doped FET with height grid and more grooves, which is characterized in that grid electricity The low grid in a left side 11 and right low grid 12 in pole 9, be by 4 surface of n-AlGaN barrier layer after chemical wet etching forms groove, pass through gold Belong to the Schottky contacts with semiconductor, is formed in 4 groove of n-AlGaN barrier layer.
3. the aforementioned gallium nitride modulation-doped FET with height grid and more grooves, which is characterized in that grid electricity High grid 10 in pole 9 are that metal is formed after touch by carrying out schottky junctions with 4 upper surface of n-AlGaN barrier layer.
4. the aforementioned gallium nitride modulation-doped FET with height grid and more grooves, which is characterized in that GaN ditch The first groove 14 and the second groove 15 of 3 upper surface of channel layer, are all to be formed in GaN channel layer by chemical wet etching.
5, preferably, the aforementioned gallium nitride modulation-doped FET with height grid and more grooves, feature exist In the transverse width of entire device is 6 μm;N-AlGaN barrier layer 4 with a thickness of 30nm on the left of device;GaN channel on the left of device Layer 3 with a thickness of 2.5 μm.
The width of high grid 10 is 0.5-0.7 μm;The width of left low grid 11 and right low grid 12 is 0.2-0.5 μm;Left low grid 11 Depth with right low grid 12 is 2-5nm;The width of first groove 14 and the second groove 15 is 0.3-0.7 μm;First groove, 14 He The depth of second groove 15 is 1-4nm.
Embodiment 2
In the present embodiment, the width of the high grid 10 is 0.5 μm;The width of left low grid 11 and right low grid 12 is 0.25 μm; The depth of left low grid 11 and right low grid 12 is 5nm;The width of first groove 14 and the second groove 15 is 0.3 μm;First groove 14 Depth with the second groove 15 is 4nm.
The width of high grid 10 is 0.5 μm;The width of left low grid 11 and right low grid 12 is 0.25 μm;Left low grid 11 and right low grid 12 depth is 5nm;The width of first groove 14 and the second groove 15 is 0.6 μm;The depth of first groove 14 and the second groove 15 Degree is 4nm.
Remaining technical solution of the present embodiment is same as Example 1.
Embodiment 3
In the present embodiment, the width of the high grid 10 is 0.55 μm;The width of left low grid 11 and right low grid 12 is 0.3 μm; The depth of left low grid 11 and right low grid 12 is 4nm;The width of first groove 14 and the second groove 15 is 0.35 μm;First groove 14 Depth with the second groove 15 is 3nm.
Remaining technical solution of the present embodiment is same as Example 1.
Embodiment 4
In the present embodiment, the width of the high grid 10 is 0.6 μm;The width of left low grid 11 and right low grid 12 is 0.35 μm; The depth of left low grid 11 and right low grid 12 is 3nm;The width of first groove 14 and the second groove 15 is 0.4 μm;First groove 14 Depth with the second groove 15 is 2nm.
Remaining technical solution of the present embodiment is same as Example 1.
Embodiment 5
In the present embodiment, the low grid 11 in the left side are 1 μm apart from 5 right side distance of source electrode;First groove 14 is on the left of device 2 μm of boundary;Second groove 15 at a distance from the first groove 14 with the equivalent width of high grid 10.
Remaining technical solution of the present embodiment is identical as embodiment 2,3 or 4.
Core of the invention be make the gallium nitride modulation-doped FET of new construction obtain biggish current density, Weaken current collapse effect, improve the control ability of gate electrode and improves the breakdown voltage of device.It is compared to traditional nitrogen Change gallium modulation-doped FET, a kind of gallium nitride modulation doping field with height grid and more grooves disclosed by the invention Effect transistor, the n-AlGaN barrier layer 4 under high grid 10 is thicker, by theory it is found that the DC current density of transistor and grid electricity 4 thickness correlation of n-AlGaN barrier layer under pole 9, therefore the presence of high grid 10 can obtain biggish current density; More just due to 9 voltage of gate electrode, 4 depletion region of n-AlGaN barrier layer can be made to extend, when positively biased reaches a certain level, exhausted Area can reach GaN channel layer 3, reduce 13 concentration of two-dimensional electron gas, to reduce maximum saturation leakage current, form current collapse effect It answers.The presence of high grid 10 increases the effective thickness of n-AlGaN barrier layer 4, to reduce depletion layer to GaN channel layer 3 Extension, weaken current collapse effect;4 thickness of n-AlGaN barrier layer under left low grid 11 and right low grid 12 is smaller, compared to height Grid 10, left low grid 11 and 4 thinner thickness of n-AlGaN barrier layer under right low grid 12, therefore under identical voltage range, it is left low The control reference voltage of grid 11 and right low grid 12 is stronger.Under the collective effect of high grid 10, left low grid 11 and right low grid 12, this hair The bright field effect transistor not only has biggish current density, and gate electrode 9 also has biggish current regulation ability;By In the presence of left low grid 11, right low grid 12, the first groove 14 and the second groove 15, the electric field that can improve 9 test leakage of gate electrode is concentrated Effect.When drain-to-gate voltage is larger, the distribution of electric field will be modulated, i.e., in left low grid 11, right low grid 12, the first groove 14 and the Two grooves, 15 vertex goes out to form multiple electric field peaks, by Poisson's equation it is found that under breakdown conditions, the size of breakdown voltage is electric field From definite integral of the source electrode 7 to from drain electrode 8, due to producing multiple electric field peaks, the distribution of electric field is modulated, therefore, the knot The breakdown voltage of structure transistor is improved.
Obviously, the described embodiments are merely a part of the embodiments of the present invention, instead of all the embodiments.Based on this Embodiment in invention, every other reality obtained by those of ordinary skill in the art without making creative efforts Example is applied, shall fall within the protection scope of the present invention.

Claims (10)

1. a kind of gallium nitride modulation-doped FET with height grid and more grooves, which is characterized in that its structure is certainly Lower and upper respectively Sapphire Substrate (1), aluminium nitride (AlN) nucleating layer (2), gallium nitride (GaN) channel layer (3), aluminum gallium nitride (n- AlGaN) barrier layer (4);Source electrode (5) region and drain electrode (6) area are respectively provided in aluminum gallium nitride barrier layer (4) upper left and right side Domain is respectively provided with source electrode (7) and drain electrode (8) in the upper surface in source electrode (5) region and drain electrode (6) region;In aluminum gallium nitride gesture Barrier layer (4) upper center has gate electrode (9) at source electrode (5), is high grid (10) in the middle part of gate electrode, high grid (10) two sides are The low grid (11) in a left side of gate electrode and right low grid (12), the high grid are in the grid of aluminum gallium nitride barrier layer (4) upper surface for bottom The middle part of electrode;The low grid in a left side, the gate electrode of the upper surface of aluminum gallium nitride barrier layer (4) is lower than for the bottom on the left of high grid Left side;The low grid in the right side, the right side for the bottom on the right side of high grid lower than the gate electrode of the upper surface of aluminum gallium nitride barrier layer (4); Hetero-junctions channel is formed at the interface of gallium nitride (GaN) channel layer (3) Yu aluminum gallium nitride barrier layer (4), forms two-dimentional electricity at channel Sub- gas (13);In gallium nitride (GaN) channel layer (3) upper surface, the underface of left low grid (11) and right low grid (12) has recess The first groove (14) and the second groove (15) formed.
2. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the low grid (11) in a left side and right low grid (12) in gate electrode (9), are by aluminum gallium nitride barrier layer (4) surface by light After etching forms groove, by the Schottky contacts of metal and semiconductor, formed in aluminum gallium nitride barrier layer (4) groove.
3. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the high grid (10) in gate electrode (9), are metals by carrying out Schottky with aluminum gallium nitride barrier layer (4) upper surface It is formed after contact.
4. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, first groove (14) and the second groove (15) of gallium nitride channel layer (3) upper surface, are all in gallium nitride channel Layer is formed by chemical wet etching.
5. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the transverse width of entire device is 6 μm;Aluminum gallium nitride barrier layer (4) both ends with a thickness of 30nm;Gallium nitride ditch Channel layer (3) both ends with a thickness of 2.5 μm.
6. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the width of high grid (10) is 0.5-0.7 μm;The width of left low grid (11) and right low grid (12) is 0.2-0.5 μm; The depth that left low grid (11) and right low grid (12) are lower than high grid bottom is 2-5nm;First groove (14) and the second groove (15) Width is 0.3-0.7 μm;The depth of first groove (14) and the second groove (15) is 1-4nm.
7. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 6, It is characterized in that, the width of high grid (10) is 0.5 μm;The width of left low grid (11) and right low grid (12) is 0.25 μm;Left low grid (11) and right low grid (12) are lower than the depth of high grid bottom for 5nm;The width of first groove (14) and the second groove (15) is 0.6 μm;The depth of first groove (14) and the second groove (15) is 4nm.
8. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the equivalent width of the distance between the second groove (15) and the first groove (14) and high grid (10).
9. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the second groove (15) and the width of the first groove (14) are greater than or equal to the left low grid (11) of left low grid (11) and the right side The width of low grid (12).
10. a kind of gallium nitride modulation-doped FET with height grid and more grooves according to claim 1, It is characterized in that, the low grid (11) in the left side are 1 μm apart from distance on the right side of source electrode (5);First groove (14) is apart from field effect transistor Pipe left side is 2 μm.
CN201811284888.0A 2018-10-31 2018-10-31 A kind of gallium nitride modulation-doped FET with height grid and more grooves Pending CN109449197A (en)

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WO2022011611A1 (en) * 2020-07-15 2022-01-20 Innoscience (Zhuhai) Technology Co., Ltd. Semiconductor structures and methods of manufacturing the same
CN111989779B (en) * 2020-07-15 2024-03-05 英诺赛科(珠海)科技有限公司 Semiconductor structures and methods of fabricating the same
US12021124B2 (en) 2020-07-15 2024-06-25 Innoscience (Zhuhai) Technology Co., Ltd. Semiconductor structures and methods of manufacturing the same
US12289915B2 (en) 2020-07-15 2025-04-29 Innoscience (Zhuhai) Technology Co., Ltd. Semiconductor structure

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